On 12/06/18 21:13, Molock, Dwaine S. (GSFC-5820) wrote:
Hi Sebastian,
Will these ports work on the RISC-V designs from SiFive
(https://www.sifive.com)?
The SoC of your target is based on the SiFive Rocket Chip. I will also
try to get it running on the Qemu targets. Supporting a particular
S
Hi Sebastian,
Will these ports work on the RISC-V designs from SiFive
(https://www.sifive.com)?
Thanks,
Dwaine
On Jun 12, 2018, at 9:25 AM, Sebastian Huber
mailto:sebastian.hu...@embedded-brains.de>>
wrote:
Hello Molock,
we work currently on the SMP support for RISC-V (32-bit and 64-bit). T
Hello Molock,
we work currently on the SMP support for RISC-V (32-bit and 64-bit). The
aim is to run the tests on Qemu and a FPGA Board with two BOOMv2 processors.
https://devel.rtems.org/ticket/3433
My current task is a tool chain update to include a bug fix for:
https://sourceware.org/bugz
Hello,
What is the current state of RTEMS support for the RISC-V processor?
What development boards and designs were used for RTEMS RISC-V development?
Thanks,
Dwaine
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