Re: [Qemu-devel] [PATCH v2] target-arm: Check undefined opcodes for SWP in A32 decoder

2018-04-05 Thread Peter Maydell
On 23 March 2018 at 21:43, Onur Sahin wrote: > Thanks for the feedback Peter. Removing the redundant check on bit > 23 and adding checks for the "should be" bits as well (bits [11:8]). > > The following patch should make sure we are not treating > architecturally Undefined instructions as a SWP, b

[Qemu-devel] [PATCH v2] target-arm: Check undefined opcodes for SWP in A32 decoder

2018-03-23 Thread Onur Sahin
Thanks for the feedback Peter. Removing the redundant check on bit 23 and adding checks for the "should be" bits as well (bits [11:8]). The following patch should make sure we are not treating architecturally Undefined instructions as a SWP, by verifying the opcodes as per section A8.8.229 of ARMv