[Qemu-devel] [PATCH 2/3] target-arm: fix support for vrecpe.

From: Christophe Lyon Now use the same algorithm as described in the ARM ARM. Signed-off-by: Christophe Lyon --- target-arm/helper.c | 84 +++--- 1 files changed, 72 insertions(+), 12 deletions(-) diff --git a/target-arm/helper.c b/target-arm/help

[Qemu-devel] [PATCH 3/3] target-arm: fix support for vrsqrte.

From: Christophe Lyon Now use the same algorithm as described in the ARM ARM. Signed-off-by: Christophe Lyon --- target-arm/helper.c | 122 ++ 1 files changed, 112 insertions(+), 10 deletions(-) diff --git a/target-arm/helper.c b/target-arm/hel

[Qemu-devel] [PATCH 1/3] softfloat: export float32_default_nan, and float32_infinity. Add float32_set_sign().

From: Christophe Lyon These special values are needed to implement some helper functions, which return these values in some cases. This patch also moves the definitions of default_nan for 16, 64, x80 and 128 bits floats for consistency with float32. Signed-off-by: Christophe Lyon --- fpu/soft

[Qemu-devel] [PATCH v3 0/3] ARM: fix Neon vrecpe and vrsqrte instructions.

From: Christophe Lyon These 3 patches fix the ARM Neon vrecpe and vrsqrte instructions by matching the algorithms descibed in the ARM ARM. With these patches, qemu passes my ARM/Neon tests. Patch #1 modifies softfloat by exporting float32_default_nan and float32_infinity. For consistency, I hav

[Qemu-devel] [PATCH 2/2] target-arm: fix support for vrecpe.

From: Christophe Lyon Now use the same algorithm as described in the ARM ARM. Signed-off-by: Christophe Lyon --- target-arm/helper.c | 84 +++--- 1 files changed, 72 insertions(+), 12 deletions(-) diff --git a/target-arm/helper.c b/target-arm/help

[Qemu-devel] [PATCH 1/2] softfloat: export float32_nan and float32_infinity.

From: Christophe Lyon These two special values are needed to implement some helper functions, which return these values in some cases. This patch also moves the definitions of default_nan for 16, 64, x80 and 128 bits floats for consistency with float32. Signed-off-by: Christophe Lyon --- fpu/

[Qemu-devel] [PATCH v2 0/2] ARM: fix Neon vrecpe instruction.

From: Christophe Lyon These 2 patches fix the ARM Neon vrecpe instruction by matching the algorithm descibed in the ARM ARM. With these patches, qemu passes my ARM/Neon tests. Patch #1 modifies softfloat by exporting float32_nan and float32_infinity. For consistency, I have also moved all the t

[Qemu-devel] [PATCH 3/6] target-arm: fix unsigned 64 bit right shifts.

From: Christophe Lyon Fix range of shift amounts which always give 0 as result. Signed-off-by: Christophe Lyon --- target-arm/neon_helper.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c index 1ac362f..907f7b7 10064

[Qemu-devel] [PATCH 1/6] target-arm: Fix rounding constant addition for Neon shift instructions.

From: Christophe Lyon Handle cases where adding the rounding constant could overflow in Neon shift instructions: VRSHR, VRSRA, VQRSHRN, VQRSHRUN, VRSHRN. Signed-off-by: Christophe Lyon --- target-arm/neon_helper.c | 149 ++ 1 files changed, 137 inse

[Qemu-devel] [PATCH 6/6] target-arm: fix decoding of Neon 64 bit shifts.

From: Christophe Lyon Fix decoding of 64 bits variants of VSHRN, VRSHRN, VQSHRN, VQSHRUN, VQRSHRN, VQRSHRUN, taking into account whether inputs are unsigned or not. Signed-off-by: Christophe Lyon --- target-arm/translate.c | 43 --- 1 files changed, 2

[Qemu-devel] [PATCH v3 0/6] target-arm: Fix Neon shift instructions.

From: Christophe Lyon This patch series provides fixes such that ARM Neon instructions VRSHR, VRSRA, VQRSHRN, VQRSHRUN, VRSHRN, VQSHRN, VSHRN, VQSHRUN now pass all my tests. I have reworked all these patches and I hope they are now easier to review. Christophe Lyon (6): target-arm: Fix roundi

[Qemu-devel] [PATCH 2/6] target-arm: fix Neon right shifts with shift amount == input width.

From: Christophe Lyon Fix rshl helpers (s8, s16, s64, u8, u16) Signed-off-by: Christophe Lyon --- target-arm/neon_helper.c |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c index 3f1f3d4..1ac362f 100644 --- a/targe

[Qemu-devel] [PATCH 4/6] target-arm: fix saturated values for Neon right shifts.

From: Christophe Lyon Fix value returned by signed qrshl helpers (8, 16 and 32 bits). Signed-off-by: Christophe Lyon --- target-arm/neon_helper.c |8 ++-- 1 files changed, 6 insertions(+), 2 deletions(-) diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c index 907f7b7..8

[Qemu-devel] [PATCH 5/6] target-arm: fix Neon VQSHRN and VSHRN.

From: Christophe Lyon Call the normal shift helpers instead of the rounding ones. Signed-off-by: Christophe Lyon --- target-arm/translate.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 8791bc5..ace533f 100644

[Qemu-devel] [PATCH 3/8] target-arm: VQRSHRN related changes

From: Christophe Lyon More fixes for VQSHRN and VQSHRUN. Signed-off-by: Christophe Lyon --- target-arm/translate.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 6dd024d..9ca5b82 100644 --- a/target-arm/translat

[Qemu-devel] [PATCH 2/8] target-arm: Create and use neon_unarrow_sat* helpers

From: Christophe Lyon Fix VQMOVUN, improve VQSHRUN and VQRSHRUN. Signed-off-by: Christophe Lyon --- target-arm/helpers.h |3 ++ target-arm/neon_helper.c | 63 ++ target-arm/translate.c | 43 ++- 3 files chang

[Qemu-devel] [PATCH 5/8] target-arm: fix neon vqrshl instruction

From: Christophe Lyon Signed-off-by: Juha Riihimäki Signed-off-by: Christophe Lyon --- target-arm/neon_helper.c | 21 ++--- 1 files changed, 18 insertions(+), 3 deletions(-) diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c index 891b812..46fcdc4 100644 --- a/

[Qemu-devel] [PATCH 4/8] target-arm: fiddle decoding of 64 bit shift by imm and narrow

From: Christophe Lyon Tweak decoding of the shift-by-imm and narrow 64 bit insns (VSHRN, VRSHRN, VQSHRN, VQSHRUN, VQRSHRN, VQRSHRUN). Signed-off-by: Christophe Lyon --- target-arm/translate.c | 28 ++-- 1 files changed, 18 insertions(+), 10 deletions(-) diff --git a/

[Qemu-devel] [PATCH 8/8] target-arm: Fix VQRSHL Neon instructions (signed/unsigned 64 bits and signed 32 bits variants).

From: Christophe Lyon The addition of the rounding constant could cause overflows. Signed-off-by: Christophe Lyon --- target-arm/neon_helper.c | 50 ++--- 1 files changed, 46 insertions(+), 4 deletions(-) diff --git a/target-arm/neon_helper.c b/target

[Qemu-devel] [PATCH 1/8] target-arm: Fixes for several shift instructions: VRSHL, VRSHR, VRSHRN, VSHLL, VRSRA.

From: Christophe Lyon For variants with rounding, fix cases where adding the rounding constant could overflow. For VSHLL, fix bit mask. Signed-off-by: Christophe Lyon --- target-arm/neon_helper.c | 61 ++--- target-arm/translate.c | 12 +++- 2

[Qemu-devel] [PATCH 7/8] target-arm: implement vsli.64, vsri.64

From: Christophe Lyon Signed-off-by: Christophe Lyon --- target-arm/translate.c | 11 ++- 1 files changed, 10 insertions(+), 1 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 61d4c4c..9150242 100644 --- a/target-arm/translate.c +++ b/target-arm/transla

[Qemu-devel] [PATCH v2 0/8] target-arm: Fix Neon instructions VQMOVUN VQRSHL VQRSHRN VQRSHRUN VQSHRN VQSHRUN VSLI VSRI

From: Christophe Lyon This patchset combines fixes from the Meego tree (Peter Maydell, Juha Riihimäki) and my own fixes such that ARM Neon instructions VQMOVUN VQRSHL VQRSHRN VQRSHRUN VQSHRN VQSHRUN VSLI VSRI now pass all my tests. Christophe Lyon (3): Fixes for several shift instructions: VRS

[Qemu-devel] [PATCH 6/8] target-arm: Fix Neon VQ(R)SHRN instructions.

From: Christophe Lyon Handle unsigned variant of VQ(R)SHRN instructions. Signed-off-by: Christophe Lyon --- target-arm/translate.c |8 ++-- 1 files changed, 6 insertions(+), 2 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index a614e34..61d4c4c 100644 --- a

[Qemu-devel] [PATCH 8/8] target-arm: Fix VQRSHL Neon instructions (signed/unsigned 64 bits and signed 32 bits variants).

From: Christophe Lyon The addition of the rounding constant could cause overflows. Signed-off-by: Christophe Lyon --- target-arm/neon_helper.c | 50 ++--- 1 files changed, 46 insertions(+), 4 deletions(-) diff --git a/target-arm/neon_helper.c b/target

[Qemu-devel] [PATCH 2/8] target-arm: Create and use neon_unarrow_sat* helpers

From: Christophe Lyon Fix VQMOVUN, improve VQSHRUN and VQRSHRUN. Signed-off-by: Peter Maydell Signed-off-by: Christophe Lyon --- target-arm/helpers.h |3 ++ target-arm/neon_helper.c | 63 ++ target-arm/translate.c | 43

[Qemu-devel] [PATCH 3/8] target-arm: VQRSHRN related changes

From: Christophe Lyon More fixes for VQSHRN and VQSHRUN. Signed-off-by: Peter Maydell Signed-off-by: Christophe Lyon --- target-arm/translate.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index cda5a73..3537698 10

[Qemu-devel] [PATCH 5/8] target-arm: fix neon vqrshl instruction

From: Christophe Lyon Signed-off-by: Juha Riihimäki Signed-off-by: Christophe Lyon --- target-arm/neon_helper.c | 21 ++--- 1 files changed, 18 insertions(+), 3 deletions(-) diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c index 71e3c74..3337c52 100644 --- a/

[Qemu-devel] [PATCH 6/8] target-arm: Fix Neon VQ(R)SHRN instructions.

From: Christophe Lyon Handle unsigned variant of VQ(R)SHRN instructions. Signed-off-by: Christophe Lyon --- target-arm/translate.c |8 ++-- 1 files changed, 6 insertions(+), 2 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 452cb71..3b14b8f 100644 --- a

[Qemu-devel] [PATCH 7/8] implement vsli.64, vsri.64

From: Christophe Lyon Signed-off-by: Peter Maydell Signed-off-by: Christophe Lyon --- target-arm/translate.c | 11 ++- 1 files changed, 10 insertions(+), 1 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 3b14b8f..984df08 100644 --- a/target-arm/transl

[Qemu-devel] [PATCH 1/8] target-arm: Fixes for several shift instructions: VRSHL, VRSHR, VRSHRN, VSHLL, VRSRA.

From: Christophe Lyon Handle corner cases where the addition of the rounding constant could cause overflows. Signed-off-by: Christophe Lyon --- target-arm/neon_helper.c | 61 ++--- target-arm/translate.c | 17 ++-- 2 files changed, 65 inser

[Qemu-devel] [PATCH 4/8] target-arm: fiddle decoding of 64 bit shift by imm and narrow

From: Christophe Lyon Tweak decoding of the shift-by-imm and narrow 64 bit insns (VSHRN, VRSHRN, VQSHRN, VQSHRUN, VQRSHRN, VQRSHRUN). Signed-off-by: Peter Maydell Signed-off-by: Christophe Lyon --- target-arm/translate.c | 28 ++-- 1 files changed, 18 insertions(+),

[Qemu-devel] [PATCH 0/8] target-arm: Fix Neon instructions VQMOVUN VQRSHL VQRSHRN VQRSHRUN VQSHRN VQSHRUN VSLI VSRI

From: Christophe Lyon This patchset combines fixes from the Meego tree (Peter Maydell, Juha Riihimäki) and my own fixes such that ARM Neon instructions VQMOVUN VQRSHL VQRSHRN VQRSHRUN VQSHRN VQSHRUN VSLI VSRI now pass all my tests. Christophe Lyon (3): Fixes for several shift instructions: VRS