Looks good Clement.
Reviewed-by: Fabien Chouteau
--
Fabien Chouteau
re :)
I add in copy Clément Chigot who is in charge of contribution to upstream
QEMU now.
I think we can put SMP Leon3 on top of the TODO list for contributions.
That being said, no promises on when it can be done :)
Regards,
--
Fabien Chouteau
port SMP Leon3/Leon4 in our fork of QEMU, and I
think all the required patches are contributed upstream.
--
Fabien Chouteau
On Wed, Mar 30, 2022 at 2:31 PM Frederic Konrad wrote:
> frederic.kon...@adacore.com and kon...@adacore.com will stop working
> starting
> 2022-04-01.
>
> Use my personal email instead.
>
>
Reviewed-by: Fabien Chouteau >
--
Fabien Chouteau
On Tue, Jun 2, 2020 at 7:26 PM Peter Maydell wrote:
> When there's multiple clusters, by default gdb will show you all the CPUs in
> the first
> cluster. Would the behaviour be better if the other cluster in
> this machine was the first (default) one?
For our use case yes it would be better. I w
Thank you Peter,
Le mar. 2 juin 2020 à 18:44, Peter Maydell a écrit :
>
> By default gdb does not attach to all clusters (this is IIRC something
> that can't
> be influenced on the QEMU end);
You mean I cannot have QEMU attach all clusters by default?
> are you explicitly asking it to attach to
Hi all,
(Luc, I am putting in copy because from the logs it looks like you
implemented the multiprocess support)
Using the sifive_u machine on qemu-system-riscv64 which has 2 clusters of 1
and 4 CPUs respectively, when I use the "info threads" command in GDB only
one thread is displayed.
This thr
Hello people,
On 15/10/2019 18:57, Philippe Mathieu-Daudé wrote:
> Hi Joshua,
>
> On 10/15/19 3:17 PM, Joshua Shaffer wrote:
>> Hello,
>>
>> I've been using the LEON3 port of qemu, and am wondering if anyone has
>> touched the networking setup for such since the thread here:
>> https://lists.rt
On 05/08/2019 18:10, Bin Meng wrote:
> Thank you for the suggestion. A patch was created for this:
> http://patchwork.ozlabs.org/patch/1142282/
Awesome, thank you Bin!
Hi Bin,
Thanks for this patch.
I know I am very late to the game but I have a comment here.
On 17/05/2019 17:51, Bin Meng wrote:
> +/* create PLIC hart topology configuration string */
> +plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) *
> smp_cpus;
> +plic_hart_confi
On 14/06/2019 14:10, Palmer Dabbelt wrote:
> Sorry this took a while to fix, I've just sent a patch to fix the memory leak.
Thank you for taking care of this!
rederic
Reviewed-by: Fabien Chouteau
On 19/04/2019 12:18, KONRAD Frederic wrote:
> This adds the AHB and APB plug and play devices.
> They are scanned during the linux boot to discover the various peripheral.
>
> Signed-off-by: KONRAD Frederic
Reviewed-by: Fabien Chouteau
On 19/04/2019 12:18, KONRAD Frederic wrote:
> Signed-off-by: KONRAD Frederic
Reviewed-by: Fabien Chouteau
Hi Palmer,
On 26/03/2019 09:58, Palmer Dabbelt wrote:
> Do you have anything that actually glues this to a machine so I can test it?
>
In this patch I do instantiate the device in sifive_e machine.
Regards,
Thanks Richard,
I sent a version 2.
On 22/03/2019 16:24, Richard Henderson wrote:
> On 3/22/19 4:22 AM, Fabien Chouteau wrote:
>> +/* Wrapper around tcg_gen_exit_tb that handles single stepping */
>> +static void exit_tb(DisasContext *ctx, TranslationBlock *tb, unsigned idx)
&
places where it was previously ignored such as jalr
and system branch instructions (ecall, mret, sret, etc.).
Signed-off-by: Fabien Chouteau
---
.../riscv/insn_trans/trans_privileged.inc.c | 8 ++---
target/riscv/insn_trans/trans_rvi.inc.c | 6 ++--
target/riscv/translate.c
places where it was previously ignored such as jalr
and system branch instructions (ecall, mret, sret, etc.).
Signed-off-by: Fabien Chouteau
---
.../riscv/insn_trans/trans_privileged.inc.c | 8 +++---
target/riscv/insn_trans/trans_rvi.inc.c | 6 ++--
target/riscv/translate.c
On 13/02/2019 01:06, Alistair Francis wrote:> Thanks for the patch!
You are welcome!
Let me know if there is something to improve.
Regads,
QEMU model of the GPIO device on the SiFive E300 series SOCs.
The pins are not used by a board definition yet, however this
implementation can already be used to trigger GPIO interrupts from the
software by configuring a pin as both output and input.
Signed-off-by: Fabien Chouteau
Hello Alistair,
On 07/02/2019 01:42, Alistair Francis wrote:>
> Can you describe what this fixes?
>
I encountered this problem when I tried to write 0x in timecmp.
With the integer overflow in QEMU, writing this value means that the QEMU timer
will be set in the past.
> Won't
Writing a high value in timecmp leads to an integer overflow. This patch
modifies the code to detect such case, and use the maximum integer value
as the next trigger for the timer.
Signed-off-by: Fabien Chouteau
---
hw/riscv/sifive_clint.c | 31 ++-
1 file changed
On 24/01/2018 20:51, Mark Cave-Ayland wrote:
> On 11/01/18 11:48, Fabien Chouteau wrote:
>
>> On 10/01/2018 21:43, Jean-Christophe Dubois wrote:
>>> With the LEON3 IRQ controller IRQs can be acknoledged 2 ways:
>>> * Explicitely by software writing to the CLEAR_OFF
On 15/01/2018 18:27, Jean-Christophe Dubois wrote:
> Le 2018-01-15 14:45, Jean-Christophe Dubois a écrit :
>>
>> Note: For now I am not so much interested in the AMBA discovery as the
>> type of software platform I am thinking about is embedded where the
>> hardware is well known ahead of time. Thi
On 15/01/2018 19:16, Mark Cave-Ayland wrote:
> On 11/01/18 11:48, Fabien Chouteau wrote:
>
>> On 10/01/2018 21:43, Jean-Christophe Dubois wrote:
>>> With the LEON3 IRQ controller IRQs can be acknoledged 2 ways:
>>> * Explicitely by software writing to the CLEAR_OFF
On 12/01/2018 15:10, Jean-Christophe Dubois wrote:
> Le 2018-01-12 11:55, Fabien Chouteau a écrit :
>> On 11/01/2018 13:35, Jean-Christophe Dubois wrote:
>>> Thanks Fabien,
>>>
>>> Now, as a side question, could you tell me which reference LEON3 pla
On 11/01/2018 13:35, Jean-Christophe Dubois wrote:
> Thanks Fabien,
>
> Now, as a side question, could you tell me which reference LEON3 platform is
> implemented by Qemu in leon3_generic?
>
I think it was the based on the FPGA version of Leon3 I was using at the
time. The name leon3_generic co
Jean-Christophe,
I tested the patch with our software and it works.
Reviewed-by: Fabien Chouteau
Hello Jean-Christophe,
I'm the original author of this patch and I add in copy my colleague
Frederic.
On 02/01/2018 12:13, Jean-Christophe DUBOIS wrote:
> I am wondering if the IRQMP code in hw/intc/grlib_irqmp.c is correct
> when it comes to acknowledging interrupts.
>
> With the actual code an
On 30/03/2017 21:30, Gabriele Galeotti wrote:
>
> Hi all.
> According to "GR712RC Dual-Core LEON3FT SPARC V8 Processor User’s Manual",
> "11.3 Registers", pg 87-88, Table 55 Timer control register, the IP
> "interrupt pending"
> bit:
>
> Interrupt Pending (IP): The core sets this bit to ‘1’ when
lasses despite being named
>> ETSEC_COMMON.
>>
>> This is a very simple cleanup to remove the _COMMON suffix from
>> the macros, and to use the TYPE_ETSEC macro when registering and
>> creating devices instead of hardcoding the "eTSEC" name.
>>
>> Cc: Alexander G
Hello QEMU folks,
AdaCore [1] is opening a QEMU and/or GDB engineer position. You guessed
it, we are looking for someone familiar with low-level programming,
assembly, CPU architectures, etc. On the QEMU side we work on the ARM,
PPC, SPARC and x86 architectures in "full" system emulation only. Pr
On 08/29/2016 09:19 PM, Liviu Ionescu wrote:
>
>> On 29 Aug 2016, at 20:59, Bill Paul wrote:
>>
>> I recently started tinkering with ChibiOS as part of a small personal
>> project ...
>
> I did most of the development for the µOS++/CMSIS++
> (http://micro-os-plus.github.io) on STM32F4DISCOVERY
On 08/05/2016 12:03 PM, Peter Maydell wrote:
> get_image_size() doesn't handle being passed a NULL pointer, so
> avoid doing that. Spotted by the clang ub sanitizer (which notices
> the attempt to pass NULL to open()).
>
Looks good.
Thanks Peter!
> Signed-off-by: Peter Maydell
> ---
> hw/spar
On 12/07/2015 02:07 PM, "Züpke, Alexander" wrote:
> Hi Fabien,
>
>> On December 7, 2015 at 1:56 PM Fabien Chouteau wrote:
>> On 12/07/2015 01:41 PM, "Züpke, Alexander" wrote:
>>>
>>> The check for the CASA feature on SPARC v8 is already in
On 12/07/2015 01:41 PM, "Züpke, Alexander" wrote:
>
> The check for the CASA feature on SPARC v8 is already in the existng code,
> just 3 lines above the second hunk in the patch:
>
Yes but you add a special case that allow casa from user space, this
special case is only available on LEON3 so th
Hello Alex,
Thanks for your patch! I have a couple of comments.
On 12/04/2015 04:01 PM, Alex Zuepke wrote:
> LEON3 allows the CASA instruction to be used from user space
> if the ASI is set to 0xa (user data).
>
> Signed-off-by: Alex Zuepke
> ---
> target-sparc/translate.c | 3 ++-
> 1 file c
On 07/02/2015 09:09 PM, Zavadovsky Yan wrote:
> I tested this patch on my 4-cores cpu.
> Debug and release builds both.
> Win32 and Win64 binaries both. (I used old Fedora 17-18 with SJLJ mingw-w64
> to crossbuild for Win64.)
> With default Qemu BIOS and with myself-builded OVMF(also debug and rel
On 07/01/2015 08:00 PM, Stefan Weil wrote:
> Am 01.07.2015 um 18:49 schrieb Paolo Bonzini:
>>
>> On 01/07/2015 17:48, Zavadovsky Yan wrote:
>>> Ping.
>> Stefan, are you merging this?
>>
>> Paolo
>
> I can do so, but as the current code seems to fix the problems
> with multi-processor systems, too
On 06/23/2015 07:07 PM, Stefan Weil wrote:
> Am 23.06.2015 um 12:46 schrieb Paolo Bonzini:
>> On 23/06/2015 12:30, Peter Maydell wrote:
>>> On 23 June 2015 at 10:55, Ян Завадовский wrote:
On Tue, Jun 23, 2015 at 9:02 AM, Stefan Weil wrote:
> We should add an URL to reliable documentation
On 06/23/2015 08:02 AM, Stefan Weil wrote:
> Am 22.06.2015 um 23:54 schrieb Zavadovsky Yan:
>> Calling SuspendThread() is not enough to suspend Win32 thread.
>> We need to call GetThreadContext() after SuspendThread()
>> to make sure that OS have really suspended target thread.
>> But GetThreadCont
Signed-off-by: Fabien Chouteau
---
hw/intc/openpic.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c
index 7d1f3b9..305377d 100644
--- a/hw/intc/openpic.c
+++ b/hw/intc/openpic.c
@@ -1013,7 +1013,7 @@ static void
From: Tristan Gingold
Signed-off-by: Fabien Chouteau
---
target-ppc/translate.c |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 88c18e3..2a78e99 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
il, and only when the caller
> fails to set up a pointer property, which is a programming error.
>
> Replace qdev_init() by qdev_init_nofail().
>
> Cc: Fabien Chouteau
> Signed-off-by: Markus Armbruster
Reviewed-by: Fabien Chouteau
Thanks Markus,
On 11/06/2014 06:18 PM, Alexander Graf wrote:
>
>
> On 06.11.14 17:23, Fabien Chouteau wrote:
>> In the previous patch, the registers were added to init_proc_G2LE
>> instead of init_proc_e300.
>>
>> Signed-off-by: Fabien Chouteau
>
> Thanks, applied to ppc-next (for 2.2).
>
Thank you,
In the previous patch, the registers were added to init_proc_G2LE
instead of init_proc_e300.
Signed-off-by: Fabien Chouteau
---
target-ppc/translate_init.c | 52 +--
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/target-ppc
On 10/28/2014 11:43 AM, Liviu Ionescu wrote:
> Hi!
>
> I'm currently maintaining the GNU ARM Eclipse plug-ins
> (http://gnuarmeclipse.livius.net/blog/), and I'm considering, for the
> mid-term future, adding a new debugging plug-in to run certain tests under un
> emulator, and the first choice
On 10/09/2014 05:32 PM, Jiri Gaisler wrote:
>
> I am a bit against the merge of AHB and APB initialization into
> the same function. A grlib system can have any number of AHB and APB
> buses, so there really should be a separate init routine per bus
> as in the original patch.
>
I understand you
From: Jiri Gaisler
AMBA plug&play is used by kernels to probe available devices (Timers,
UART, etc...). This is a static declaration of devices implemented in
QEMU. In the future, a more advanced version could compute those
information directly from the device tree.
Signed-off-by: Fa
On 10/08/2014 09:43 PM, Jiri Gaisler wrote:
> On 10/08/2014 05:38 PM, Andreas Färber wrote:
>> Hi,
>>
>> Am 08.10.2014 um 16:19 schrieb Fabien Chouteau:
>>> From: Jiri Gaisler
>>>
>>> AMBA plug&play is used by kernels to probe available
On 10/08/2014 05:38 PM, Andreas Färber wrote:
> Hi,
>
Hi Andreas,
> Am 08.10.2014 um 16:19 schrieb Fabien Chouteau:
>> From: Jiri Gaisler
>>
>> +
>> +#define TYPE_GRLIB_APB_PNP "grlib,apbpnp"
>
> If you move the two TYPE_* constants to grlib
From: Jiri Gaisler
AMBA plug&play is used by kernels to probe available devices (Timers,
UART, etc...). This is a static declaration of devices implemented in
QEMU. In the future, a more advanced version could compute those
information directly from the device tree.
Signed-off-by: Fa
On 04/02/2014 04:52 PM, Alexander Graf wrote:
>
> On 02.04.2014, at 16:49, Fabien Chouteau wrote:
>
>> IRQ are lowered when ievent bit is cleared, so irq_pulse makes no sense
>> here...
>>
>> Signed-off-by: Fabien Chouteau
>
> Thanks, applied to pp
IRQ are lowered when ievent bit is cleared, so irq_pulse makes no sense
here...
Signed-off-by: Fabien Chouteau
---
hw/net/fsl_etsec/rings.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/net/fsl_etsec/rings.c b/hw/net/fsl_etsec/rings.c
index e36cfbe..d4a494f 100644
On 03/17/2014 07:26 PM, Eduardo Habkost wrote:
> We had an unwritten rule about declarations having to be at beginning of
> blocks. Make it a written rule.
>
Hello Eduardo,
Is it possible to check this rule in script/checkpatch.pl? (or is it already?)
Regards,
On 03/19/2014 11:51 AM, Stefan Hajnoczi wrote:
> On Tue, Mar 18, 2014 at 9:08 PM, Daniel Smith
> wrote:
>> I would like to propose a new idea for GSOC 2014 that I want to implement
>> for QEMU. Since QEMU are widely used for binary analysis, dynamic binary
>> code instrumentation and so on.
>> Ca
On 03/19/2014 03:17 PM, Alexey Kardashevskiy wrote:
> This adds printing of all SPR registers registered for a CPU.
>
> This removes "SPR_" prefix from SPR name to reduce the output.
>
> Signed-off-by: Alexey Kardashevskiy
> ---
>
Very useful patch Alexey,
I have few comments:
> +for (i
On 03/14/2014 06:35 PM, Michael Tokarev wrote:
> 14.03.2014 20:51, Fabien Chouteau wrote:
>
>> hw/net/fsl_etsec/rings.c |4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/net/fsl_etsec/rings.c b/hw/net/fsl_etsec/rings.c
>> in
Signed-off-by: Fabien Chouteau
---
hw/net/fsl_etsec/rings.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/net/fsl_etsec/rings.c b/hw/net/fsl_etsec/rings.c
index 7760272..31e6f58 100644
--- a/hw/net/fsl_etsec/rings.c
+++ b/hw/net/fsl_etsec/rings.c
@@ -592,7 +592,7
On 03/14/2014 12:23 PM, Paolo Bonzini wrote:
> Il 07/03/2014 00:33, Alexander Graf ha scritto:
>> +if (bd.flags | BD_INTERRUPT) {
>> +/* Set RXFx */
>> +etsec->regs[RSTAT].value |= 1 << (7 - ring_nbr);
>> +
>> +/* Set IEVEN
On 03/09/2014 09:02 AM, Paolo Bonzini wrote:
> Il 07/03/2014 00:33, Alexander Graf ha scritto:
>> From: Fabien Chouteau
>>
>> This implementation doesn't include ring priority, TCP/IP Off-Load, QoS.
>>
>> Signed-off-by: Fabien Chouteau
>> Signed-off-
On 03/12/2014 11:22 AM, Sebastian Huber wrote:
> Hello Fabien,
>
> On 2014-03-12 11:17, Fabien Chouteau wrote:
>> Thanks Sebastian, I will try my first pull request :)
>
> I think Mark already did this
>
> http://lists.gnu.org/archive/html/qemu-devel/2014-03/msg02325.
Thanks Sebastian, I will try my first pull request :)
Thanks Sebastian, I will try my first pull request ;)
On 03/02/2014 07:11 PM, Andreas Färber wrote:
> Hi Fabien,
>
> Am 14.02.2014 18:27, schrieb Fabien Chouteau:
>> On 02/14/2014 04:33 PM, Andreas Färber wrote:
>>> As for the other one you'll need to sort our who sends a pull if Blue
>>> doesn't resurface
On 02/28/2014 10:33 AM, Mark Cave-Ayland wrote:
> On 26/02/14 17:25, Peter Maydell wrote:
>
>> On 26 February 2014 16:59, Fabien Chouteau wrote:
>>> On 02/26/2014 08:56 AM, Sebastian Huber wrote:
>>>> Hello,
>>>>
>>>> exists there s
On 02/26/2014 08:56 AM, Sebastian Huber wrote:
> Hello,
>
> exists there someone who is able to commit this?
>
I'm sorry Sebastian, as you probably understood the SPARC maintainer is
missing which makes commit process more difficult that it used to be...
Peter, as discussed in a previous mail,
On 02/14/2014 04:33 PM, Andreas Färber wrote:
> As for the other one you'll need to sort our who sends a pull if Blue
> doesn't resurface -
I didn't see any message about this. Does anyone know why he's not around?
> I note that qemu-trivial is not CC'ed here and the
> patch probably isn't anyway
On 02/14/2014 09:41 AM, Sebastian Huber wrote:
> On 2014-02-13 16:50, Fabien Chouteau wrote:
>>
>> This ASI 0x80 is really defined nowhere in Leon3 not even in the sources :)
>> Maybe there's a bug in binutils... Did you try to run this program on a real
>> board?
On 02/13/2014 03:55 PM, Fabien Chouteau wrote:
> On 02/13/2014 02:00 PM, Sebastian Huber wrote:
>> On 2014-02-13 13:01, Fabien Chouteau wrote:
>>> On 02/13/2014 10:52 AM, Sebastian Huber wrote:
>>>> The LEON3 processor has support for the CASA instruction which is
&g
On 02/13/2014 02:00 PM, Sebastian Huber wrote:
> On 2014-02-13 13:01, Fabien Chouteau wrote:
>> On 02/13/2014 10:52 AM, Sebastian Huber wrote:
>>> The LEON3 processor has support for the CASA instruction which is
>>> normally only available for SPARC V9 processors. Bi
On 02/13/2014 10:52 AM, Sebastian Huber wrote:
> The LEON3 processor has support for the CASA instruction which is
> normally only available for SPARC V9 processors. Binutils 2.24
> and GCC 4.9 will support this instruction for LEON3. GCC uses it to
> generate C11 atomic operations.
>
> The CAS
On 02/13/2014 10:16 AM, Sebastian Huber wrote:
> The GPTIMER uses 32-bit registers. Use a 64-bit operation to get the
> ptimer count, otherwise we end up with a count of 0 for GPTIMER counter
> values of 0x.
Looks good, thanks Sebastian.
Reviewed-by: Fabien Chouteau
> ---
On 12/10/2013 06:20 PM, Alexander Graf wrote:
> On 10.12.2013, at 18:15, Fabien Chouteau wrote:
>> Unfortunately I won't have time to fix before January.
>
Hello Alex,
I fixed the compiler errors and I will send version 3 in few minutes.
> That works for me. While at i
On 11/28/2013 10:55 AM, Sebastian Huber wrote:
> Hello,
>
> On 2013-11-26 15:04, Sebastian Huber wrote:
>> The LEON3 processor has support for the CASA instruction which is
>> normally only available for SPARC V9 processors. Binutils 2.24
>> and GCC 4.9 will support this instruction for LEON3. G
On 02/05/2014 10:21 AM, Fabien Chouteau wrote:
> On 11/26/2013 03:04 PM, Sebastian Huber wrote:
>> The LEON3 processor has support for the CASA instruction which is
>> normally only available for SPARC V9 processors. Binutils 2.24
>> and GCC 4.9 will support this instruction
On 02/05/2014 10:02 AM, Fabien Chouteau wrote:
> On 02/03/2014 10:18 AM, Sebastian Huber wrote:
>> A lot of real world LEON3 systems are shipped with the GRMON boot
>> loader. This boot loader initializes the stack pointer with the end of
>> RAM address. The application c
.
The patch looks good. I can't really test it but I assume you did.
Thank you Sebastian.
Reviewed-by: Fabien Chouteau
> ---
> target-sparc/cpu.c |3 +-
> target-sparc/cpu.h |4 ++-
> target-sparc/helper.h |4 ++-
> t
nt.
>
Looks good, thank you Sebastian.
Reviewed-by: Fabien Chouteau
> Signed-off-by: Sebastian Huber
> ---
> hw/sparc/leon3.c |3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
> index c583c3d..c16
On 12/10/2013 09:09 AM, Sebastian Huber wrote:
> Hello,
>
> would someone please have a look at this.
>
I'm sorry Sebastian I don't have time to look at it. Maybe in January...
On 12/10/2013 01:48 PM, Alexander Graf wrote:
>
> On 10.12.2013, at 12:59, Alexey Kardashevskiy wrote:
>
>> On 12/10/2013 02:15 AM, Alexander Graf wrote:
>>>
>>> On 22.07.2013, at 18:00, Fabien Chouteau wrote:
>>>
>>>> This implementati
On 11/25/2013 03:22 PM, Sebastian Huber wrote:
> The env->pc is not necessarily up-to-date in the helper function. Use
> the program counter of the disassembly context instead.
>
Looks good. Thanks Sebastian.
Reviewed-by: Fabien Chouteau
> Signed-off-by: Sebastian Huber
On 10/07/2013 03:29 PM, Peter Maydell wrote:
> On 7 October 2013 22:06, Fabien Chouteau wrote:
>> On 10/07/2013 01:45 PM, Peter Maydell wrote:
>>> On 7 October 2013 19:11, Fabien Chouteau wrote:
>>>> On 10/04/2013 07:49 PM, Peter Maydell wrote:
>>>>
On 10/07/2013 01:45 PM, Peter Maydell wrote:
> On 7 October 2013 19:11, Fabien Chouteau wrote:
>> On 10/04/2013 07:49 PM, Peter Maydell wrote:
>>> On 5 October 2013 01:57, Fabien Chouteau wrote:
>>>>> @@ -47,7 +48,9 @@
>>>> #include "hw/
},
>
> These fields are all 32 bits, not target_long,
> so they need to be marked as MD_I32. (If you build an
> aarch64-softmmu target then it will have target_long be
> 64 bit but still support all the 32 bit CPUs, so it does
> make a difference.)
>
OK, I'll mark them MD_I32.
--
Fabien Chouteau
On 10/04/2013 07:49 PM, Peter Maydell wrote:
> On 5 October 2013 01:57, Fabien Chouteau wrote:
> >> @@ -47,7 +48,9 @@
>> #include "hw/xen/xen.h"
>> #include "hw/i386/apic_internal.h"
>> #endif
>> +#include "monitor/monitor_def.h"
Everything has been moved to cpu specific directories (SPARC, PPC,
i386).
Signed-off-by: Fabien Chouteau
---
include/monitor/monitor_def.h | 18 ++
include/qemu/typedefs.h |1 +
include/qom/cpu.h |3 +
monitor.c | 396
Another attempt. I think this is the best I can do to fulfil all comments.
Fabien Chouteau (4):
Fix coding style
Improve Monitor disas with symbol lookup
Refactoring MonitorDef array
Add ARM registers definitions for Monitor commands
disas.c | 19 +-
include
Signed-off-by: Fabien Chouteau
---
disas.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/disas.c b/disas.c
index 32407de..c83bf5b 100644
--- a/disas.c
+++ b/disas.c
@@ -507,7 +507,15 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#endif
for (i
Signed-off-by: Fabien Chouteau
---
disas.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/disas.c b/disas.c
index 0203ef2..32407de 100644
--- a/disas.c
+++ b/disas.c
@@ -506,12 +506,13 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
return;
#endif
Signed-off-by: Fabien Chouteau
---
target-arm/Makefile.objs |2 +-
target-arm/cpu.c |7 +++
target-arm/monitor.c | 40
3 files changed, 48 insertions(+), 1 deletion(-)
create mode 100644 target-arm/monitor.c
diff --git a
e
name ‘QEMUIOVector’
Maybe MonitorDef can be in a specific file include/monitor/monitordef.h?
included by monitor.c target-*/monitor.c and target-*/cpu.c
--
Fabien Chouteau
On 10/01/2013 04:00 AM, Richard Henderson wrote:
> On 09/30/2013 08:57 AM, Fabien Chouteau wrote:
>> +extern const MonitorDef arch_monitor_defs[];
>
> This is supplied by target-foo/monitor.c, right?
> Why in the world is it declared in generic code?
>
Yes, why?
> Espe
On 10/01/2013 03:08 AM, Peter Maydell wrote:
> On 1 October 2013 00:57, Fabien Chouteau wrote:
>
>> +#define MD_I64 0
>> +#define MD_I32 1
>
>> -#define MD_TLONG 0
>> -#define MD_I32 1
>
>> -{ "eax", offsetof(CPUX86State, regs[
Signed-off-by: Fabien Chouteau
---
disas.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/disas.c b/disas.c
index 0203ef2..32407de 100644
--- a/disas.c
+++ b/disas.c
@@ -506,12 +506,13 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
return;
#endif
I finaly managed to move the target depend code in 'target-*/'.
Fabien Chouteau (4):
Fix coding style
Improve Monitor disas with symbol lookup
Refactoring MonitorDef array
Add ARM registers definitions for Monitor commands
disas.c | 19 ++-
inclu
Signed-off-by: Fabien Chouteau
---
disas.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/disas.c b/disas.c
index 32407de..c83bf5b 100644
--- a/disas.c
+++ b/disas.c
@@ -507,7 +507,15 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
#endif
for (i
Everything has been moved to cpu specific directories (SPARC, PPC,
i386).
Signed-off-by: Fabien Chouteau
---
include/monitor/monitor.h | 16 ++
include/qemu/typedefs.h |1 +
include/qom/cpu.h |3 +
monitor.c | 399
Signed-off-by: Fabien Chouteau
---
target-arm/Makefile.objs |2 +-
target-arm/cpu.c |5 +
target-arm/monitor.c | 40
3 files changed, 46 insertions(+), 1 deletion(-)
create mode 100644 target-arm/monitor.c
diff --git a/target
On 09/26/2013 02:05 AM, Peter Maydell wrote:
> On 26 September 2013 01:29, Fabien Chouteau wrote:
>> On 09/25/2013 05:51 PM, Peter Maydell wrote:
>>> On 26 September 2013 00:38, Fabien Chouteau wrote:
>>> It doesn't matter very much, but monitor.h seems the obvio
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