On 2024/12/6 11:36, Richard Henderson wrote:
On 12/5/24 21:24, LIU Zhiwei wrote:
For riscv host, it will set dec->cfg to zero. Thus we shuld guard
the dec->cfg deference for riscv host disassemble.
And in general, we should only use dec->cfg for target in three cases:
1) For not incompatible
On 12/5/24 21:24, LIU Zhiwei wrote:
For riscv host, it will set dec->cfg to zero. Thus we shuld guard
the dec->cfg deference for riscv host disassemble.
And in general, we should only use dec->cfg for target in three cases:
1) For not incompatible encodings, such as zcmp/zcmt/zfinx.
2) For mayb
Hey Alistair,
On 2024/12/4 10:45, Alistair Francis wrote:
On Thu, Oct 17, 2024 at 2:39 PM LIU Zhiwei wrote:
On 2024/10/17 11:52, Richard Henderson wrote:
On 10/16/24 19:57, LIU Zhiwei wrote:
Hi Richard,
On 2024/10/17 02:38, Richard Henderson wrote:
2595: if (dec->cfg->ext_zcmop) {
2690:
I needed to set the registers prior to boot up to mimic what uboot
would do prior to loading a binary. This adds a generic option of reg
to the loader command, it uses the existing gcc commands for setting
register values.
I'm sorry I couldn't figure out how to work the git send-email
properly.
For riscv host, it will set dec->cfg to zero. Thus we shuld guard
the dec->cfg deference for riscv host disassemble.
And in general, we should only use dec->cfg for target in three cases:
1) For not incompatible encodings, such as zcmp/zcmt/zfinx.
2) For maybe-ops encodings, they are better to be
Allow the helpers to receive CPUARMState* directly
instead of via void*.
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 12 ++--
target/arm/tcg/helper-a64.h | 2 +-
target/arm/tcg/vec_helper.c | 21 +++--
3 files changed, 14 insertions(+), 21 deletion
Pass float_status not env to match other functions.
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 4 ++--
target/arm/tcg/translate-a64.c | 15 ++-
target/arm/tcg/translate-vfp.c | 4 ++--
target/arm/vfp_helper.c| 8
4 files changed, 18 inse
Pass float_status not env to match other functions.
Signed-off-by: Richard Henderson
---
target/arm/tcg/helper-a64.h| 2 +-
target/arm/tcg/helper-a64.c| 3 +--
target/arm/tcg/translate-a64.c | 2 +-
3 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/target/arm/tcg/helper-a64.
Hi Peter,
You probably have something like this in your AFP tree already,
but while I'm sending all of the other float_status patches, I
thought I might as well send these two.
Based-on: 20241206031224.78525-1-richard.hender...@linaro.org
(target/arm: Helper type cleanups)
r~
Richard Henderson
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 284 ++--
target/arm/tcg/helper-a64.h | 18 +--
target/arm/tcg/helper-sve.h | 12 +-
target/arm/tcg/vec_helper.c | 60
4 files changed, 183 insertions(+), 191 deletions(-)
diff --git a/
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 56 ++--
target/arm/tcg/neon_helper.c | 6 ++--
2 files changed, 30 insertions(+), 32 deletions(-)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 61b135a707..d4c8ff40a1 100644
--- a
Softfloat has native support for round-to-odd. Use it.
Signed-off-by: Richard Henderson
---
target/arm/tcg/helper-a64.c | 18 --
1 file changed, 4 insertions(+), 14 deletions(-)
diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c
index 1daf3f27c0..ff48bac1a8
Signed-off-by: Richard Henderson
---
target/arm/tcg/helper-sme.h | 4 ++--
target/arm/tcg/sme_helper.c | 8
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/target/arm/tcg/helper-sme.h b/target/arm/tcg/helper-sme.h
index 59ecaa1548..858d69188f 100644
--- a/target/arm/tcg/he
Signed-off-by: Richard Henderson
---
target/arm/tcg/helper-sve.h | 414 ++--
target/arm/tcg/sve_helper.c | 96 +
2 files changed, 258 insertions(+), 252 deletions(-)
diff --git a/target/arm/tcg/helper-sve.h b/target/arm/tcg/helper-sve.h
index 1fdfb84d4c..
This allows us to declare that the helper requires
a float_status pointer and not a generic void pointer.
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 4
1 file changed, 4 insertions(+)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 9919b1367b..cb722c491b 100644
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 268
target/arm/vfp_helper.c | 120 --
2 files changed, 186 insertions(+), 202 deletions(-)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index cb722c491b..9bfb5048c4
Add macros such that "fpst" can be used with DEF_HELPER to
indicate float_status* instead of "ptr" for void*.
In addition, fix a few uses of "ptr" that should be "env".
r~
Richard Henderson (9):
target/arm: Introduce fpst alias for helper.h
target/arm: Convert vfp_helper.c to fpst alias
tar
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 14 +++---
target/arm/tcg/neon_helper.c | 21 +++--
2 files changed, 14 insertions(+), 21 deletions(-)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 3e78b90658..db8b8dc748 100644
--- a/targ
Signed-off-by: Richard Henderson
---
target/arm/tcg/helper-a64.h | 94 +--
target/arm/tcg/helper-a64.c | 98 +
2 files changed, 80 insertions(+), 112 deletions(-)
diff --git a/target/arm/tcg/helper-a64.h b/target/arm/tcg/helper-
Il lun 25 nov 2024, 08:46 Roman Penyaev ha scritto:
> Hi Paolo,
>
> Do I need to resend the fixed version, or if it is queued to what
> exact repo or branch? I'm a bit confused. Thanks.
>
Hi, sorry for the late reply—I was not sending it out for inclusion because
we're in release freeze, but the
This is a proposal for a potential future TDX Module feature to assist
QEMU/KVM in configuring CPUID leafs for TD guests. It is only in the
idea stage and not currently being implemented. We are looking for
comments on the suitability for QEMU/KVM.
# Background
To correctly virtualize CPUID f
On 12/5/24 19:52, Richard Henderson wrote:
On 12/5/24 15:12, Peter Maydell wrote:
@@ -8295,15 +8356,6 @@ static void handle_fp_1src_half(DisasContext *s, int opcode, int
rd, int rn)
TCGv_i32 tcg_res = tcg_temp_new_i32();
switch (opcode) {
- case 0x0: /* FMOV */
- tcg_gen_
Thanks, Philippe,
lduw_be_p() return a Big-Endian value,
But, as the register description,
the byte stored in bits [23:16] is compared against the byte in the received
frame from the selected offset+0 and
the byte stored in bits [31:24] is compared against the byte in the received
frame from t
On 12/5/24 14:44, Peter Maydell wrote:
On Sun, 1 Dec 2024 at 15:11, Richard Henderson
wrote:
Pass fpstatus not env, like most other fp helpers.
Signed-off-by: Richard Henderson
I have a patch pretty similar to this in my work-in-progress
FEAT_AFP series, because there I wanted it as part o
On 12/5/24 15:12, Peter Maydell wrote:
@@ -8295,15 +8356,6 @@ static void handle_fp_1src_half(DisasContext *s, int
opcode, int rd, int rn)
TCGv_i32 tcg_res = tcg_temp_new_i32();
switch (opcode) {
-case 0x0: /* FMOV */
-tcg_gen_mov_i32(tcg_res, tcg_op);
-break;
-
On 12/5/24 15:27, Peter Maydell wrote:
On Thu, 5 Dec 2024 at 21:21, Peter Maydell wrote:
On Sun, 1 Dec 2024 at 15:17, Richard Henderson
wrote:
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 287 +
target/arm/tcg/a64.decode |
It's not straightforward to see why src QEMU needs to sync multifd during
setup() phase. After all, there's no page queued at that point.
For old QEMUs, there's a solid reason: EOS requires it to work. While it's
clueless on the new QEMUs which do not take EOS message as sync requests.
One will
On 12/5/24 17:13, Philippe Mathieu-Daudé wrote:
In preparation of heterogeneous emulation where cores with
different endianness can run concurrently, we need to remove
the tswap() calls -- which use a fixed per-binary endianness.
Get the endianness of the UHI CPU accessed using
mips_env_is_bigen
On Fri, Dec 06, 2024 at 02:19:06AM +0300, Daniil Tatianin wrote:
> Currently, passing mem-lock=on to QEMU causes memory usage to grow by
> huge amounts:
>
> no memlock:
> $ qemu-system-x86_64 -overcommit mem-lock=off
> $ ps -p $(pidof ./qemu-system-x86_64) -o rss=
> 45652
>
> $ ./
CI: https://gitlab.com/peterx/qemu/-/pipelines/1575970314
Comparing to v1, this series v2 now contains some patches that may be
helpful for either VFIO or postcopy integration on top of multifd.
For VFIO, only patch 1 & 2 are relevant. This is the only part that can be
compared to v1, where I re
Teach multifd_send_sync_main() to sync with threads only.
We already have such requests, which is when mapped-ram is enabled with
multifd. In that case, no SYNC messages will be pushed to the stream when
multifd syncs the sender threads because there's no destination threads
waiting for that. Th
The src flush condition check is over complicated, and it's getting more
out of control if postcopy will be involved.
In general, we have two modes to do the sync: legacy or modern ways.
Legacy uses per-section flush, modern uses per-round flush.
Mapped-ram always uses the modern, which is per-ro
Multifd never worked with postcopy, at least yet so far.
Remove the sync processing there, because it's confusing, and they should
never appear. Now if RAM_SAVE_FLAG_MULTIFD_FLUSH is observed, we fail hard
instead of trying to invoke multifd code.
Signed-off-by: Peter Xu
---
migration/ram.c |
RAM_SAVE_FLAG_MULTIFD_FLUSH message should always be correlated to a sync
request on src. Unify such message into one place, and conditionally send
the message only if necessary.
Signed-off-by: Peter Xu
---
migration/multifd.h| 2 +-
migration/multifd-nocomp.c | 27
Firstly, we're going to use the multifd flag soon in multifd code, so ram.c
isn't gonna work.
Secondly, we have a separate RDMA flag dangling around, which is definitely
not obvious. There's one comment that helps, but not too much.
We should just put it altogether, so nothing will get overlooke
Commit 637280aeb2 ("migration/multifd: Avoid the final FLUSH in
complete()") removed the FLUSH operation on complete() which should avoid
one global sync on destination side, because it's not needed.
However that commit overlooked multifd_ram_flush_and_sync() part of things,
as that's always used
This adds virtualization mode (V bit) as bit(2) of register `priv`
per RiscV debug spec v1.0.0-rc3. Checked with gdb-multiarch v12.1.
Note that GDB may display `INVALID` tag for the value when V bit
is set, this doesn't affect accessing to the bit.
Signed-off-by: Yanfeng Liu
---
target/riscv/gd
See
https://github.com/takeshibaconsuzuki/qemu/blob/vhdx_4k_rw/tests/qemu-iotests/sample_images/4k.vhdx.bz2
for binary file.
Signed-off-by: Takeshi Suzuki
---
tests/qemu-iotests/315 | 65 +++
tests/qemu-iotests/315.out | 20 ++
tests/
Signed-off-by: Takeshi Suzuki
---
block/vhdx.c | 76 +++-
1 file changed, 70 insertions(+), 6 deletions(-)
diff --git a/block/vhdx.c b/block/vhdx.c
index 5aa1a13506..495ddc2815 100644
--- a/block/vhdx.c
+++ b/block/vhdx.c
@@ -824,8 +824,8 @@ vhdx_p
Show logical sector size as follows:
```
Format specific information:
logical sector size: 4096
```
Signed-off-by: Takeshi Suzuki
---
block/vhdx.c | 21 +
qapi/block-core.json | 27 +--
2 files changed, 46 insertions(+), 2 deletions(-)
di
The first patch adds support to read and write VHDX images with 4k logical
sector sizes. This is done by internally converting bdrv sectors of size 512 to
logical sectors. VHDX image creation with 4k logical sector size is NOT
implemented.
The second patch adds an iotest which reads and writes to
On 12/5/24 12:30, Paolo Bonzini wrote:
On 12/5/24 19:15, Richard Henderson wrote:
On 12/5/24 00:07, Zhao Liu wrote:
The MemTxAttrs structure is composed of bitfield members, and bindgen is
unable to generate an equivalent macro definition for
MEMTXATTRS_UNSPECIFIED.
I'm happy to move away fro
In preparation of heterogeneous emulation where cores with
different endianness can run concurrently, we need to remove
the tswap() calls -- which use a fixed per-binary endianness.
Get the endianness of the CPU accessed using the libisa
xtensa_isa_is_big_endian() call and replace the tswap() call
Xtensa internal fields are opaque, only accessible by
the Xtensa libisa. Implement xtensa_isa_is_big_endian()
to get vCPU endianness. This should be implemented in
libisa, not QEMU, but I couldn't figure out where to
contribute this.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/xtensa/xt
The first patch modifying Xtensa libisa has already been
posted in
https://lore.kernel.org/qemu-devel/20241204202602.58083-1-phi...@linaro.org/
Philippe Mathieu-Daudé (2):
target/xtensa: Implement xtensa_isa_is_big_endian()
target/xtensa: Remove tswap() calls in semihosting simcall() helper
In preparation of heterogeneous emulation where cores with
different endianness can run concurrently, we need to remove
the tswap() calls -- which use a fixed per-binary endianness.
Get the endianness of the UHI CPU accessed using
mips_env_is_bigendian() and replace the tswap() calls
by bswap() on
This will be used in the following commits to make it possible to only
lock memory on fault instead of right away.
Signed-off-by: Daniil Tatianin
---
include/sysemu/os-posix.h | 2 +-
include/sysemu/os-win32.h | 3 ++-
migration/postcopy-ram.c | 2 +-
os-posix.c| 10 -
Locking the memory without MCL_ONFAULT instantly prefaults any mmaped
anonymous memory with a write-fault, which introduces a lot of extra
overhead in terms of memory usage when all you want to do is to prevent
kcompactd from migrating and compacting QEMU pages. Add an option to
only lock pages laz
Currently, passing mem-lock=on to QEMU causes memory usage to grow by
huge amounts:
no memlock:
$ qemu-system-x86_64 -overcommit mem-lock=off
$ ps -p $(pidof ./qemu-system-x86_64) -o rss=
45652
$ ./qemu-system-x86_64 -overcommit mem-lock=off -enable-kvm
$ ps -p $(pidof ./qemu-
On Tue, 2024-12-03 at 11:51 +0100, Gerd Hoffmann wrote:
>
> The only case I'm aware of where the byte order is actually switched is
> booting a ppc64le guest in a pseries machine, where the opal firmware
> runs in bigendian mode and the linux kernel runs in little endian mode.
>
> So here the cha
On 12/5/24 13:50, Julian Ganz wrote:
Hi Pierrick,
December 5, 2024 at 6:56 PM, "Pierrick Bouvier" wrote:
On 12/5/24 04:40, Julian Ganz wrote:
Hi Pierrick,
December 4, 2024 at 11:41 PM, "Pierrick Bouvier" wrote:
Does it mean that information returned should be dependent of type of event, a
On Mon, Dec 02, 2024 at 12:37:19PM +0530, Prasad Pandit wrote:
> Hello Peter,
>
> On Fri, 29 Nov 2024 at 22:16, Peter Xu wrote:
> > I saw that there's still discussion in the previous version, while this
> > cover letter doesn't mention why it was ignored. Especially, at least to
> > me, what Fa
On 12/5/24 13:22, Julian Ganz wrote:
Hi Pierrick,
December 5, 2024 at 6:30 PM, "Pierrick Bouvier" wrote:
On 12/5/24 05:10, Julian Ganz wrote:
December 5, 2024 at 12:33 AM, "Pierrick Bouvier" wrote:
Trap target PC mismatch
Expected: 23faf3a80
Encountered: 23faf3a84
From what I underst
On Wed, Nov 27, 2024 at 11:12:09AM -0300, Fabiano Rosas wrote:
> Prasad Pandit writes:
>
> > On Wed, 27 Nov 2024 at 02:49, Fabiano Rosas wrote:
> >> This patch should be just the actual refactoring on top of master, with
> >> no mention to postcopy at all.
> >
> > * Okay. We'll have to ensure th
This series extends our documentation with new pages to help developers
onboarding on QEMU. It focuses on providing a big picture of QEMU (to a
modest extend).
As such, it was written to be simple, short, easy to understand, and pointing to
more details. It provides another way to dive into detail
On 25/11/24 20:56, Jean-Philippe Brucker wrote:
Create a measurement log describing operations performed by QEMU to
initialize the guest, and load it into guest memory above the DTB.
Cc: Stefan Berger
Signed-off-by: Jean-Philippe Brucker
---
v2->v3: New
---
include/hw/arm/boot.h | 3 +++
i
Reviewed-by: Thomas Huth
Signed-off-by: Pierrick Bouvier
---
docs/devel/submitting-a-patch.rst | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/docs/devel/submitting-a-patch.rst
b/docs/devel/submitting-a-patch.rst
index 10b062eec26..03b2ac298aa 100644
--- a/docs/devel/sub
Signed-off-by: Pierrick Bouvier
---
docs/devel/submitting-a-patch.rst | 19 +++
1 file changed, 19 insertions(+)
diff --git a/docs/devel/submitting-a-patch.rst
b/docs/devel/submitting-a-patch.rst
index 03b2ac298aa..f8b7fc59544 100644
--- a/docs/devel/submitting-a-patch.rst
+++ b
On 25/11/24 20:56, Jean-Philippe Brucker wrote:
Provide a library allowing the VMM to create an event log that describes
what is loaded into memory. During remote attestation in confidential
computing this helps an independent verifier reconstruct the initial
measurements of a VM, which contain t
MacOS and Linux are straightforward, but Windows needs a bit more
details.
Signed-off-by: Pierrick Bouvier
---
docs/about/build-platforms.rst | 4 +-
docs/devel/build-environment.rst | 118 +++
docs/devel/index-build.rst | 1 +
3 files changed, 122 inserti
Present the various parts of QEMU and organization of codebase.
Signed-off-by: Pierrick Bouvier
---
docs/about/emulation.rst | 2 +
docs/devel/codebase.rst| 218 +
docs/devel/decodetree.rst | 2 +
docs/devel/ebpf_rss.rst
Signed-off-by: Pierrick Bouvier
---
docs/devel/control-flow-integrity.rst | 2 +
docs/devel/multi-thread-tcg.rst | 2 +
docs/glossary.rst | 280 ++
docs/index.rst| 1 +
docs/system/arm/virt.rst | 2 +
d
Signed-off-by: Pierrick Bouvier
---
docs/devel/submitting-a-patch.rst | 10 ++
1 file changed, 10 insertions(+)
diff --git a/docs/devel/submitting-a-patch.rst
b/docs/devel/submitting-a-patch.rst
index f8b7fc59544..99f14d4b44d 100644
--- a/docs/devel/submitting-a-patch.rst
+++ b/docs/dev
On Thu, Dec 05, 2024 at 05:12:47PM -0500, Peter Xu wrote:
> In case if I missed it, a runnable patch would work to clarify.
Ohhh no need now, I see what you meant.
But then you'll really need to comment p->sem, with something like:
-/* sem where to wait for more work */
+/* sem where to
On 25/11/24 20:56, Jean-Philippe Brucker wrote:
In order to write an event log, the ROM load notification handler needs
two more fields.
IMHO it makes more sense to squash that in the "hw/core/loader:
Add ROM loader notifier" patch introducing that API.
Signed-off-by: Jean-Philippe Brucker
Hi Pierrick,
December 5, 2024 at 10:50 PM, "Julian Ganz" wrote:
> December 5, 2024 at 6:56 PM, "Pierrick Bouvier" wrote:
> > Let's try to move forward, and solve the problems we have with from_pc. The
> > testing part can be solved already (as explained in a previous message). In
> > which cases
On Thu, Dec 05, 2024 at 06:50:23PM -0300, Fabiano Rosas wrote:
> I think I remember now, what's needed is to release p->sem and wait on
> p->sem_sync (one in each of these loops). We don't need to set the
> pending_sync flag if it's not going to be used:
>
> multifd_send_sync_main:
> for () {
On 25/11/24 20:56, Jean-Philippe Brucker wrote:
The dtb-randomness feature, which adds random seeds to the DTB, isn't
really compatible with confidential VMs since it randomizes the Realm
Initial Measurement. Enabling it is not an error, but it prevents
attestation. It also isn't useful to a Real
On Thu, Dec 05, 2024 at 06:16:05PM -0300, Fabiano Rosas wrote:
> > We don't need to flush the last pages here, because we flushed it already,
> > in the last find_dirty_block() call where src QEMU finished scanning the
> > last round. Then we set complete_round=true, scan one more round, and the
>
On 25/11/24 20:56, Jean-Philippe Brucker wrote:
Add a function to register a notifier, that is invoked after a ROM gets
loaded into guest memory.
It will be used by Arm confidential guest support, in order to register
all blobs loaded into memory with KVM, so that their content is moved
into Rea
Peter Xu writes:
> On Thu, Dec 05, 2024 at 05:16:05PM -0300, Fabiano Rosas wrote:
>> Peter Xu writes:
>>
>> > Teach multifd_send_sync_main() to sync with threads only.
>> >
>> > We already have such requests, which is when mapped-ram is enabled with
>> > multifd. In that case, no SYNC messages
Hi Pierrick,
December 5, 2024 at 6:56 PM, "Pierrick Bouvier" wrote:
> On 12/5/24 04:40, Julian Ganz wrote:
>
> >
> > Hi Pierrick,
> > December 4, 2024 at 11:41 PM, "Pierrick Bouvier" wrote:
> > > Does it mean that information returned should be dependent of type of
> > > event, as we previousl
Hi Jean-Philippe,
On 25/11/24 20:56, Jean-Philippe Brucker wrote:
Returning an error to kvm_init() is fatal anyway, no need to continue
the initialization.
Signed-off-by: Jean-Philippe Brucker
---
target/arm/kvm.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/
Le 04/12/2024 à 11:17, Daniel P. Berrangé a écrit :
On Tue, Dec 03, 2024 at 07:57:14AM -0600, Richard Henderson wrote:
On 12/3/24 04:35, Peter Maydell wrote:
On Tue, 3 Dec 2024 at 10:19, Daniel P. Berrangé wrote:
Separatley this from patch, we should also consider whether
it is time to do the
On Thu, Dec 05, 2024 at 10:27:09PM +0100, Cédric Le Goater wrote:
[...]
> > Important note:
> > 4 VF benchmarks were done with commit 5504a8126115
> > ("KVM: Dynamic sized kvm memslots array") and its revert-dependencies
> > reverted since this seems to improve performance in this VM config if th
On 5/12/24 22:38, Peter Maydell wrote:
On Thu, 5 Dec 2024 at 21:21, Philippe Mathieu-Daudé wrote:
On 1/12/24 16:05, Richard Henderson wrote:
Pass fpstatus not env, like most other fp helpers.
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 6 +++---
target/arm/tc
Hi Xiaoyao,
On 5/12/24 15:57, Xiaoyao Li wrote:
There are duplicated code to setup the value of MSR_CORE_THREAD_COUNT.
Extract a common function for it.
Signed-off-by: Xiaoyao Li
---
target/i386/cpu.h| 11 +++
target/i386/hvf/x86_emu.c| 3 +--
targe
On Thu, 5 Dec 2024 at 21:21, Philippe Mathieu-Daudé wrote:
>
> On 1/12/24 16:05, Richard Henderson wrote:
> > Pass fpstatus not env, like most other fp helpers.
> >
> > Signed-off-by: Richard Henderson
> > ---
> > target/arm/helper.h| 6 +++---
> > target/arm/tcg/translate-a64.c |
Hi Andrew,
On 18/11/24 12:48, Andrew.Yuan wrote:
From: Andrew Yuan
As in the Cadence IP for Gigabit Ethernet MAC Part Number: IP7014 IP Rev: R1p12
- Doc Rev: 1.3 User Guide,
if the DISABLE_MASK bit in type2_compare_x_word_1 is set,
mask_value in type2_compare_x_word_0 is used as an additional
On Sun, 1 Dec 2024 at 15:17, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/translate-a64.c | 287 +
> target/arm/tcg/a64.decode | 8 +
> 2 files changed, 116 insertions(+), 179 deletions(-)
> +/* FCMP, FCMPE */
> +st
On Thu, 5 Dec 2024 at 21:21, Peter Maydell wrote:
>
> On Sun, 1 Dec 2024 at 15:17, Richard Henderson
> wrote:
> >
> > Signed-off-by: Richard Henderson
> > ---
> > target/arm/tcg/translate-a64.c | 287 +
> > target/arm/tcg/a64.decode | 8 +
> > 2 files chan
On 11/17/24 20:19, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
This is an updated v3 patch series of the v2 series located here:
https://lore.kernel.org/qemu-devel/cover.1724701542.git.maciej.szmigi...@oracle.com/
Changes from v2:
* Reworked the non-AIO (generic) thread pool to use
On 5/12/24 17:47, Peter Maydell wrote:
On Tue, 26 Nov 2024 at 11:23, Philippe Mathieu-Daudé wrote:
Expose the "refuse-bar-at-addr-0" property so machines
using a GPEX host bridge can set this flag on the bus.
While the default property is set to 'false', all caller
set it to 'true' so there is
Hi Pierrick,
December 5, 2024 at 6:35 PM, "Pierrick Bouvier" wrote:
> On 12/5/24 04:44, Julian Ganz wrote:
>
> >
> > Hi Pierrick,
> > December 4, 2024 at 11:45 PM, "Pierrick Bouvier" wrote:
> >
> > >
> > > On 12/2/24 11:26, Julian Ganz wrote:
> > >
> > include/qemu/plugin.h | 1 +
> > inclu
On 5/12/24 17:44, Peter Maydell wrote:
On Tue, 26 Nov 2024 at 11:22, Philippe Mathieu-Daudé wrote:
Have pci_root_bus_internal_init() callers set the
'bar_at_addr_0_refused' argument. No logical change.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci/pci.c | 11 +++
1 file changed
Hi Pierrick,
December 5, 2024 at 6:30 PM, "Pierrick Bouvier" wrote:
> On 12/5/24 05:10, Julian Ganz wrote:
> > December 5, 2024 at 12:33 AM, "Pierrick Bouvier" wrote:
> > > Trap target PC mismatch
> > > Expected: 23faf3a80
> > > Encountered: 23faf3a84
> > >
> > > From what I understand, it me
On Thu, Dec 5, 2024 at 9:23 PM Paolo Bonzini wrote:
> > +/// Instance id (HPET timer block ID).
> > +hpet_id: BqlCell,
> > +}
> > +
> Like flags this does not need to be a cell.
Well, this *should not* need to be a cell (ideally fw_cfg would call a
C function to generate FW_CFG_HPET) but
On 1/12/24 16:05, Richard Henderson wrote:
Pass fpstatus not env, like most other fp helpers.
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 6 +++---
target/arm/tcg/translate-a64.c | 15 +++
target/arm/tcg/translate-vfp.c | 6 +++---
target/arm/vfp_hel
On Thu, Dec 5, 2024 at 10:18 PM Philippe Mathieu-Daudé
wrote:
>
> On 5/12/24 13:46, Zhao Liu wrote:
> > Hi Philippe,
> >
> > On Thu, Dec 05, 2024 at 01:04:58PM +0100, Philippe Mathieu-Daudé wrote:
> >> Date: Thu, 5 Dec 2024 13:04:58 +0100
> >> From: Philippe Mathieu-Daudé
> >> Subject: Re: [RFC 0
On 5/12/24 13:46, Zhao Liu wrote:
Hi Philippe,
On Thu, Dec 05, 2024 at 01:04:58PM +0100, Philippe Mathieu-Daudé wrote:
Date: Thu, 5 Dec 2024 13:04:58 +0100
From: Philippe Mathieu-Daudé
Subject: Re: [RFC 09/13] i386/fw_cfg: move hpet_cfg definition to hpet.c
On 5/12/24 07:07, Zhao Liu wrote:
Peter Xu writes:
> On Thu, Dec 05, 2024 at 04:55:08PM -0300, Fabiano Rosas wrote:
>> Peter Xu writes:
>>
>> > Commit 637280aeb2 ("migration/multifd: Avoid the final FLUSH in
>> > complete()") removed the FLUSH operation on complete() which should avoid
>> > one global sync on destination side,
On Sun, 1 Dec 2024 at 15:16, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/translate-a64.c | 104 ++---
> target/arm/tcg/a64.decode | 7 +++
> 2 files changed, 78 insertions(+), 33 deletions(-)
>
> diff --git a/target/arm/
On 5/12/24 14:19, Bernhard Beschow wrote:
Implement in dedicated file, just like TYPE_ICH9_AHCI.
Signed-off-by: Bernhard Beschow
---
hw/ide/ahci-sysbus.c | 91
hw/ide/ahci.c| 67
hw/arm/Kconfig | 10
Rather than manually copying each register, use
the libc memcpy(), which is well optimized nowadays.
Suggested-by: Pierrick Bouvier
Reviewed-by: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/sparc/win_helper.c | 26 --
On 12/5/2024 10:37 AM, Markus Armbruster wrote:
Steve Sistare writes:
Add the 'cpr' channel type, and stash the incoming cpr channel for use
in a subsequent patch.
Signed-off-by: Steve Sistare
[...]
diff --git a/qapi/migration.json b/qapi/migration.json
index a605dc2..a26960b 100644
---
On 12/5/2024 10:23 AM, Markus Armbruster wrote:
Steve Sistare writes:
Extend the -incoming option to allow an @MigrationChannel to be specified.
This allows channels other than 'main' to be described on the command
line, which will be needed for CPR.
Signed-off-by: Steve Sistare
[...]
di
On Sun, 1 Dec 2024 at 15:11, Richard Henderson
wrote:
>
> Pass fpstatus not env, like most other fp helpers.
>
> Signed-off-by: Richard Henderson
I have a patch pretty similar to this in my work-in-progress
FEAT_AFP series, because there I wanted it as part of splitting
env->vfp.fp_status into s
On Sun, 1 Dec 2024 at 15:07, Richard Henderson
wrote:
>
> This includes CSEL, CSINC, CSINV, CSNEG. Remove disas_data_proc_reg,
> as these were the last insns decoded by that function.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
Hi,
On 11/13/24 5:00 PM, Eugenio Perez Martin wrote:
On Wed, Nov 13, 2024 at 6:11 AM Sahil Siddiq wrote:
Hi,
On 10/28/24 11:07 AM, Sahil Siddiq wrote:
[...]
The payload that VHOST_SET_VRING_BASE accepts depends on whether
split virtqueues or packed virtqueues are used [6]. In hw/virtio/vho
On Sun, 1 Dec 2024 at 15:13, Richard Henderson
wrote:
>
> Provide a simple way to check for float64, float32, and float16
> support vs vector width, as well as the fpu enabled.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
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