On 01/03/2011 04:31 PM, Markus Duft wrote:
> Hi!
>
> Another question: Shouldn't the APIC version be 0x14 for CPUs since P4/Xeon?
> At least according to the Intel docs, since then the xAPIC is used, which has
> 0x14 as version (see intel manuals, vol 3a "10.4.8 Local APIC Version
> Register".
On Fri, 2010-12-31 at 17:10 +0800, Jan Kiszka wrote:
> Am 31.12.2010 06:22, Huang Ying wrote:
> > In Linux kernel HWPoison processing implementation, the virtual
> > address in processes mapping the error physical memory page is marked
> > as HWPoison. So that, the further accessing to the virtual
On Tue, 2011-01-04 at 16:32 +0800, Jan Kiszka wrote:
> From: Jan Kiszka
>
> There is no need to restrict writing back MCE MSRs to reset or full
> state updates as setting their values has no side effects.
Sorry for late.
The MCE MSRs contents is sticky for warm reset except MCG_STATUS, so
their
Public bug reported:
The problem mostly happens during our backup, syslog does not have any
problematic messages.
Host is Ubuntu 10.10 x86 64 bits
Guest is Windows 2003 Server 32 bits
Using Virtio and Red Hat driver I get a STOP screen 0x10d1 and machine
either reboot, stay frozen or shut of
At 12/21/2010 12:05 PM, Wen Congyang Write:
> When I use the command 'virsh save' to save the domain state,
> I receive the following error message:
> operation failed: Migration unexpectedly failed.
>
> I debug the qemu by adding some printf(), and find the function
> pclose() returns -1.
>
> I
* Venkateswararao Jujjuri (JV) [2011-01-04 15:13:45]:
> On 1/3/2011 9:27 PM, Arun R Bharadwaj wrote:
> > Hi,
> >
> > This patch series implements threadlets infrastructure in qemu.
> >
> > This is a complete rework of the earlier patch series so that
> > it becomes easier to review. I have brok
agreed, guilty of shotgun reporting. will try to reproduce on qemu less
the mono-package installs before submitting to this tracker again.
Thank you for the feedback.
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https://bugs.launc
Refactor the volume mixing, so it can be reused for capturing devices.
Additionally, it removes superfluous multiplications with the nominal
volume within the hardware voice code path.
Signed-off-by: Michael Walle
---
audio/alsaaudio.c |2 +-
audio/audio.c | 11 ++-
On Tue, Jan 04, 2011 at 11:53:01PM +0100, Andreas Färber wrote:
> Am 04.01.2011 um 21:07 schrieb Aurelien Jarno:
>
>> On Tue, Jan 04, 2011 at 08:54:04PM +0100, Andreas Färber wrote:
>>> Am 03.01.2011 um 15:34 schrieb Aurelien Jarno:
>>>
We don't have any HPPA target, so let's remove HPPA speci
On 1/3/2011 9:27 PM, Arun R Bharadwaj wrote:
> Hi,
>
> This patch series implements threadlets infrastructure in qemu.
>
> This is a complete rework of the earlier patch series so that
> it becomes easier to review. I have broken down the earlier
> patch series as asked by Anthony
>
> The follow
Am 04.01.2011 um 21:07 schrieb Aurelien Jarno:
On Tue, Jan 04, 2011 at 08:54:04PM +0100, Andreas Färber wrote:
Am 03.01.2011 um 15:34 schrieb Aurelien Jarno:
We don't have any HPPA target, so let's remove HPPA specific code.
It
can be re-added when someone adds an HPPA target.
Signed-off-b
On Tue, Jan 04, 2011 at 08:17:26AM -0600, Anthony Liguori wrote:
> On 01/03/2011 04:01 AM, Avi Kivity wrote:
> >On 01/03/2011 11:46 AM, Jan Kiszka wrote:
> >>Hi,
> >>
> >>at least in kvm mode, the qemu_fair_mutex seems to have lost its
> >>function of balancing qemu_global_mutex access between the
On Mon, Jan 03, 2011 at 04:20:48PM +, Peter Maydell wrote:
> From: Juha Riihimäki
>
> Fix errors in the decoding of ARM VQSHL/VQSHLU immediate forms,
> including using the new VQSHLU helper functions where appropriate.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Aurelien Jarno
> ---
>
On Mon, Jan 03, 2011 at 04:20:47PM +, Peter Maydell wrote:
> Add neon helper functions to implement VQSHLU, which is a
> signed-to-unsigned version of VQSHL available only as an
> immediate form.
>
> Signed-off-by: Juha Riihimäki
> Reviewed-by: Peter Maydell
> ---
> target-arm/helpers.h
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On 04.01.2011, at 22:59, Andreas Färber wrote:
> Am 04.01.2011 um 22:43 schrieb Alexander Graf:
>
>> On 04.01.2011, at 22:36, Andreas Färber wrote:
>>
>>> Am 04.01.2011 um 21:57 schrieb Alexander Graf:
>>>
On 27.12.2010, at 01:25, Andreas Fär
Am 04.01.2011 um 22:43 schrieb Alexander Graf:
On 04.01.2011, at 22:36, Andreas Färber wrote:
Am 04.01.2011 um 21:57 schrieb Alexander Graf:
On 27.12.2010, at 01:25, Andreas Färber wrote:
Am 27.12.2010 um 01:11 schrieb Alexander Graf:
Am 27.12.2010 um 00:28 schrieb Andreas Färber >:
Am
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On 04.01.2011, at 22:39, Nadav Har'El wrote:
> On Tue, Jan 04, 2011, Alexander Graf wrote about "Re: [Qemu-devel] [PATCH]
> Add VMX cpuid feature to qemu64":
>>
>> On 04.01.2011, at 16:06, Nadav Har'El wrote:
>>
>>> This patch adds the "VMX" cpuid
Dear QEMU Community Members,
Happy new year! We would like to contribute a new year gift to the
community.
As the community considers the next-generation image formats for QEMU,
hopefully we really challenge ourselves hard enough to find the right
solution for the long term, rather than just
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On 04.01.2011, at 22:36, Andreas Färber wrote:
> Am 04.01.2011 um 21:57 schrieb Alexander Graf:
>
>> On 27.12.2010, at 01:25, Andreas Färber wrote:
>>
>>> Am 27.12.2010 um 01:11 schrieb Alexander Graf:
>>>
Am 27.12.2010 um 00:28 schrieb Andre
On Tue, Jan 04, 2011, Alexander Graf wrote about "Re: [Qemu-devel] [PATCH] Add
VMX cpuid feature to qemu64":
>
> On 04.01.2011, at 16:06, Nadav Har'El wrote:
>
> > This patch adds the "VMX" cpuid feature to the default "qemu64" CPU type.
> > If KVM doesn't support this feature (i.e., nested VMX
** Changed in: qemu
Status: In Progress => Fix Committed
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https://bugs.launchpad.net/bugs/604166
Title:
QEMU Floating Point Exception and Crash while Emulating "Cirrus Logic 544
Am 04.01.2011 um 21:57 schrieb Alexander Graf:
On 27.12.2010, at 01:25, Andreas Färber wrote:
Am 27.12.2010 um 01:11 schrieb Alexander Graf:
Am 27.12.2010 um 00:28 schrieb Andreas Färber >:
Am 14.12.2010 um 01:49 schrieb Andreas Färber:
Workaround the following error:
qemu: hardware err
Am 04.01.2011 um 16:55 schrieb Aurelien Jarno:
On Mon, Jan 03, 2011 at 04:48:53PM +, Peter Maydell wrote:
Add support to softfloat for flushing input denormal float32 and
float64
to zero. softfloat's existing 'flush_to_zero' flag only flushes
denormals
to zero on output. Some CPUs need i
Hi Fabien,
Am 03.01.2011 um 15:06 schrieb Fabien Chouteau:
New version of the Leon3 emulation. Many modifications since v1,
mostly to
follow the Qemu architecture and to implement features in a more
generic way.
Again, please feel free to comment.
Informally, if you look through the comm
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On 27.12.2010, at 02:01, Rob Landley wrote:
> On Monday 20 December 2010 03:04:38 Alexander Graf wrote:
>> On 19.12.2010, at 20:12, Andreas Färber wrote:
>>> Am 19.12.2010 um 16:34 schrieb Alexander Graf:
On 19.12.2010, at 16:04, Andreas Färber
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On 27.12.2010, at 01:25, Andreas Färber wrote:
> Am 27.12.2010 um 01:11 schrieb Alexander Graf:
>
>> Am 27.12.2010 um 00:28 schrieb Andreas Färber :
>>
>>> Am 14.12.2010 um 01:49 schrieb Andreas Färber:
>>>
Workaround the following error:
>>>
On Fri, Dec 31, 2010 at 01:22:34PM +0800, Huang Ying wrote:
> qemu_ram_remap() unmaps the specified RAM pages, then re-maps these
> pages again. This is used by KVM HWPoison support to clear HWPoisoned
> page tables across guest rebooting, so that a new page may be
> allocated later to recover the
On Tue, Jan 04, 2011 at 08:54:04PM +0100, Andreas Färber wrote:
> Am 03.01.2011 um 15:34 schrieb Aurelien Jarno:
>
>> We don't have any HPPA target, so let's remove HPPA specific code. It
>> can be re-added when someone adds an HPPA target.
>>
>> Signed-off-by: Aurelien Jarno
>
> There actually is
Am 03.01.2011 um 15:34 schrieb Aurelien Jarno:
We don't have any HPPA target, so let's remove HPPA specific code. It
can be re-added when someone adds an HPPA target.
Signed-off-by: Aurelien Jarno
There actually is such a project on SourceForge [1, 2].
Does it really hurt to leave TARGET_HP
rtl8139 includes a cpu_register_io_memory acquired value in it's
migration data. This is not only unecessary, but we should treat
these values as unique to the VM instances since the value depends
on call order. In most cases, this miraculously still works.
However, if devices are added or remove
i've been working on a new architecture port, but i cant quite figure
out some of the intricacies from reading the code. i have all the
simple stuff working for linux-user (register moves, immediate moves,
loads, stores, syscall emulation) and want to move on to the next big
piece -- code flow cha
AIX already didn't use our definition, so let's start ripping out this one:
As pointed out by Peter Maydell, int16 is currently int on most
supported platforms, so let's replace it with int_fast16_t,
allowing the system to use a wider type if appropriate.
Note that Darwin uses [u]int16_t now, wher
Create a trivial interface to track whether the machine has been
modified since boot. Adding or removing devices will trigger this
to return true. An example usage scenario for such an interface is
the rtl8139 driver which includes a cpu_register_io_memory() value
in it's migration stream. For t
The SoftFloat license requires "prominent notice that the work
is derivative". Having added features like improved 16-bit support
for arm already, add such a notice to the sources.
softfloat-native.[ch] are not under the SoftFloat license
and thus are not changed.
v4:
Initial.
Cc: Peter Maydell
v3:
* Split off. Use uint_fast16_t rather than uint16_t.
v2:
* Initial.
Cc: Peter Maydell
Cc: Nathan Froyd
Signed-off-by: Andreas Färber
---
Commit message to be improved in v5.
fpu/softfloat.c |8
fpu/softfloat.h |4 ++--
2 files changed, 6 insertions(+), 6 deletions(-)
The original SoftFloat 2.0b library avoided the use of custom integer types
in its public headers. This requires the definitions of int{8,16,32,64} to
match the assumptions in the declarations. This breaks on BeOS R5 and Haiku/x86,
where int32 is defined in {be,os}/support/SupportDefs.h in terms of
rtl8139 includes a cpu_register_io_memory() in it's vmstate. This
is problematic if the guest undergoes hotplug operations, which can
shift io indexes between migration source and target. Add an
interface to detect this condition and add a subsection, when
necessary, to ensure we migrate to a saf
Blue Swirl wrote:
> On Tue, Jan 4, 2011 at 2:33 PM, Juan Quintela wrote:
>> Linux allows to invalidate block devices. This is needed for the incoming
>> migration part.
>>
>> Signed-off-by: Juan Quintela
>> ---
>> block.h | 2 ++
>> block/raw-posix.c | 24 +++
Am 04.01.2011 um 17:11 schrieb Aurelien Jarno:
On Tue, Jan 04, 2011 at 03:51:37PM +, Peter Maydell wrote:
On 4 January 2011 15:15, Aurelien Jarno wrote:
Use bits32 instead of uint32 when manipulating floating point values
directly for consistency reasons.
I'm not convinced this patch is
On Mon, Jan 3, 2011 at 2:07 PM, Fabien Chouteau wrote:
>
> Signed-off-by: Fabien Chouteau
> ---
> hw/grlib.h | 121
>
> 1 files changed, 121 insertions(+), 0 deletions(-)
>
> diff --git a/hw/grlib.h b/hw/grlib.h
> new file mode 10064
On Tue, Jan 4, 2011 at 2:33 PM, Juan Quintela wrote:
> We need to invalidate the Read Cache on the destination, otherwise we
> have corruption. Easy way to reproduce it is:
>
> - create an qcow2 images
> - start qemu on destination of migration (qemu -incoming tcp:...)
> - start qemu on sour
On Tue, Jan 4, 2011 at 2:33 PM, Juan Quintela wrote:
> Linux allows to invalidate block devices. This is needed for the incoming
> migration part.
>
> Signed-off-by: Juan Quintela
> ---
> block.h | 2 ++
> block/raw-posix.c | 24
> blockdev.c |
On Mon, Jan 3, 2011 at 2:07 PM, Fabien Chouteau wrote:
>
> Signed-off-by: Fabien Chouteau
> ---
> hw/grlib_irqmp.c | 402
> ++
> 1 files changed, 402 insertions(+), 0 deletions(-)
>
> diff --git a/hw/grlib_irqmp.c b/hw/grlib_irqmp.c
> new fil
On Mon, Jan 3, 2011 at 2:07 PM, Fabien Chouteau wrote:
>
> Signed-off-by: Fabien Chouteau
> ---
> Makefile.target | 5 +-
> hw/leon3.c | 202
> ++
> target-sparc/cpu.h | 39 ++---
> target-sparc/helper.c |
On Mon, Jan 3, 2011 at 2:07 PM, Fabien Chouteau wrote:
>
> Signed-off-by: Fabien Chouteau
> ---
> hw/grlib_gptimer.c | 427
>
> 1 files changed, 427 insertions(+), 0 deletions(-)
>
> diff --git a/hw/grlib_gptimer.c b/hw/grlib_gptimer.c
> new
On Mon, Jan 3, 2011 at 2:07 PM, Fabien Chouteau wrote:
>
> Signed-off-by: Fabien Chouteau
> ---
> hw/grlib_apbuart.c | 208
>
> 1 files changed, 208 insertions(+), 0 deletions(-)
>
> diff --git a/hw/grlib_apbuart.c b/hw/grlib_apbuart.c
> new
On Mon, Jan 3, 2011 at 2:07 PM, Fabien Chouteau wrote:
>
> Signed-off-by: Fabien Chouteau
> ---
> target-sparc/cpu.h | 1 +
> target-sparc/helper.c | 3 ++-
> target-sparc/translate.c | 10 ++
> 3 files changed, 13 insertions(+), 1 deletions(-)
>
> diff --git a/target-sp
Hi Daniel,
I just tried a newer version of the indiana iso image
(http://dlc-origin.openindiana.org/isos/148/oi-dev-148-x86.iso) with
latest qemu (not qemu-kvm) on a debian amd64 linux host, and I had no problems
with networking (ssh from qemu's emulated indiana host to physical linux host).
Test
On Tue, Jan 04, 2011 at 04:57:43PM +, Stefan Hajnoczi wrote:
> On Wed, Dec 29, 2010 at 2:52 PM, Michael S. Tsirkin wrote:
> > I'll probably split this patch in two, and merge into the
> > appropriate patches in the ioeventfd series.
> >
> > Compile-tested only so far, would appreciate feedback
On Wed, Dec 29, 2010 at 2:52 PM, Michael S. Tsirkin wrote:
> I'll probably split this patch in two, and merge into the
> appropriate patches in the ioeventfd series.
>
> Compile-tested only so far, would appreciate feedback/test reports.
virtio-ioeventfd works as expected.
> diff --git a/hw/vhos
On 4 January 2011 16:11, Aurelien Jarno wrote:
> On Tue, Jan 04, 2011 at 03:51:37PM +, Peter Maydell wrote:
>> > int float32_is_quiet_nan( float32 a1 )
>> > {
>> > float32u u;
>> > - uint64_t a;
>> > + bits32 a;
>> > u.f = a1;
>> > a = u.i;
>> > return ( 0xFF80 < (
On 4 January 2011 15:58, Aurelien Jarno wrote:
> On Mon, Jan 03, 2011 at 04:48:54PM +, Peter Maydell wrote:
>> - i = vfp_exceptbits_to_host((val >> 8) & 0x1f);
>> + i = vfp_exceptbits_to_host(val);
>
> This change looks correct (using the flag instead of the enable bit),
> but it might b
On Tue, Jan 04, 2011 at 04:06:13PM +, Peter Maydell wrote:
> On 4 January 2011 15:15, Aurelien Jarno wrote:
> > This patch series start by a cleanup to remove dead HPPA code and fix a
> > few inconsistencies. The following patch implement implement correct
> > NaN propagation rules for MIPS an
On Tue, Jan 04, 2011 at 03:51:37PM +, Peter Maydell wrote:
> On 4 January 2011 15:15, Aurelien Jarno wrote:
> > Use bits32 instead of uint32 when manipulating floating point values
> > directly for consistency reasons.
>
> I'm not convinced this patch is particularly worthwhile, especially si
On 4 January 2011 15:15, Aurelien Jarno wrote:
> This patch series start by a cleanup to remove dead HPPA code and fix a
> few inconsistencies. The following patch implement implement correct
> NaN propagation rules for MIPS and PowerPC, following commit 3
> 54f211b1a49a7387929e22d6e63849fcba48f8a
On 4 January 2011 15:15, Aurelien Jarno wrote:
> Use float{32,64,x80,128}_maybe_silence_nan() instead of toggling the
> sNaN bit manually. This allow per target implementation of sNaN to qNaN
> conversion.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Peter Maydell
-- PMM
On 4 January 2011 15:15, Aurelien Jarno wrote:
> Similarly to what has been done in commit
> 185698715dfb18c82ad2a5dbc169908602d43e81 rename the misnamed *IsNaN
> variables into *IsQuietNaN.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Peter Maydell
-- PMM
On Mon, Jan 03, 2011 at 04:48:53PM +, Peter Maydell wrote:
> Add support to softfloat for flushing input denormal float32 and float64
> to zero. softfloat's existing 'flush_to_zero' flag only flushes denormals
> to zero on output. Some CPUs need input denormals to be flushed before
> processing
On Mon, Jan 03, 2011 at 04:48:54PM +, Peter Maydell wrote:
> Wire up the new softfloat support for flushing input denormals
> to zero on ARM. The FPSCR FZ bit enables flush-to-zero for
> both inputs and outputs, but the reporting of when inputs are
> flushed to zero is via a separate IDC bit ra
On 04.01.2011, at 16:06, Nadav Har'El wrote:
> This patch adds the "VMX" cpuid feature to the default "qemu64" CPU type.
> If KVM doesn't support this feature (i.e., nested VMX is not in the code,
> or not enabled) it will mask out this bit.
"qemu64" defines capabilities that qemu emulates. Qemu
On 04.01.2011, at 15:22, Anthony Liguori wrote:
> On 01/04/2011 08:16 AM, Gerd Hoffmann wrote:
>> On 01/04/11 14:49, Anthony Liguori wrote:
>>> On 01/04/2011 07:43 AM, Gerd Hoffmann wrote:
Hi,
>> Windows guests needs some registry hackery and Linux guests some
>> udev rules
>>>
On 4 January 2011 15:15, Aurelien Jarno wrote:
> Use bits32 instead of uint32 when manipulating floating point values
> directly for consistency reasons.
I'm not convinced this patch is particularly worthwhile, especially since
Andreas is working on a patchset which will convert all the bits32
us
* Aurelien Jarno [2010-12-25 16:37]:
> On Wed, Dec 08, 2010 at 04:27:45PM -0200, Luiz Capitulino wrote:
> > On Wed, 08 Dec 2010 12:23:12 -0600
> > Anthony Liguori wrote:
> >
> > > On 12/08/2010 12:01 PM, Luiz Capitulino wrote:
> > > > Currently, x86_64-softmmu qemu segfaults when trying to use>
On 01/04/2011 09:12 AM, Avi Kivity wrote:
On 01/04/2011 04:55 PM, Anthony Liguori wrote:
When the TCG thread, it needs to let the IO thread run for at least
one iteration. Coordinating the execution of the IO thread such
that it's guaranteed to run at least once and then having it drop
th
Peter Maydell a écrit :
> On 4 January 2011 15:15, Aurelien Jarno wrote:
>> Implement the correct NaN propagation rules for ARM targets by
>> providing an appropriate pickNaN function.
>
> I think you mean "PPC targets" :-)
Yes, cut and paste...
--
Aurelien Jarno GPG:
On 4 January 2011 15:15, Aurelien Jarno wrote:
> Implement the correct NaN propagation rules for ARM targets by
> providing an appropriate pickNaN function.
I think you mean "PPC targets" :-)
-- PMM
Implement the correct NaN propagation rules for MIPS targets by
providing an appropriate pickNaN function.
Signed-off-by: Aurelien Jarno
---
fpu/softfloat-specialize.h | 27 +++
1 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/fpu/softfloat-specialize.h b
Use float{32,64,x80,128}_maybe_silence_nan() instead of toggling the
sNaN bit manually. This allow per target implementation of sNaN to qNaN
conversion.
Signed-off-by: Aurelien Jarno
---
fpu/softfloat-specialize.h | 59
1 files changed, 16 insertion
Implement the correct NaN propagation rules for ARM targets by
providing an appropriate pickNaN function.
Also fix the #ifdef tests for default NaN definition, the correct name
is TARGET_PPC instead of TARGET_POWERPC.
Cc: Alexander Graf
Signed-off-by: Aurelien Jarno
---
fpu/softfloat-specializ
Use bits32 instead of uint32 when manipulating floating point values
directly for consistency reasons.
Signed-off-by: Aurelien Jarno
---
fpu/softfloat-native.c |4 ++--
fpu/softfloat-specialize.h |6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/fpu/softfloat-
Add float{x80,128}_maybe_silence_nan() functions, they will be need by
propagateFloat{x80,128}NaN().
Signed-off-by: Aurelien Jarno
Reviewed-by: Peter Maydell
---
fpu/softfloat-specialize.h | 46
fpu/softfloat.h|2 +
2 files changed,
Similarly to what has been done in commit
185698715dfb18c82ad2a5dbc169908602d43e81 rename the misnamed *IsNaN
variables into *IsQuietNaN.
Signed-off-by: Aurelien Jarno
---
fpu/softfloat-specialize.h | 36
1 files changed, 20 insertions(+), 16 deletions(-)
On targets that define sNaN with the sNaN bit as one, simply clearing
this bit may correspond to an infinite value.
Convert it to a default NaN if SNAN_BIT_IS_ONE, as it corresponds to
the MIPS implementation, the only emulated CPU with SNAN_BIT_IS_ONE.
When other CPU of this type are added, this
This patch series start by a cleanup to remove dead HPPA code and fix a
few inconsistencies. The following patch implement implement correct
NaN propagation rules for MIPS and PowerPC, following commit 3
54f211b1a49a7387929e22d6e63849fcba48f8a.
Changes from v1:
- Add "softfloat: use bits32 instead
We don't have any HPPA target, so let's remove HPPA specific code. It
can be re-added when someone adds an HPPA target.
Signed-off-by: Aurelien Jarno
Reviewed-by: Peter Maydell
---
fpu/softfloat-specialize.h |6 +-
1 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/fpu/softf
On 01/04/2011 04:55 PM, Anthony Liguori wrote:
When the TCG thread, it needs to let the IO thread run for at least
one iteration. Coordinating the execution of the IO thread such
that it's guaranteed to run at least once and then having it drop
the qemu mutex long enough for the TCG thread
This patch adds the "VMX" cpuid feature to the default "qemu64" CPU type.
If KVM doesn't support this feature (i.e., nested VMX is not in the code,
or not enabled) it will mask out this bit.
Note that other relevant CPU types, such as "core2duo" already correctly
include the VMX feature, and "qemu
On 01/04/2011 08:27 AM, Avi Kivity wrote:
On 01/04/2011 04:17 PM, Anthony Liguori wrote:
On 01/03/2011 04:01 AM, Avi Kivity wrote:
On 01/03/2011 11:46 AM, Jan Kiszka wrote:
Hi,
at least in kvm mode, the qemu_fair_mutex seems to have lost its
function of balancing qemu_global_mutex access betw
On 01/04/11 15:33, Anthony Liguori wrote:
> On 01/04/2011 08:31 AM, Jes Sorensen wrote:
>> On 01/03/11 11:57, Juan Quintela wrote:
>>
>>> Please send any agenda items you are interested in covering.
>>>
>>> thanks, Juan.
>>>
>>>
>> Do we have anything for the agenda yet?
>>
>
> I coul
Juan Quintela wrote:
> Please send any agenda items you are interested in covering.
By popular request, this call got cancelled O:-)
Later, Juan.
>
> thanks, Juan.
> --
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majord...@vger.kernel.org
> Mor
On Tue, Jan 04, 2011 at 10:45:13PM +0900, Yoshiaki Tamura wrote:
> 2011/1/4 Michael S. Tsirkin :
> > On Tue, Jan 04, 2011 at 09:20:53PM +0900, Yoshiaki Tamura wrote:
> >> 2011/1/4 Michael S. Tsirkin :
> >> > On Tue, Jan 04, 2011 at 08:02:54PM +0900, Yoshiaki Tamura wrote:
> >> >> 2010/11/29 Stefan
exits due to errors should end with error code 1, not zero or negative.
Signed-off-by: Juan Quintela
---
migration.c |2 +-
vl.c|2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/migration.c b/migration.c
index e5ba51c..a8b65e5 100644
--- a/migration.c
+++ b/mi
Linux allows to invalidate block devices. This is needed for the incoming
migration part.
Signed-off-by: Juan Quintela
---
block.h |2 ++
block/raw-posix.c | 24
blockdev.c|9 +
3 files changed, 31 insertions(+), 4 deletions(-)
diff
Hi
This patch set creates infrastructure to invalidate buffers on
migration target machine. The best way to see the problems is:
# create a new qcow2 image
qemu-img create -f qcow2 foo.img
# start the destination host
qemu path=foo.img
# start the source host with one installation
qemu
Signed-off-by: Juan Quintela
---
blockdev.c |9 ++---
1 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/blockdev.c b/blockdev.c
index da619ad..f9bb659 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -467,7 +467,7 @@ DriveInfo *drive_init(QemuOpts *opts, int default_to_scsi,
int
Signed-off-by: Juan Quintela
---
blockdev.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/blockdev.c b/blockdev.c
index d7add36..da619ad 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -115,6 +115,7 @@ void drive_uninit(DriveInfo *dinfo)
qemu_opts_del(dinfo->opts);
We need to invalidate the Read Cache on the destination, otherwise we
have corruption. Easy way to reproduce it is:
- create an qcow2 images
- start qemu on destination of migration (qemu -incoming tcp:...)
- start qemu on source of migration and do one install.
- migrate at the end of insta
On 01/04/2011 08:31 AM, Jes Sorensen wrote:
On 01/03/11 11:57, Juan Quintela wrote:
Please send any agenda items you are interested in covering.
thanks, Juan.
Do we have anything for the agenda yet?
I could use the extra hour to catch up from the Holiday (as I assume a
lot of
On 01/03/11 11:57, Juan Quintela wrote:
>
> Please send any agenda items you are interested in covering.
>
> thanks, Juan.
>
Do we have anything for the agenda yet?
Jes
On 01/04/2011 04:17 PM, Anthony Liguori wrote:
On 01/03/2011 04:01 AM, Avi Kivity wrote:
On 01/03/2011 11:46 AM, Jan Kiszka wrote:
Hi,
at least in kvm mode, the qemu_fair_mutex seems to have lost its
function of balancing qemu_global_mutex access between the io-thread
and
vcpus. It's now onl
On 01/04/2011 08:16 AM, Gerd Hoffmann wrote:
On 01/04/11 14:49, Anthony Liguori wrote:
On 01/04/2011 07:43 AM, Gerd Hoffmann wrote:
Hi,
Windows guests needs some registry hackery and Linux guests some
udev rules
to enable remote wakeup permanently.
That commit inspired me to look at UHCI. I
On 01/03/2011 04:01 AM, Avi Kivity wrote:
On 01/03/2011 11:46 AM, Jan Kiszka wrote:
Hi,
at least in kvm mode, the qemu_fair_mutex seems to have lost its
function of balancing qemu_global_mutex access between the io-thread and
vcpus. It's now only taken by the latter, isn't it?
This and the fac
On 01/04/11 14:49, Anthony Liguori wrote:
On 01/04/2011 07:43 AM, Gerd Hoffmann wrote:
Hi,
Windows guests needs some registry hackery and Linux guests some
udev rules
to enable remote wakeup permanently.
That commit inspired me to look at UHCI. If the solution requires
modifying the guest th
On 01/04/2011 07:43 AM, Gerd Hoffmann wrote:
Hi,
Windows guests needs some registry hackery and Linux guests some
udev rules
to enable remote wakeup permanently.
That commit inspired me to look at UHCI. If the solution requires
modifying the guest then it is not widely useful.
Well, lon
Hi,
Windows guests needs some registry hackery and Linux guests some udev rules
to enable remote wakeup permanently.
That commit inspired me to look at UHCI. If the solution requires
modifying the guest then it is not widely useful.
Well, long-term this shouldn't be a big issue. I expect
2011/1/4 Michael S. Tsirkin :
> On Tue, Jan 04, 2011 at 09:20:53PM +0900, Yoshiaki Tamura wrote:
>> 2011/1/4 Michael S. Tsirkin :
>> > On Tue, Jan 04, 2011 at 08:02:54PM +0900, Yoshiaki Tamura wrote:
>> >> 2010/11/29 Stefan Hajnoczi :
>> >> > On Thu, Nov 25, 2010 at 6:06 AM, Yoshiaki Tamura
>> >> >
On Tue, Jan 04, 2011 at 09:20:53PM +0900, Yoshiaki Tamura wrote:
> 2011/1/4 Michael S. Tsirkin :
> > On Tue, Jan 04, 2011 at 08:02:54PM +0900, Yoshiaki Tamura wrote:
> >> 2010/11/29 Stefan Hajnoczi :
> >> > On Thu, Nov 25, 2010 at 6:06 AM, Yoshiaki Tamura
> >> > wrote:
> >> >> event-tap controls w
The upper memory size field should exclude the first MB of RAM.
Signed-off-by: Kevin Wolf
---
hw/multiboot.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/multiboot.c b/hw/multiboot.c
index 7cc3055..0d2bfb4 100644
--- a/hw/multiboot.c
+++ b/hw/multiboot.c
@@ -306,7
On Tue, Jan 4, 2011 at 12:13 PM, Gerd Hoffmann wrote:
> On 01/04/11 12:48, Stefan Hajnoczi wrote:
>>
>> CPU utilization is a known issue with UHCI emulation. I spent a short
>> time poking around the code and USB specifications trying to come up
>> with a way to detect "idle" periods where we don
This results in an output like:
$ ./x86_64-softmmu/qemu-system-x86_64 -device virtio-net-pci,?
...
virtio-net-pci.mac=macaddr, The MAC address for the NIC.
virtio-net-pci.vlan=vlan, The VLAN to associate the NIC with.
virtio-net-pci.netdev=netdev, The peer net device to associate with this
virt
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