Thanks David and Florian, see below.
> On 7/30/20 4:36 PM, David Miller wrote:
> > From: Bryan Whitehead
> > Date: Mon, 27 Jul 2020 13:18:28 -0400
> >
> >> @@ -929,6 +929,77 @@ static bool vsc8574_is_serdes_init(struct
> >> phy_device *phydev) }
> >>
> >> /* bus->mdio_lock should be locked when
On 7/30/20 4:36 PM, David Miller wrote:
> From: Bryan Whitehead
> Date: Mon, 27 Jul 2020 13:18:28 -0400
>
>> @@ -929,6 +929,77 @@ static bool vsc8574_is_serdes_init(struct phy_device
>> *phydev)
>> }
>>
>> /* bus->mdio_lock should be locked when using this function */
>> +/* Page should alre
From: Bryan Whitehead
Date: Mon, 27 Jul 2020 13:18:28 -0400
> @@ -929,6 +929,77 @@ static bool vsc8574_is_serdes_init(struct phy_device
> *phydev)
> }
>
> /* bus->mdio_lock should be locked when using this function */
> +/* Page should already be set to MSCC_PHY_PAGE_EXTENDED_GPIO */
> +stat
The LCPLL Reset sequence is added to the initialization path
of the VSC8574 Family of phy drivers.
The LCPLL Reset sequence is known to reduce hardware inter-op
issues when using the QSGMII MAC interface.
This patch is submitted to net-next to avoid merging conflicts that
may arise if submitted t
