From: Dave Airlie
For copies the texture unit needs to know the depth format so
it can read the htile data properly.
This fixes:
dEQP-VK.renderpass.suballocation.formats.d32_sfloat_s8_uint.load.clear
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_meta_copy.c | 3 ++-
1 file changed, 2 ins
Am 27.12.2017 01:20, schrieb Bas Nieuwenhuizen:
The position start at (dst.x, dst.y), so if we want the source to
start at (src.x, src.y), we have to offset by
(src.x-dst.x,src.y-dst.y).
Haven't tested that this fixed anything yet, but found by inspection.
Fixes: 69136f4e633 "radv/meta: add re
On December 26, 2017 16:44:47 Kenneth Graunke wrote:
On Tuesday, December 26, 2017 1:22:25 PM PST Rob Clark wrote:
On Mon, Dec 25, 2017 at 10:22 PM, Kenneth Graunke
wrote:
> On Monday, December 25, 2017 12:19:49 PM PST Rob Clark wrote:
>> For GL_ARB_compute_variable_group_size
>>
>> Report
From: Dave Airlie
This needs to correspond to the bit depth of the Z plane.
noticed in passing reading amdvlk.
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_image.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/r
On 27 December 2017 at 10:20, Bas Nieuwenhuizen
wrote:
> the samples_identical instruction returns 0 if they are differet, so
> we have to do the extra work if the result is 0, not if it is != 0.
>
I think I lost the logic trail on this code a few times.
Patches look good.
Reviewed-by: Dave Ai
Reviewed-by: Bas Nieuwenhuizen
for this series.
On Tue, Dec 26, 2017 at 11:19 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> These are just taken from amdvlk, we probably knew these already,
> but may as well port them now.
>
> Signed-off-by: Dave Airlie
> ---
> src/amd/common/sid.h
On Tue, Dec 26, 2017 at 7:16 AM, Jason Ekstrand wrote:
> What is the assertion? Just shutting off aligna1 ternaries seems a bit
> harsh.
>
In brw_eu_emit.c:
assert((src0.vstride == BRW_VERTICAL_STRIDE_0 &&
src0.hstride == BRW_HORIZONTAL_STRIDE_0) ||
(src0.vstride
From: Dave Airlie
AMDVLK says that these don't work, so disable them.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/radeonsi/si_clear.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_clear.c
b/src/gallium/drivers/radeonsi/si_clear
From: Dave Airlie
From AMDVLK fast clears don't work with cmask on gfx9, only with
dcc, so we don't need to allocate cmask for single sampled surfaces.
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_image.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/
On Mon, Dec 25, 2017 at 3:05 AM, Emil Velikov wrote:
> On 22 December 2017 at 21:54, Anuj Phogat wrote:
>> This reverts commit 9cd60fce9c22737000a8f8dc711141f8a523fe75.
>> Above commit caused 2000+ piglit tests to assert fail. Disabling
>> the align1 mode on gen10 for now to avoid failures.
>>
>>
the samples_identical instruction returns 0 if they are differet, so
we have to do the extra work if the result is 0, not if it is != 0.
Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
---
src/amd/vulkan/radv_meta.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
d
The position start at (dst.x, dst.y), so if we want the source to
start at (src.x, src.y), we have to offset by (src.x-dst.x,src.y-dst.y).
Haven't tested that this fixed anything yet, but found by inspection.
Fixes: 69136f4e633 "radv/meta: add resolve pass using fragment/vertex shaders"
---
src/a
Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
---
src/amd/vulkan/radv_meta_resolve_cs.c | 8
src/amd/vulkan/radv_meta_resolve_fs.c | 10 ++
2 files changed, 18 insertions(+)
diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c
b/src/amd/vulkan/radv_meta
HW resolve does not support it either.
---
src/amd/vulkan/radv_meta_resolve.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/src/amd/vulkan/radv_meta_resolve.c
b/src/amd/vulkan/radv_meta_resolve.c
index e73a950ab7c..26489b7834f 100644
--- a/src/amd/vulkan/radv_meta_r
If the destination has DCC, we will use the FS resolve.
---
src/amd/vulkan/radv_meta_resolve_cs.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c
b/src/amd/vulkan/radv_meta_resolve_cs.c
index 5b6cea6c103..7c569aa9202 100644
--- a/src/a
For vulkan, I wanted this because of
drm/syncobj: Allow wait for submit and signal behavior (v5)
Vulkan VkFence semantics require that the application be able to perform
a CPU wait on work which may not yet have been submitted. This is
perfectly safe because the CPU wait has a timeou
For the series,
Reviewed-by: Neha Bhende
Regards,
Neha
From: Brian Paul
Sent: Saturday, December 23, 2017 9:13 PM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Neha Bhende
Subject: [PATCH 2/2] svga: fix TGSI_TEXTURE_SHADOW1D coordinate selection
Fix
On Tuesday, December 26, 2017 1:22:25 PM PST Rob Clark wrote:
> On Mon, Dec 25, 2017 at 10:22 PM, Kenneth Graunke
> wrote:
> > On Monday, December 25, 2017 12:19:49 PM PST Rob Clark wrote:
> >> For GL_ARB_compute_variable_group_size
> >>
> >> Reported-by: Karol Herbst
> >> Signed-off-by: Rob Cla
From: Dave Airlie
This is ported from amdvlk.
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_device.c| 10 ++
src/gallium/drivers/radeonsi/si_state.c | 9 +
2 files changed, 19 insertions(+)
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_devic
From: Dave Airlie
This is ported from amdvlk which sets the independent 64b blocks
only for image which will sample dcc.
I'm not sure how to port this to radeonsi.
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_device.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
di
From: Dave Airlie
These are just taken from amdvlk, we probably knew these already,
but may as well port them now.
Signed-off-by: Dave Airlie
---
src/amd/common/sid.h| 6 ++
src/amd/vulkan/radv_device.c| 6 +++---
src/gallium/drivers/radeonsi/si_state.c | 6
On Mon, Dec 25, 2017 at 10:22 PM, Kenneth Graunke wrote:
> On Monday, December 25, 2017 12:19:49 PM PST Rob Clark wrote:
>> For GL_ARB_compute_variable_group_size
>>
>> Reported-by: Karol Herbst
>> Signed-off-by: Rob Clark
>> ---
>> src/compiler/nir/nir.c| 4
>> src/compiler/ni
For the series,
Reviewed-by: Neha Bhende
Regards,
Neha
From: Brian Paul
Sent: Sunday, December 24, 2017 2:40:28 PM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Neha Bhende
Subject: [PATCH 2/2] svga: use tgsi_util_get_shadow_ref_src_index() in a coup
For this series, Reviewed-by: Charmaine Lee
From: Brian Paul
Sent: Sunday, December 24, 2017 2:40:28 PM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Neha Bhende
Subject: [PATCH 2/2] svga: use tgsi_util_get_shadow_ref_src_index() in a couple
pla
For the series, Reviewed-by: Charmaine Lee
From: Brian Paul
Sent: Saturday, December 23, 2017 9:13:47 PM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Neha Bhende
Subject: [PATCH 2/2] svga: fix TGSI_TEXTURE_SHADOW1D coordinate selection
Fixes ab
On Tuesday, December 26, 2017 6:30:39 AM PST Jason Ekstrand wrote:
> Yes, please!
>
> Reviewed-by: Jason Ekstrand
>
> Might be worth an ack from idr.
Yep, would be good. Could I trouble you for a review on the Piglit
patch which needs to land before this one?
https://lists.freedesktop.org/arc
Reviewed-by: Marek Olšák
Marek
On Wed, Dec 20, 2017 at 8:56 PM, Samuel Pitoiset
wrote:
> It makes more sense to move all scan stuff in the same place.
> Also, we don't really need to duplicate the uses_primid field
> for each stages.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/a
Reviewed-by: Marek Olšák
Marek
On Wed, Dec 20, 2017 at 8:56 PM, Samuel Pitoiset
wrote:
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_shader_info.c | 3 +++
> src/amd/common/ac_shader_info.h | 1 +
> 2 files changed, 4 insertions(+)
>
> diff --git a/src/amd/common/ac_shader_info.c
Does this mean that radeonsi shouldn't use amdgpu_cs_syncobj_wait on older DRM?
Does it make sense to have separate has_syncobj and has_syncobj_wait flags?
Marek
On Sun, Dec 17, 2017 at 1:11 AM, Bas Nieuwenhuizen
wrote:
> First amdgpu bump after inclusion was 20 (which was done for local BOs).
Reviewed-by: Marek Olšák
Marek
On Thu, Dec 14, 2017 at 4:48 AM, Timothy Arceri wrote:
> We need to move this to a separate loop because
> nir_compact_varyings() can alter the IR of a previous stage.
>
> Fixes: 6648bd68fd27 "st/glsl_to_nir: enable NIR link time opts"
> ---
> src/mesa/state_trac
Reviewed-by: Marek Olšák
Marek
On Thu, Dec 14, 2017 at 12:14 AM, Timothy Arceri wrote:
> ---
> src/mesa/state_tracker/st_glsl_to_nir.cpp | 22 +-
> 1 file changed, 17 insertions(+), 5 deletions(-)
>
> diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
> b/src/mesa/stat
Reviewed-by: Marek Olšák
Marek
On Thu, Dec 14, 2017 at 6:02 AM, Timothy Arceri wrote:
> Fixes 56 crashes in radeonsi.
> ---
> src/mesa/state_tracker/st_glsl_to_nir.cpp | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
> b/src/mesa/state_tracker
Reviewed-by: Marek Olšák
Marek
On Wed, Dec 13, 2017 at 1:59 PM, Samuel Pitoiset
wrote:
> Similar to si_init_exec_full_mask().
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/gallium/drivers/radeonsi/si_shader.c | 14 +++---
> 1 file changed, 3 insertions(+), 11 deletions(-)
>
> diff --
Reviewed-by: Marek Olšák
Marek
On Sun, Dec 24, 2017 at 11:40 PM, Brian Paul wrote:
> ---
> src/gallium/auxiliary/tgsi/tgsi_util.c | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.c
> b/src/gallium/auxiliary/tgsi/tgsi_util.c
What is the assertion? Just shutting off aligna1 ternaries seems a bit
harsh.
--Jason
On Fri, Dec 22, 2017 at 1:54 PM, Anuj Phogat wrote:
> This reverts commit 9cd60fce9c22737000a8f8dc711141f8a523fe75.
> Above commit caused 2000+ piglit tests to assert fail. Disabling
> the align1 mode on gen1
Yes, please!
Reviewed-by: Jason Ekstrand
Might be worth an ack from idr.
On December 26, 2017 00:57:30 Kenneth Graunke wrote:
Older OpenGL defines two equations for converting from signed-normalized
to floating point data. These are:
f = (2c + 1)/(2^b - 1)(equation 2.
https://bugs.freedesktop.org/show_bug.cgi?id=104351
--- Comment #4 from Breno Souza ---
It worked, thanks! I can't get why tough. Should I report this bug on Wayland
instead?
I'm kind of a newbie in this report bug things, should I change the status of
this one?
Thanks for your time,
Breno Souz
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