On Fri, Sep 9, 2016 at 5:47 PM, Nanley Chery wrote:
> On Wed, Aug 31, 2016 at 02:22:49PM -0700, Jason Ekstrand wrote:
> > ---
> > src/intel/vulkan/Makefile.sources | 1 -
> > src/intel/vulkan/anv_blorp.c | 184 ++
>
> > src/intel/vulkan/anv_meta_copy.c
On Fri, Sep 9, 2016 at 8:59 PM, Dylan Baker wrote:
>> Some piglit tests to check the TES behaviour would be nice.
>
> Yeah, I figured. I'll have to go read up on how tessellation works.
While I would hate to discourage you from such a joyous learning
experience, if you want the quickest way to su
Quoting Ilia Mirkin (2016-09-09 16:40:15)
> On Fri, Sep 9, 2016 at 7:14 PM, Dylan Baker wrote:
> > +EXT(ARB_shader_viewport_layer_array ,
> > ARB_shader_viewport_layer_array, GLL, GLC, x , x , 2015)
>
> This relies on GL 3.2 at least, so I think this should just be GLC, not GLL
On 09/10/2016 10:02 AM, Bas Nieuwenhuizen wrote:
> Reviewed-by: Bas Nieuwenhuizen
Reviewed-by: Edward O'Callaghan
>
> On Sat, Sep 10, 2016 at 12:40 AM, Marek Olšák wrote:
>> From: Marek Olšák
>>
>> LLVM can CSE the loads, thus we can always re-load constants before each
>> use. The decreas
On Wed, Aug 31, 2016 at 02:22:49PM -0700, Jason Ekstrand wrote:
> ---
> src/intel/vulkan/Makefile.sources | 1 -
> src/intel/vulkan/anv_blorp.c | 184
> ++
> src/intel/vulkan/anv_meta_copy.c | 180 -
> 3 files changed
Reviewed-by: Bas Nieuwenhuizen
On Sat, Sep 10, 2016 at 12:40 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> LLVM can CSE the loads, thus we can always re-load constants before each
> use. The decrease in SGPR spilling is huge.
>
> The best improvements are the dumbest ones.
>
> 26011 shaders in
On Fri, Sep 9, 2016 at 7:14 PM, Dylan Baker wrote:
> +EXT(ARB_shader_viewport_layer_array ,
> ARB_shader_viewport_layer_array, GLL, GLC, x , x , 2015)
This relies on GL 3.2 at least, so I think this should just be GLC, not GLL.
Also, you mention it requires GL 3.1, but really
Hi Dave,
while checking mesa-dev with android build,
I'm porting the necessary changes to to have amd/addrlib in Android build,
but I have also encountered a building error related to commit
https://cgit.freedesktop.org/mesa/mesa/commit/?id=1add3562e33f0234da50e54dda8cfa6dac613125
In the attachm
This extension is a combination of AMD_vertex_shader_viewport_index and
AMD_vertex_shader_layer, making it rather trivial to implement.
For gallium I *think* this needs a new cap because of the addition of
support in tessellation evaluation shaders, and since I don't have any
hardware to test it o
From: Marek Olšák
LLVM can CSE the loads, thus we can always re-load constants before each
use. The decrease in SGPR spilling is huge.
The best improvements are the dumbest ones.
26011 shaders in 14651 tests
Totals:
SGPRS: 1453346 -> 1251920 (-13.86 %)
VGPRS: 742576 -> 728421 (-1.91 %)
Spilled
VC4 was running into a major performance regression from enabling control
flow in the glmark2 conditionals test, because of short if statements
containing an ffract.
This pass seems like it was was trying to ensure that we only flattened
IFs that should be entirely a win by guaranteeing that there
On Fri, Sep 9, 2016 at 2:35 PM, Nanley Chery wrote:
> On Wed, Aug 31, 2016 at 02:22:48PM -0700, Jason Ekstrand wrote:
> > ---
> > src/intel/vulkan/anv_blorp.c | 67 +
> > src/intel/vulkan/anv_meta_copy.c | 158 --
> -
> > 2 files changed,
On Wed, Aug 31, 2016 at 02:22:48PM -0700, Jason Ekstrand wrote:
> ---
> src/intel/vulkan/anv_blorp.c | 67 +
> src/intel/vulkan/anv_meta_copy.c | 158
> ---
> 2 files changed, 67 insertions(+), 158 deletions(-)
>
> diff --git a/src/intel/v
On Fri, Sep 9, 2016 at 7:34 PM, Nicolai Hähnle wrote:
> Hi,
>
> this is a bunch of random cleanups in and related to radeon and amdgpu
> winsyses.
>
> There is one significant behavioral change, which is that amdgpu now only
> keeps a single fence around for each buffer object. See the explanation
I'm not sure calling queryImage with an unsupported attribute is legal,
thus I think a small check doesn't hurt.
It'd give
if (offsets) {
offsets[0] = 0;
if (dri2_dpy->image->base.version >= 13) {
EGLint img_offset = 0;
bool ret = dri2_dpy->image->queryImage(dri2_img->dri_imag
Iago Toral writes:
> On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote:
>> This was dropping 'inst->dst.offset' on the floor. Nothing in the
>> code above seems to guarantee that it's zero and in that case the
>> offset of the register being coalesced into wouldn't be taken into
>> accoun
Iago Toral writes:
> On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote:
>> This makes sure that overlap checks are done correctly throughout the
>> back-end when the '*this' register starts before the register/size
>> pair provided as argument, and is actually less annoying to use than
>>
Iago Toral writes:
> On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote:
>> This fixes regs_written() and regs_read() to return a more accurate
>> value when the padding left between components due to a stride value
>> greater than one causes the region bounds given by size_written or
>> si
Iago Toral writes:
> On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote:
>> This will be useful later on when we start using reg_offset() on
>> fixed
>> hardware registers.
>> ---
>> src/mesa/drivers/dri/i965/brw_ir_fs.h | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> dif
Iago Toral writes:
> On Wed, 2016-09-07 at 18:48 -0700, Francisco Jerez wrote:
>> Its only use left in the FS back-end should be using
>> regions_overlap()
>> instead to avoid getting a false negative result in cases where
>> source
>> and destination overlap but the former starts before the latt
On Fri 09 Sep 2016, Jason Ekstrand wrote:
>
> On Sep 9, 2016 12:23 PM, "Chad Versace" wrote:
> > Acked-by: Chad Versace
>
> Sure, review the easy patch and ack the interesting ones...
Yep!
> > Just an ack, because I'm not very familiar with the new blorp code.
>
> The blorp_copy entrypoint
On Sep 9, 2016 12:05 PM, "Chad Versace" wrote:
>
> On Fri 09 Sep 2016, Jason Ekstrand wrote:
> > Normally, using a non-linear tiling format helps improve cache locality
by
> > ensuring that neighboring pixels are usually close-by in memory. For
RGB
> > formats, this still sort-of holds, but it ca
On Sep 9, 2016 12:23 PM, "Chad Versace" wrote:
>
> Patches 3 and 4, despite their craziness, are
They're not that crazy...
> Acked-by: Chad Versace
Sure, review the easy patch and ack the interesting ones...
> Just an ack, because I'm not very familiar with the new blorp code.
The blorp_copy
On Thu 08 Sep 2016, Alejandro Piñeiro wrote:
>
>
> On 07/09/16 23:41, Adam Jackson wrote:
> > Signed-off-by: Adam Jackson
> > ---
> > src/egl/main/eglcontext.c | 10 ++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/src/egl/main/eglcontext.c b/src/egl/main/eglcontext.c
> > i
Patches 3 and 4, despite their craziness, are
Acked-by: Chad Versace
Just an ack, because I'm not very familiar with the new blorp code.
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Ian Romanick writes:
> On 09/06/2016 03:24 PM, Kenneth Graunke wrote:
>> On Tuesday, September 6, 2016 1:04:43 PM PDT Eric Anholt wrote:
>>> Kenneth Graunke writes:
>>>
Ian added this check in commit 259fc505454ea6a67aeacf6cdebf1398d9947759.
While reviewing the rules, I found a citatio
slightly improves performance for GpuTest /test=pixmark_piano /benchmark
/no_scorebox /msaa=0 /benchmark_duration_ms=6 /width=1024 /height=640
score: 1031 -> 1033
observed from the binary generated by nvidia
Signed-off-by: Karol Herbst
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_n
On Fri 09 Sep 2016, Jason Ekstrand wrote:
> Normally, using a non-linear tiling format helps improve cache locality by
> ensuring that neighboring pixels are usually close-by in memory. For RGB
> formats, this still sort-of holds, but it can also lead to rather terrible
> memory access patterns wh
Adam Jackson writes:
> KHR_no_config_context is virtually identical to MESA_configless_context,
> where they differ is only where the Mesa spec is silent, and for the
> most part the code already did what the Khronos spec wants. Fix up the
> one corner case, and mark the Mesa extension as superse
On Thu, Sep 8, 2016 at 4:31 PM, Samuel Pitoiset
wrote:
> Signed-off-by: Samuel Pitoiset
> ---
> src/compiler/glsl/builtin_variables.cpp | 2 ++
> src/compiler/shader_enums.h | 1 +
> 2 files changed, 3 insertions(+)
>
> diff --git a/src/compiler/glsl/builtin_variables.cpp
> b/src/co
This patch is
Reviewed-by: Ian Romanick
On 09/08/2016 01:31 PM, Samuel Pitoiset wrote:
> Signed-off-by: Samuel Pitoiset
> ---
> src/compiler/glsl/builtin_variables.cpp | 2 ++
> src/compiler/shader_enums.h | 1 +
> 2 files changed, 3 insertions(+)
>
> diff --git a/src/compiler/gls
On 09/08/2016 01:31 PM, Samuel Pitoiset wrote:
> Compute shaders can now include a fixed local size as defined by
> ARB_compute_shader or a variable size as defined by
> ARB_compute_variable_group_size.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/compiler/glsl/linker.cpp | 23
On 09/08/2016 01:31 PM, Samuel Pitoiset wrote:
> The ARB_compute_variable_group_size specification explains that
> when a compute shader includes both a fixed and a variable local
> size, a compile-time error occurs.
I probably would have squashed this in with the previous commit, but
it's fine ei
On 09/08/2016 01:31 PM, Samuel Pitoiset wrote:
> This is the new layout qualifier introduced by
> ARB_compute_variable_group_size which allows to use a variable work
> group size.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/compiler/glsl/ast.h | 5 +
> src/compiler/glsl/
On Fri, Sep 9, 2016 at 9:25 AM, Adam Jackson wrote:
> KHR_no_config_context is virtually identical to MESA_configless_context,
> where they differ is only where the Mesa spec is silent, and for the
> most part the code already did what the Khronos spec wants. Fix up the
> one corner case, and mark
On Fri, Sep 9, 2016 at 11:18 AM, Chad Versace
wrote:
> On Fri 09 Sep 2016, Jason Ekstrand wrote:
> > The restriction that Y-tiled surfaces must have valign == 4 only aplies
> to
> > render targets but we were applying it universally. This causes problems
> > if R32G32B32_SFLOAT is used because i
This patch is
Reviewed-by: Ian Romanick
I'm going to try to work through the rest of the glsl: patches today,
but I can't make any promises.
On 09/08/2016 01:31 PM, Samuel Pitoiset wrote:
> This also initializes the default values for the standalone compiler.
>
> Signed-off-by: Samuel Pitoiset
On 09/09/2016 05:29 AM, Marek Olšák wrote:
> On Fri, Sep 9, 2016 at 10:12 AM, Nicolai Hähnle wrote:
>> From: Nicolai Hähnle
>>
>> Not sure if it's possible to avoid programming the block size twice (once for
>> the userdata and once for the dispatch).
>>
>> Since the shaders are compiled with a p
On 09/09/2016 08:46 AM, Samuel Pitoiset wrote:
>
>
> On 09/08/2016 10:58 PM, Ian Romanick wrote:
>> On 09/08/2016 01:31 PM, Samuel Pitoiset wrote:
>>> Signed-off-by: Samuel Pitoiset
>>> ---
>>> .../glapi/gen/ARB_compute_variable_group_size.xml | 25
>>> ++
>>> src/mapi/glap
On Fri 09 Sep 2016, Jason Ekstrand wrote:
> The restriction that Y-tiled surfaces must have valign == 4 only aplies to
> render targets but we were applying it universally. This causes problems
> if R32G32B32_SFLOAT is used because it requires valign == 2; this should be
That
On Thu 08 Sep 2016, Nanley Chery wrote:
> Should the title the say needed instead of unneeded?
Oops :/ It's already pushed.
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On Fri, Sep 09, 2016 at 07:11:16AM -0700, Jason Ekstrand wrote:
>On Sep 8, 2016 11:13 PM, "Pohjolainen, Topi"
><[1]topi.pohjolai...@gmail.com> wrote:
>>
>> On Thu, Sep 08, 2016 at 08:49:56AM -0700, Jason Ekstrand wrote:
>> >On Sep 7, 2016 9:30 PM, "Pohjolainen, Topi"
>>
On Fri, 2016-09-09 at 11:27 +0100, Emil Velikov wrote:
> > On 8 September 2016 at 18:46, Adam Jackson wrote:
> > From: Kyle Brenneman
>
> Added a label to the _EGLThreadInfo, _EGLDisplay, and EGLResource
> structs. Implemented the function eglLabelObjectKHR.
>
>
> Coding style of the new hunk
On 09/09/2016 04:27 AM, Emil Velikov wrote:
On 8 September 2016 at 18:46, Adam Jackson wrote:
From: Kyle Brenneman
Added a label to the _EGLThreadInfo, _EGLDisplay, and EGLResource
structs. Implemented the function eglLabelObjectKHR.
Coding style of the new hunk follows the GLVND one, which
From: Nicolai Hähnle
It's really not necessary. Switch to an exponential resizing strategy.
---
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 15 +--
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
b/src/gallium/winsys/ra
From: Nicolai Hähnle
---
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 48 +--
src/gallium/winsys/radeon/drm/radeon_drm_cs.h | 6 ++--
2 files changed, 27 insertions(+), 27 deletions(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
b/src/gallium/winsys/r
From: Nicolai Hähnle
No need to call pb_cache_deinit, because the cache hasn't been initialized
at that point.
---
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
b/src/g
From: Nicolai Hähnle
The idea is to have matching init/deinit functions so that deinit can be
re-used for cleanup in the error path of amdgpu_winsys_create.
---
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/src/gallium/
From: Nicolai Hähnle
In some places (e.g. shader program pointers) we require 256 bytes alignment.
---
src/gallium/drivers/radeon/r600_pipe_common.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
b/src/gallium/drivers/radeon/r
From: Nicolai Hähnle
---
src/gallium/winsys/radeon/drm/radeon_drm_cs.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
index 76004c5..208452d 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs
From: Nicolai Hähnle
It's really not necessary.
---
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 20
1 file changed, 20 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 638c2d5..10a4416 100644
--- a/src/ga
From: Nicolai Hähnle
The fence that is added to the BO during flush is guaranteed to be
signaled after all the fences that were in the fences array of the BO
before the flush, because those fences are added as dependencies for the
submission (and all this happens atomically under the bo_fence_loc
From: Nicolai Hähnle
The radeonsi driver doesn't and shouldn't care about the buffer index.
Only the virtual addresses matter.
---
src/gallium/drivers/radeon/radeon_winsys.h | 3 +++
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 9 -
2 files changed, 3 insertions(+), 9 deletions(-)
diff
From: Nicolai Hähnle
While at it, try to be a little more robust in the face of memory allocation
failure.
---
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 113 ++
1 file changed, 70 insertions(+), 43 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
From: Nicolai Hähnle
---
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 53 ++-
src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 1 -
2 files changed, 17 insertions(+), 37 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
b/src/gallium/winsys/amdgpu/drm/a
From: Nicolai Hähnle
---
src/gallium/winsys/amdgpu/drm/amdgpu_bo.h | 1 -
src/gallium/winsys/radeon/drm/radeon_drm_bo.h | 1 -
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 1 -
3 files changed, 3 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h
b/src/galli
Hi,
this is a bunch of random cleanups in and related to radeon and amdgpu
winsyses.
There is one significant behavioral change, which is that amdgpu now only
keeps a single fence around for each buffer object. See the explanation
at that commit. Please review!
Thanks,
Nicolai
--
.../drivers/ra
Hi,
Can I do something to have it merged to the source tree?
Fix was already tested, works fine :)
regards
Łukasz Spintzyk
2016-09-05 18:48 GMT+02:00 Lukasz Spintzyk :
> This closes filedescriptor owned by kms_dri_sw_winsys struct. It fixes
> issue
> where removal of udl or evdi module used by
Now that we have the shiny new blorp_copy entrypoint that was added to
implement VkCopy* in the Vulkan driver, it's almost trivial to hook the GL
driver up to use it for glCopyImageSubData. What's nice about this new
entrypoint is that it can handle everything that glCopyImageSubData can
throw at
---
src/mesa/drivers/dri/i965/brw_blorp.c | 71 +++
src/mesa/drivers/dri/i965/brw_blorp.h | 10 +
2 files changed, 81 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 193c7a4..626c33c 100644
--- a/s
Normally, using a non-linear tiling format helps improve cache locality by
ensuring that neighboring pixels are usually close-by in memory. For RGB
formats, this still sort-of holds, but it can also lead to rather terrible
memory access patterns where a single RGB pixel value crosses a tile
bounda
---
src/mesa/drivers/dri/i965/intel_copy_image.c | 28 ++--
1 file changed, 6 insertions(+), 22 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_copy_image.c
b/src/mesa/drivers/dri/i965/intel_copy_image.c
index 1ca6003..7698d8e 100644
--- a/src/mesa/drivers/dri/i
The restriction that Y-tiled surfaces must have valign == 4 only aplies to
render targets but we were applying it universally. This causes problems
if R32G32B32_SFLOAT is used because it requires valign == 2; this should be
okay because you can't render to that format.
Signed-off-by: Jason Ekstra
This series is
Reviewed-by: Nicolai Hähnle
On 09.09.2016 17:05, Marek Olšák wrote:
From: Marek Olšák
There is no known test for this.
Cc: 12.0
---
src/gallium/drivers/radeonsi/si_compute.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/gallium/driver
On Fri, Sep 9, 2016 at 5:46 PM, Samuel Pitoiset
wrote:
>
>
> On 09/08/2016 10:58 PM, Ian Romanick wrote:
>>
>> On 09/08/2016 01:31 PM, Samuel Pitoiset wrote:
>>>
>>> Signed-off-by: Samuel Pitoiset
>>> ---
>>> .../glapi/gen/ARB_compute_variable_group_size.xml | 25
>>> ++
>>>
On 09/09/2016 06:31 PM, Marek Olšák wrote:
On Fri, Sep 9, 2016 at 5:46 PM, Samuel Pitoiset
wrote:
On 09/08/2016 10:58 PM, Ian Romanick wrote:
On 09/08/2016 01:31 PM, Samuel Pitoiset wrote:
Signed-off-by: Samuel Pitoiset
---
.../glapi/gen/ARB_compute_variable_group_size.xml | 25
+
Signed-off-by: Adam Jackson
---
docs/specs/MESA_configless_context.spec | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/docs/specs/MESA_configless_context.spec
b/docs/specs/MESA_configless_context.spec
index f2fafb3..d7ba62d 100644
--- a/docs/specs/MESA_configless_con
Keep the old name in the extension string, but refer to the KHR
extension internally.
Signed-off-by: Adam Jackson
---
src/egl/drivers/dri2/egl_dri2.c | 2 +-
src/egl/main/eglapi.c | 6 --
src/egl/main/eglcontext.c | 4 ++--
src/egl/main/egldisplay.h | 2 +-
4 files chan
KHR_no_config_context is virtually identical to MESA_configless_context,
where they differ is only where the Mesa spec is silent, and for the
most part the code already did what the Khronos spec wants. Fix up the
one corner case, and mark the Mesa extension as superseded.
- ajax
_
MESA_configless_context does not specify the interaction with
QueryContext at all, and the code to generate an error in this case
predates the Mesa extension. Since EGL_NO_CONFIG_{KHR,MESA} are
numerically identical there's no way to distinguish which one the
application asked for, so use the KHR b
On 09.09.2016 18:07, Samuel Pitoiset wrote:
On 09/09/2016 02:37 PM, Ilia Mirkin wrote:
On Fri, Sep 9, 2016 at 8:29 AM, Marek Olšák wrote:
On Fri, Sep 9, 2016 at 10:12 AM, Nicolai Hähnle
wrote:
From: Nicolai Hähnle
Not sure if it's possible to avoid programming the block size twice
(once
On 09/09/2016 02:37 PM, Ilia Mirkin wrote:
On Fri, Sep 9, 2016 at 8:29 AM, Marek Olšák wrote:
On Fri, Sep 9, 2016 at 10:12 AM, Nicolai Hähnle wrote:
From: Nicolai Hähnle
Not sure if it's possible to avoid programming the block size twice (once for
the userdata and once for the dispatch).
On 09/09/2016 10:12 AM, Nicolai Hähnle wrote:
From: Nicolai Hähnle
Not sure if it's possible to avoid programming the block size twice (once for
the userdata and once for the dispatch).
Since the shaders are compiled with a pessimistic upper limit on the number of
registers, asynchronously c
On 09/09/2016 09:43 AM, Nicolai Hähnle wrote:
Hi Samuel,
Hi,
thanks for working on this! I've only skimmed the series so far without
looking at each patch in detail:
For GCN, we need to pass the (maximum) work group size (aka block size /
local group size) into the compiler, because it af
On 09/09/2016 04:02 PM, Marek Olšák wrote:
For patches 8, 9:
Reviewed-by: Marek Olšák
Patch 10 won't work for us, because radeonsi (and presumably softpipe
as well) don't support this feature at the moment. Also, I would
prefer a PIPE_CAP for MaxComputeVariableGroupInvocations and the
extens
On 09/08/2016 10:58 PM, Ian Romanick wrote:
On 09/08/2016 01:31 PM, Samuel Pitoiset wrote:
Signed-off-by: Samuel Pitoiset
---
src/mesa/main/api_validate.c | 94
src/mesa/main/api_validate.h | 4 ++
src/mesa/main/compute.c | 17 ++
In case of prime when rendering is done on GPU other then the
server GPU, use a seprate linear buffer for each back buffer
which will be displayed using present extension.
v2: Use a seprate linear buffer for each back buffer (Michel)
v3: change variable names and fix coding style (Leo and Emil)
S
On 09/08/2016 10:58 PM, Ian Romanick wrote:
On 09/08/2016 01:31 PM, Samuel Pitoiset wrote:
Signed-off-by: Samuel Pitoiset
---
.../glapi/gen/ARB_compute_variable_group_size.xml | 25 ++
src/mapi/glapi/gen/Makefile.am | 1 +
src/mapi/glapi/gen/gl_API.x
The comments from Emil can be summarized into the following code:
if (offsets) {
offsets[0] = 0;
EGLint img_offset = 0;
bool ret = dri2_dpy->image->queryImage(dri2_img->dri_image,
__DRI_IMAGE_ATTRIB_OFFSET, &img_offset);
if(ret == true)
offset
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_compute.c| 2 +-
src/gallium/drivers/radeonsi/si_cp_dma.c | 2 +-
src/gallium/drivers/radeonsi/si_hw_context.c | 2 +-
src/gallium/drivers/radeonsi/si_pipe.h | 1 -
src/gallium/drivers/radeonsi/si_state.c | 1 -
src/ga
From: Marek Olšák
---
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 612a876..9de00c2 100644
--- a/src/gallium/wins
From: Marek Olšák
There is no known test for this.
Cc: 12.0
---
src/gallium/drivers/radeonsi/si_compute.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_compute.c
b/src/gallium/drivers/radeonsi/si_compute.c
index f43c616..d988
From: Marek Olšák
---
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 73c8a97..0bb916e 100644
--- a/src/gallium/
From: Marek Olšák
Based on the VGT spec.
The Vulkan driver doesn't do it optimally and they plan to fix it.
---
src/gallium/drivers/radeonsi/si_state_draw.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c
b/src/galliu
On 9 September 2016 at 15:26, Kyle Brenneman wrote:
> Would it be better to use the new upstream version of eglext.h and add the
> #includes, or to keep Mesa's existing eglext.h and add the missing
> declarations for EGL_KHR_debug?
>
Afaict we've been doing the former every(?) time.
Thanks
Emil
_
Hi Nayan,
Besides Emil's comments, here is some others in lines.
On 09/09/2016 09:17 AM, Nayan Deshmukh wrote:
use a linear buffer in case of back buffer
v2: Use a seprate linear buffer for each back buffer
Signed-off-by: Nayan Deshmukh
---
src/gallium/auxiliary/vl/vl_winsys_dri3.c | 82 ++
Would it be better to use the new upstream version of eglext.h and add
the #includes, or to keep Mesa's existing eglext.h and add the missing
declarations for EGL_KHR_debug?
-Kyle
On 09/09/2016 03:31 AM, Emil Velikov wrote:
On 8 September 2016 at 18:46, Adam Jackson wrote:
From: Kyle Brenne
On Sep 8, 2016 11:13 PM, "Pohjolainen, Topi"
wrote:
>
> On Thu, Sep 08, 2016 at 08:49:56AM -0700, Jason Ekstrand wrote:
> >On Sep 7, 2016 9:30 PM, "Pohjolainen, Topi"
> ><[1]topi.pohjolai...@gmail.com> wrote:
> >>
> >> On Wed, Sep 07, 2016 at 03:25:30PM -0700, Jason Ekstrand wrote:
On Fri, Sep 9, 2016 at 7:03 PM, Emil Velikov
wrote:
> Hi Nayan,
>
> Just a couple of fly-by comments. As always don't read too much into them.
>
> On 9 September 2016 at 14:17, Nayan Deshmukh
> wrote:
> > use a linear buffer in case of back buffer
> >
> You might want to mention a bit more about
From: Marek Olšák
radeonsi depends on the interp flags a little bit too much.
This fixes 9 randomly failing tests:
GL45-CTS.shader_multisample_interpolation.render.interpolate_at_centroid.*
---
src/gallium/auxiliary/tgsi/tgsi_scan.c | 105 ++---
1 file changed, 57
From: Marek Olšák
This fixes 66 CTS tests on st/mesa.
Cc: 12.0
---
src/mesa/main/fbobject.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 2c01526..09da6b7 100644
--- a/src/mesa/main/fbobject.c
+++
From: Marek Olšák
This fixes 8 fs-interpolateat* piglit crashes on radeonsi, because it can't
handle non-input operands in interpolateAt*.
---
src/compiler/glsl/link_varyings.cpp | 5 +
src/compiler/glsl/opt_algebraic.cpp | 10 ++
2 files changed, 15 insertions(+)
diff --git a/src/
For patches 8, 9:
Reviewed-by: Marek Olšák
Patch 10 won't work for us, because radeonsi (and presumably softpipe
as well) don't support this feature at the moment. Also, I would
prefer a PIPE_CAP for MaxComputeVariableGroupInvocations and the
extension can be exposed based on that CAP.
Marek
Hi Nayan,
Just a couple of fly-by comments. As always don't read too much into them.
On 9 September 2016 at 14:17, Nayan Deshmukh wrote:
> use a linear buffer in case of back buffer
>
You might want to mention a bit more about the implementation and/or
why doing things like X won't work/is bad i
use a linear buffer in case of back buffer
v2: Use a seprate linear buffer for each back buffer
Signed-off-by: Nayan Deshmukh
---
src/gallium/auxiliary/vl/vl_winsys_dri3.c | 82 ---
1 file changed, 63 insertions(+), 19 deletions(-)
diff --git a/src/gallium/auxiliary
On 8 September 2016 at 19:46, Mark Kettenis wrote:
>> From: Emil Velikov
>> Date: Thu, 8 Sep 2016 18:57:44 +0100
>>
>> On 1 September 2016 at 18:23, Jonathan Gray wrote:
>> > OpenBSD now has strict W^X enforcement. Processes that violate
>> > the policy get killed by the kernel. Don't attempt
On 8 September 2016 at 18:47, Adam Jackson wrote:
> Treat a null attribute list as meaning "don't change attributes". This
> is semantically equivalent to a list consisting of just EGL_NONE.
>
Same as before - please don't introduce known buggy code with one
patch only to fix it with a latter one
On 8 September 2016 at 18:47, Adam Jackson wrote:
> From: Kyle Brenneman
>
> Change a few EGL entrypoints to call a common internal function instead
> of forwarding to another entrypoint.
>
> If one EGL entrypoint calls another, then the second entrypoint would
> overwrite the current function na
On Fri, Sep 9, 2016 at 8:29 AM, Marek Olšák wrote:
> On Fri, Sep 9, 2016 at 10:12 AM, Nicolai Hähnle wrote:
>> From: Nicolai Hähnle
>>
>> Not sure if it's possible to avoid programming the block size twice (once for
>> the userdata and once for the dispatch).
>>
>> Since the shaders are compiled
On 9 September 2016 at 08:58, Chuanbo Weng wrote:
> The offset should not always be 0. For example, if EGLImage is
> created from a 2D texture with EGL_GL_TEXTURE_LEVEL=1, then the
> offset should be the actual start of miplevel 1 in bo.
>
> v2: Add version check of __DRIimageExtension implementat
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