[Mesa-dev] [PATCH 4/4] gallium: Use STATIC_ASSERT whenever possible.

--- src/gallium/auxiliary/rtasm/rtasm_x86sse.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_lowering.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_parse.c| 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/auxiliary/rtasm/rtasm_x86sse.c b/src/gallium/auxiliary/rtasm/rtas

[Mesa-dev] [PATCH 3/4] softpipe: Use STATIC_ASSERT whenever possible.

--- src/gallium/drivers/softpipe/sp_tile_cache.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/softpipe/sp_tile_cache.c b/src/gallium/drivers/softpipe/sp_tile_cache.c index 9cc8ac1..c623326 100644 --- a/src/gallium/drivers/softpipe/sp_tile_cache.c +++

[Mesa-dev] [PATCH 2/4] svga: Use STATIC_ASSERT whenever possible.

--- src/gallium/drivers/svga/svga_pipe_depthstencil.c | 6 +++--- src/gallium/drivers/svga/svga_state_rss.c | 4 ++-- src/gallium/drivers/svga/svga_state_tss.c | 4 ++-- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/svga/svga_pipe_depthstencil.c

[Mesa-dev] [PATCH 1/4] mesa: Use STATIC_ASSERT whenever possible.

--- src/mesa/main/imports.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/imports.c b/src/mesa/main/imports.c index 14cd588..fe54109 100644 --- a/src/mesa/main/imports.c +++ b/src/mesa/main/imports.c @@ -262,7 +262,7 @@ ffsll(long long int val) { int bit;

Re: [Mesa-dev] [PATCH] st/mesa: replace _mesa_sysval_to_semantic table with function

On 11/04/16 23:39, Brian Paul wrote: Instead of using an array indexed by SYSTEM_VALUE_x, just use a switch statement. This fixes a regression caused by inserting new SYSTEM_VALUE_ enums but not updating the mapping to TGSI semantics. v2: fix a few switch statement mistakes for compute-related

[Mesa-dev] [AppVeyor] mesa master #863 completed

Build mesa 863 completed Commit afa8707ba9 by Dave Airlie on 4/11/2016 3:02 AM: softpipe: add SSBO/shader atomics support.\n\nThis adds support for the features requires for ARB_shader_storage_buffer_object\nand ARB_shader_atomic_counters, ARB_shader_atomic_cou

Re: [Mesa-dev] [PATCH RFC] gallium/swr: fold the almost identical Makefiles

Thanks for looking at this. I didn’t realize that automake was smart enough to generate separate targets for the overlapping object files; had figured that would be a collision. I notice you removed the install-gallium-links portion of the makefile, which you had pointed out before as being a

Re: [Mesa-dev] [PATCH 1/2] glsl: Add a method to print error messages for illegal qualifiers.

On Mon, 2016-04-11 at 18:39 -0700, Kenneth Graunke wrote: > Suggested by Timothy Arceri a while back on mesa-dev: > https://lists.freedesktop.org/archives/mesa-dev/2016- > February/107735.html Thanks for doing this. With the tabs Matt pointed out removed both patches are Reviewed-by: Timothy Arcer

Re: [Mesa-dev] [PATCH 1/2] glsl: Add a method to print error messages for illegal qualifiers.

On Mon, Apr 11, 2016 at 6:39 PM, Kenneth Graunke wrote: > Suggested by Timothy Arceri a while back on mesa-dev: > https://lists.freedesktop.org/archives/mesa-dev/2016-February/107735.html > > Signed-off-by: Kenneth Graunke > --- > src/compiler/glsl/ast.h| 5 +++ > src/compiler/glsl/ast_

[Mesa-dev] [AppVeyor] mesa master #862 failed

Build mesa 862 failed Commit 193a5cee6a by Ian Romanick on 4/12/2016 1:40 AM: nir: Fix typo in comment\n\nTrivial.\n\nSigned-off-by: Ian Romanick Configure your notification preferences ___ mesa-dev mailin

[Mesa-dev] [PATCH 1/2] glsl: Add a method to print error messages for illegal qualifiers.

Suggested by Timothy Arceri a while back on mesa-dev: https://lists.freedesktop.org/archives/mesa-dev/2016-February/107735.html Signed-off-by: Kenneth Graunke --- src/compiler/glsl/ast.h| 5 +++ src/compiler/glsl/ast_type.cpp | 85 ++ 2 files chan

[Mesa-dev] [PATCH 2/2] glsl: Reject illegal qualifiers on atomic counter uniforms.

This fixes dEQP-GLES31.functional.uniform_location.negative.atomic_fragment dEQP-GLES31.functional.uniform_location.negative.atomic_vertex Both of which have lines like layout(location = 3, binding = 0, offset = 0) uniform atomic_uint uni0; The ARB_explicit_uniform_location spec makes a very ta

Re: [Mesa-dev] [PATCH] st/mesa: replace _mesa_sysval_to_semantic table with function

Am 12.04.2016 um 02:04 schrieb Jason Ekstrand: > > > On Mon, Apr 11, 2016 at 4:31 PM, Roland Scheidegger > wrote: > > Am 12.04.2016 um 00:39 schrieb Brian Paul: > > Instead of using an array indexed by SYSTEM_VALUE_x, just use a > > switch statement. This

Re: [Mesa-dev] [PATCH 2/4] i965/tiled_memcpy: Move SSSE3 code back into inline functions.

Am 12.04.2016 um 02:03 schrieb Matt Turner: > On Mon, Apr 11, 2016 at 4:17 PM, Roland Scheidegger > wrote: >> I thought void ptr arithmetic is illegal (though a gcc extension), so >> maybe should avoid that? > > Right, it's a GNU C extension. I was aware I was using it, and I think > it makes th

Re: [Mesa-dev] [PATCH 1/4] nir: Do basic constant reassociation.

On Thu, Apr 7, 2016 at 4:35 PM, Kenneth Graunke wrote: > Many shaders contain expression trees of the form: > > const_1 * (value * const_2) > > Reorganizing these to > > (const_1 * const_2) * value > > will allow constant folding to combine the constants. Sometimes, these > constants are

Re: [Mesa-dev] [PATCH] st/mesa: replace _mesa_sysval_to_semantic table with function

On Mon, Apr 11, 2016 at 4:31 PM, Roland Scheidegger wrote: > Am 12.04.2016 um 00:39 schrieb Brian Paul: > > Instead of using an array indexed by SYSTEM_VALUE_x, just use a > > switch statement. This fixes a regression caused by inserting new > > SYSTEM_VALUE_ enums but not updating the mapping t

Re: [Mesa-dev] [PATCH 2/4] i965/tiled_memcpy: Move SSSE3 code back into inline functions.

On Mon, Apr 11, 2016 at 4:17 PM, Roland Scheidegger wrote: > I thought void ptr arithmetic is illegal (though a gcc extension), so > maybe should avoid that? Right, it's a GNU C extension. I was aware I was using it, and I think it makes the code a lot nicer here, avoiding some casts or extra var

Re: [Mesa-dev] [PATCH 4/4] softpipe: add SSBO/shader atomics support.

Am 11.04.2016 um 05:20 schrieb Dave Airlie: > From: Dave Airlie > > This adds support for the features requires for > ARB_shader_storage_buffer_object > and ARB_shader_atomic_counters, ARB_shader_atomic_counter_ops. > > Signed-off-by: Dave Airlie > --- > docs/GL3.txt

[Mesa-dev] [PATCH] nir/clone: Copy bit size when cloning registers

Reported-by: Mark Janes Cc: Eduardo Lima Mitev --- src/compiler/nir/nir_clone.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/compiler/nir/nir_clone.c b/src/compiler/nir/nir_clone.c index e889f19..e231387 100644 --- a/src/compiler/nir/nir_clone.c +++ b/src/compiler/nir/nir_clone.c @@ -

Re: [Mesa-dev] [PATCH 2/5] radeonsi: use guard band clipping

On Mon, Apr 11, 2016 at 7:37 PM, Nicolai Hähnle wrote: > On 10.04.2016 17:34, Marek Olšák wrote: >> >> From: Marek Olšák >> >> Guard band clipping speeds up rasterization for primitives that are >> partially off-screen. This change in particular results in small >> framerate improvements in a wi

Re: [Mesa-dev] [PATCH] st/mesa: replace _mesa_sysval_to_semantic table with function

Am 12.04.2016 um 00:39 schrieb Brian Paul: > Instead of using an array indexed by SYSTEM_VALUE_x, just use a > switch statement. This fixes a regression caused by inserting new > SYSTEM_VALUE_ enums but not updating the mapping to TGSI semantics. > > v2: fix a few switch statement mistakes for co

Re: [Mesa-dev] [PATCH 0/3] nir: Convert nir_variable_mode to a bitfield

On Mon, Apr 11, 2016 at 6:48 PM, Eric Anholt wrote: > Jason Ekstrand writes: > >> This tiny series converts nir_var_mode to be a bitfield instead of a >> regular enum and then converts two of the passes that currently take a mode >> to handle the new bitfield. The reason for this is that a numbe

Re: [Mesa-dev] [PATCH 2/4] i965/tiled_memcpy: Move SSSE3 code back into inline functions.

On 04/11/2016 05:17 PM, Roland Scheidegger wrote: Am 11.04.2016 um 21:05 schrieb Matt Turner: This will make adding SSE2 code a lot cleaner. --- src/mesa/drivers/dri/i965/intel_tiled_memcpy.c | 42 +++--- 1 file changed, 24 insertions(+), 18 deletions(-) diff --git a/src/

Re: [Mesa-dev] [PATCH 1/4] i965/tiled_memcpy: Optimize RGBA -> BGRA swizzle.

Am 11.04.2016 um 21:05 schrieb Matt Turner: > Replaces four byte loads and four byte stores with a load, bswap, > rotate, store; or a movbe, rotate, store. > --- > src/mesa/drivers/dri/i965/intel_tiled_memcpy.c | 19 +++ > 1 file changed, 11 insertions(+), 8 deletions(-) > > diff

Re: [Mesa-dev] [PATCH 2/4] i965/tiled_memcpy: Move SSSE3 code back into inline functions.

Am 11.04.2016 um 21:05 schrieb Matt Turner: > This will make adding SSE2 code a lot cleaner. > --- > src/mesa/drivers/dri/i965/intel_tiled_memcpy.c | 42 > +++--- > 1 file changed, 24 insertions(+), 18 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy

Re: [Mesa-dev] [PATCH] st/mesa: replace _mesa_sysval_to_semantic table with function

Reviewed-by: Ilia Mirkin On Mon, Apr 11, 2016 at 6:39 PM, Brian Paul wrote: > Instead of using an array indexed by SYSTEM_VALUE_x, just use a > switch statement. This fixes a regression caused by inserting new > SYSTEM_VALUE_ enums but not updating the mapping to TGSI semantics. > > v2: fix a f

Re: [Mesa-dev] [PATCH] dri: Fix robust context creation via EGL attribute

Reviewed-by: Marek Olšák Marek On Tue, Apr 12, 2016 at 1:34 AM, Chad Versace wrote: > driCreateContextAttribs() emits an error if bit > __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS is set for an ES context. But, > EGL_EXT_create_context_robustness and EGL 1.5 both allow creation of > robust ES contexts

Re: [Mesa-dev] [PATCH 0/3] nir: Convert nir_variable_mode to a bitfield

Jason Ekstrand writes: > This tiny series converts nir_var_mode to be a bitfield instead of a > regular enum and then converts two of the passes that currently take a mode > to handle the new bitfield. The reason for this is that a number of > different passes want to be able to act on some subs

[Mesa-dev] [PATCH] st/mesa: replace _mesa_sysval_to_semantic table with function

Instead of using an array indexed by SYSTEM_VALUE_x, just use a switch statement. This fixes a regression caused by inserting new SYSTEM_VALUE_ enums but not updating the mapping to TGSI semantics. v2: fix a few switch statement mistakes for compute-related enums --- src/mesa/state_tracker/st_gl

Re: [Mesa-dev] [PATCH] radeonsi: Synchronize a streamout write after read hazard.

Reviewed-by: Marek Olšák Marek On Mon, Apr 11, 2016 at 4:04 PM, Bas Nieuwenhuizen wrote: > Signed-off-by: Bas Nieuwenhuizen > --- > src/gallium/drivers/radeonsi/si_descriptors.c | 6 ++ > 1 file changed, 6 insertions(+) > > diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c > b/s

Re: [Mesa-dev] [PATCH] st/mesa: replace _mesa_sysval_to_semantic table with function

Am 12.04.2016 um 00:30 schrieb Brian Paul: > Instead of using an array indexed by SYSTEM_VALUE_x, just use a > switch statement. This fixes a regression caused by inserting new > SYSTEM_VALUE_ enums but not updating the mapping to TGSI semantics. > --- > src/mesa/state_tracker/st_glsl_to_tgsi.cpp

Re: [Mesa-dev] [PATCH] st/mesa: replace _mesa_sysval_to_semantic table with function

On Mon, Apr 11, 2016 at 6:30 PM, Brian Paul wrote: > Instead of using an array indexed by SYSTEM_VALUE_x, just use a > switch statement. This fixes a regression caused by inserting new > SYSTEM_VALUE_ enums but not updating the mapping to TGSI semantics. > --- > src/mesa/state_tracker/st_glsl_to

Re: [Mesa-dev] [PATCH] st/mesa: replace _mesa_sysval_to_semantic table with function

On 04/11/2016 04:30 PM, Brian Paul wrote: Instead of using an array indexed by SYSTEM_VALUE_x, just use a switch statement. This fixes a regression caused by inserting new SYSTEM_VALUE_ enums but not updating the mapping to TGSI semantics. --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 132 +

[Mesa-dev] [PATCH] dri: Fix robust context creation via EGL attribute

driCreateContextAttribs() emits an error if bit __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS is set for an ES context. But, EGL_EXT_create_context_robustness and EGL 1.5 both allow creation of robust ES contexts. One requests a robust ES context by setting the EGL_CONTEXT_OPENGL_ROBUST_ACCESS *attribute*,

[Mesa-dev] [PATCH] st/mesa: replace _mesa_sysval_to_semantic table with function

Instead of using an array indexed by SYSTEM_VALUE_x, just use a switch statement. This fixes a regression caused by inserting new SYSTEM_VALUE_ enums but not updating the mapping to TGSI semantics. --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 132 ++--- src/mesa/state_

Re: [Mesa-dev] [PATCH 10/10] r600g: use endian_format in texture swapping function

These patches are OK as far as I'm concerned. Marek On Mon, Apr 11, 2016 at 4:34 PM, Oded Gabbay wrote: > For some texture formats we need to take endian_format into account when > configuring their swizzling. We also need to take into account those > formats when we use staging textures. > > Si

Re: [Mesa-dev] [PATCH 12/26] glsl/shader_enums: Add the other two compute builtins

Am 11.04.2016 um 23:50 schrieb Jose Fonseca: > On 25/03/16 23:12, Jason Ekstrand wrote: >> These weren't added before because they are actually calculated values >> that >> are computed from other inputs. However, in order to handle them in >> nir_lower_system_values, it's nice for them to have a

Re: [Mesa-dev] [PATCH 12/26] glsl/shader_enums: Add the other two compute builtins

On 04/11/2016 03:50 PM, Jose Fonseca wrote: On 25/03/16 23:12, Jason Ekstrand wrote: These weren't added before because they are actually calculated values that are computed from other inputs. However, in order to handle them in nir_lower_system_values, it's nice for them to have a cannonical l

Re: [Mesa-dev] [PATCH 12/26] glsl/shader_enums: Add the other two compute builtins

On 25/03/16 23:12, Jason Ekstrand wrote: These weren't added before because they are actually calculated values that are computed from other inputs. However, in order to handle them in nir_lower_system_values, it's nice for them to have a cannonical locaiton. --- src/compiler/shader_enums.c |

[Mesa-dev] 0001-va-check-null-context-in-vlVaDestroyContext.patch

>From d6a5bbd910dc19d4863dbac8eba5bdf07bd1c3ab Mon Sep 17 00:00:00 2001 From: GreatMaster Date: Mon, 11 Apr 2016 21:37:02 +0100 Subject: [PATCH] va: check null context in vlVaDestroyContext --- src/gallium/state_trackers/va/context.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gall

Re: [Mesa-dev] [PATCH 03/10] mesa/st: add endian_format field to struct pipe_resource

I haven't read the following patches, but it looks like you can override endian_format by passing that flag into transfer_map. Alternatively, you could do the byteswapping in transfer_map by always using the blit there. That means all resources would be in LE in hw and the pipe_resource flag could

[Mesa-dev] 0001-va-check-null-context-in-vlVaDestroyContext.patch

>From d6a5bbd910dc19d4863dbac8eba5bdf07bd1c3ab Mon Sep 17 00:00:00 2001 From: GreatMaster Date: Mon, 11 Apr 2016 21:37:02 +0100 Subject: [PATCH] va: check null context in vlVaDestroyContext --- src/gallium/state_trackers/va/context.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gall

Re: [Mesa-dev] [PATCH 05/10] radeonsi: fix calls to r600 functions that take endian_format

This should be squashed with the patch changing those function signatures. Marek On Mon, Apr 11, 2016 at 4:34 PM, Oded Gabbay wrote: > radeonsi calls some r600 functions that now receive the endian_format > value as a parameter, so we need to fix the calls to prevent compilation > errors. > > Si

[Mesa-dev] [PATCH 2/3] nir/lower_indirect: nir_variable_mode is now a bitfield

--- src/compiler/nir/nir.h | 2 +- src/compiler/nir/nir_lower_indirect_derefs.c | 12 ++-- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 4c9ddc8..18e3360 100644 --- a/src/compiler/nir/nir.h +++ b/

[Mesa-dev] [PATCH 1/3] nir: Convert nir_variable_mode to a bitfield

This way we can specify multiple modes in passes. --- src/compiler/nir/nir.h | 33 - src/compiler/nir/nir_validate.c | 3 +++ 2 files changed, 19 insertions(+), 17 deletions(-) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 3149824..4c

[Mesa-dev] [PATCH 3/3] nir/lower_io: Allow for a full bitmask of modes

--- src/compiler/nir/nir.h | 2 +- src/compiler/nir/nir_lower_io.c | 12 ++-- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 18e3360..d42878c 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@

[Mesa-dev] [PATCH 0/3] nir: Convert nir_variable_mode to a bitfield

This tiny series converts nir_var_mode to be a bitfield instead of a regular enum and then converts two of the passes that currently take a mode to handle the new bitfield. The reason for this is that a number of different passes want to be able to act on some subset of the modes and can run more

Re: [Mesa-dev] [PATCH 26/26] nir/dead_variables: Configurably work with any variable mode

On Mon, Apr 11, 2016 at 2:58 AM, Jason Ekstrand wrote: > On Sat, Mar 26, 2016 at 3:00 PM, Rob Clark wrote: >> >> On Sat, Mar 26, 2016 at 5:43 PM, Jason Ekstrand >> wrote: >> > On Sat, Mar 26, 2016 at 8:22 AM, Rob Clark wrote: >> >> btw, I do remember for lower_io I wanted the mode to be a bitma

Re: [Mesa-dev] [PATCH] i965: Work around SIN/COS output range problem.

On 22/03/16 23:31, Ian Romanick wrote: On 03/17/2016 09:18 AM, Martin Peres wrote: On 16/03/16 19:33, Kenneth Graunke wrote: The SIN and COS instructions on Intel hardware can produce values slightly outside of the [-1.0, 1.0] range for a small set of values. Obviously, this can break everyone'

Re: [Mesa-dev] [PATCH] gallium/radeon: add an env variable to force a level of aniso filtering

radeon and r200 have a driconf option that is similar to this. It sets a default initial max anisotropy value. Maybe that would be better? On 04/11/2016 11:48 AM, Marek Olšák wrote: > From: Marek Olšák > > --- > src/gallium/drivers/r600/evergreen_state.c| 10 +++--- > src/gallium/driv

Re: [Mesa-dev] [PATCH 0/3] R600-GCN: Improving performance on APUs & IGPs

On Mon, Apr 11, 2016 at 3:02 PM, Marek Olšák wrote: > Hi, > > This disables buffer moves between VRAM and GTT by setting both of them as > preferred heaps for APUs and IGPs. > > Allocations go to VRAM if there is free space. If not, they go to GTT. If a > buffer is evicted from VRAM to GTT, it w

[Mesa-dev] [PATCH 1/4] i965/tiled_memcpy: Optimize RGBA -> BGRA swizzle.

Replaces four byte loads and four byte stores with a load, bswap, rotate, store; or a movbe, rotate, store. --- src/mesa/drivers/dri/i965/intel_tiled_memcpy.c | 19 +++ 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c b/

[Mesa-dev] [PATCH 4/4] i965/tiled_memcpy: Unroll bytes==64 case.

--- src/mesa/drivers/dri/i965/intel_tiled_memcpy.c | 16 1 file changed, 16 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c index 04a348a..b61a842 100644 --- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy

[Mesa-dev] [PATCH 2/4] i965/tiled_memcpy: Move SSSE3 code back into inline functions.

This will make adding SSE2 code a lot cleaner. --- src/mesa/drivers/dri/i965/intel_tiled_memcpy.c | 42 +++--- 1 file changed, 24 insertions(+), 18 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c index

[Mesa-dev] [PATCH 3/4] i965/tiled_memcpy: Provide SSE2 for RGBA8 <-> BGRA8 swizzle.

From: Roland Scheidegger The existing code uses SSSE3, and because it isn't compiled in a separate file compiled with that, it is usually not used (that, of course, could be fixed...), whereas SSE2 is always present with 64-bit builds. This should be pretty much as fast as the pshufb version, al

[Mesa-dev] [PATCH 3/3] gallium/radeon: set GTT WC on tiled textures

From: Marek Olšák Just for consistency. This should have no effect, because OpenGL textures always go to VRAM. --- src/gallium/drivers/radeon/r600_buffer_common.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/

[Mesa-dev] [PATCH 2/3] gallium/radeon: relax requirements on VRAM placements on APUs

From: Marek Olšák This makes Tonga with vramlimit=128 2x faster in Heaven. --- src/gallium/drivers/radeon/r600_buffer_common.c | 8 src/gallium/drivers/radeon/radeon_winsys.h| 1 + src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 4 src/gallium/winsys/radeon/drm/rad

[Mesa-dev] [PATCH 0/3] R600-GCN: Improving performance on APUs & IGPs

Hi, This disables buffer moves between VRAM and GTT by setting both of them as preferred heaps for APUs and IGPs. Allocations go to VRAM if there is free space. If not, they go to GTT. If a buffer is evicted from VRAM to GTT, it will stay there. If it's evicted from GTT to swap, it can later b

[Mesa-dev] [PATCH 1/3] winsys/amdgpu: remove hack for low VRAM configuration

From: Marek Olšák A better solution will be used. --- src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 10 -- 1 file changed, 10 deletions(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index 04ef17d..1b2793a 100644 --- a/src/gallium/wi

Re: [Mesa-dev] [RFC PATCH] GBM: Add map/unmap functions

On Wed, Mar 30, 2016 at 11:21 PM, Rob Herring wrote: > This adds GBM map and unmap functions. Unlike prior attempts, this > version provides a region and usage flags for the mapping. The operation > follows gallium transfer_map() function. This is complete enough to work > on Android with gralloc

Re: [Mesa-dev] [PATCH 1/5] include/GL: add mesa_glinterop.h for OpenGL-OpenCL interop (v3)

On 9 April 2016 at 01:21, Marek Olšák wrote: > On Fri, Apr 1, 2016 at 2:13 PM, Emil Velikov wrote: >> On 16 March 2016 at 10:40, Marek Olšák wrote: >> >>> "offset_after" isn't nasty. :) Yeah, I was inspired by other APIs I >>> had seen. The sizes make even more sense when they are function >>> p

[Mesa-dev] [PATCH] gallium/radeon: add an env variable to force a level of aniso filtering

From: Marek Olšák --- src/gallium/drivers/r600/evergreen_state.c| 10 +++--- src/gallium/drivers/r600/r600_state.c | 10 +++--- src/gallium/drivers/radeon/r600_pipe_common.c | 7 +++ src/gallium/drivers/radeon/r600_pipe_common.h | 3 +++ src/gallium/drivers/radeonsi/si_

Re: [Mesa-dev] [RFC PATCH] GBM: Add map/unmap functions

On 04/11/2016 04:31 PM, Rob Clark wrote: > On Mon, Apr 11, 2016 at 10:09 AM, Emil Velikov > wrote: >> Hi Rob, >> >> On 31 March 2016 at 04:21, Rob Herring wrote: >>> This adds GBM map and unmap functions. Unlike prior attempts, this >>> version provides a region and usage flags for the mapping.

Re: [Mesa-dev] [PATCH 2/2] i965/tiled_memcpy: Protect against wrong alignments

On 04/05/2016 10:19 AM, Jason Ekstrand wrote: > On Tue, Apr 5, 2016 at 10:12 AM, Roland Scheidegger > wrote: > > Do you plan on reapplying the code which was > reverted due to bug 93962 mentioned there? > (Though honestly that code was part 2 of a 4-part ser

[Mesa-dev] [PATCH RFC] gallium/swr: fold the almost identical Makefiles

From: Emil Velikov Rather than having two almost identical Makefiles, with various VPATH hacks just fold them, using COMMON_* variables and actually getting things buildable/shipable. Cc: Tim Rowley Signed-off-by: Emil Velikov --- Tim, can you double check/continue the work started. It seems

Re: [Mesa-dev] [PATCH] radeonsi: Synchronize a streamout write after read hazard.

On Mon, Apr 11, 2016 at 7:12 PM, Nicolai Hähnle wrote: > Sounds right to me. Do you have a test case that fails without it? > The synchronization test that I send to the piglit list has it as a subtest. - Bas ___ mesa-dev mailing list mesa-dev@lists.fr

Re: [Mesa-dev] Newbie task to get started

On 11.04.2016 12:13, Jakob Sinclair wrote: On 2016-04-11 17:25, Ilia Mirkin wrote: On Mon, Apr 11, 2016 at 11:18 AM, Jakob Sinclair wrote: Thanks for the tips! I have been looking at the ARB_shader_image_load_store and ARB_shader_image size extensions for GL ES 3.1 and noticed that the rade

Re: [Mesa-dev] [PATCH 0/5] R600, GCN: Guard Band support

Assuming that this has been tested, and with comments on patch #2 addressed, Reviewed-by: Nicolai Hähnle On 10.04.2016 17:34, Marek Olšák wrote: Hi, This patch series adds Guard Band support into r600g and radeonsi. It first implements the Guard Band in radeonsi, then it moves all radeonsi s

Re: [Mesa-dev] [PATCH] mesa: enable ARB_explicit_uniform_location for swrast

Does any driver that supports GLSL not support this extension? Maybe we could condition this extension and ARB_explicit_attrib_location on ARB_vertex_shader... and delete the other two enable flags. On 04/08/2016 05:54 PM, Timothy Arceri wrote: > This is untested but since ARB_explicit_attrib_loc

Re: [Mesa-dev] [PATCH 2/5] radeonsi: use guard band clipping

On 10.04.2016 17:34, Marek Olšák wrote: From: Marek Olšák Guard band clipping speeds up rasterization for primitives that are partially off-screen. This change in particular results in small framerate improvements in a wide range of games. Started by Grigori Goronzy . --- src/gallium/driver

Re: [Mesa-dev] Newbie task to get started

On 2016-04-11 17:25, Ilia Mirkin wrote: On Mon, Apr 11, 2016 at 11:18 AM, Jakob Sinclair wrote: Thanks for the tips! I have been looking at the ARB_shader_image_load_store and ARB_shader_image size extensions for GL ES 3.1 and noticed that the radeonsi drivers does not support them even thou

Re: [Mesa-dev] [PATCH] radeonsi: Synchronize a streamout write after read hazard.

Sounds right to me. Do you have a test case that fails without it? Reviewed-by: Nicolai Hähnle On 11.04.2016 09:04, Bas Nieuwenhuizen wrote: Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_descriptors.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/gall

Re: [Mesa-dev] [PATCH v2] doxygen: update glsl link

Thanks. I wrote an other patch call "*[PATH v2] doxygen: Generate Doxygen for NIR*". Rhys reviewed it. But I'm not sure he tested it. If it's the case, you can push it too. Regards, Elie 2016-04-11 16:10 GMT+02:00 Emil Velikov : > On 9 April 2016 at 13:55, Rhys Kidd wrote: > > On 7 April 2016

Re: [Mesa-dev] [PATCH 0/5] R600, GCN: Guard Band support

On Sun, Apr 10, 2016 at 10:23 PM, wrote: > I didn't see anything obviously wrong so, > > Reviewed-by: Edward O'Callaghan > > But I have some general questions about guard band, not sure if this is the > right place but I'll just ask any way: > From my somewhat naive understanding guard band can

Re: [Mesa-dev] [PATCH 1/2] gallium/radeon: removing dead code for sharing stencil buffers

Series is: Reviewed-by: Nicolai Hähnle On 11.04.2016 05:43, Marek Olšák wrote: From: Marek Olšák This is a remnant of the times when the DDX was allocating depth-stencil buffers for windows. Now, st/dri allocates them and doesn't share them. --- src/gallium/drivers/radeon/r600_texture.c |

[Mesa-dev] [PATCH] i965: Make intel_get_param return an int

This will fix the spurious error message: "Failed to query GPU properties." that was unintentionally added in cc01b63d730. This patch changes the function to return an int so that the caller is able to do stuff based on the return value. The equivalent of this patch was in the original series tha

Re: [Mesa-dev] [PATCH 0/5] pb_buffer & radeonsi textures >= 4 GB

On 11.04.2016 05:38, Marek Olšák wrote: Hi, This fixes our radeonsi infrastructure to support textures >= 4 GB. We can't test it yet, because our GPUs don't have so much memory (maybe with 8GB GART if you have so much RAM), but we may need this in the future. Please review. We'll probably j

Re: [Mesa-dev] [PATCH 2/5] winsys/amdgpu: add support for 64-bit buffer sizes

On 11.04.2016 05:38, Marek Olšák wrote: diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c index c92a66e..2810dca 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c @@ -718,7 +718,

Re: [Mesa-dev] [PATCH] radeonsi: fix mask checking when emitting scissors and viewports

On 2016-04-08 11:00, Marek Olšák wrote: From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 8087d23..3894e1d 100644

Re: [Mesa-dev] [PATCH 2/5] winsys/amdgpu: add support for 64-bit buffer sizes

On 11.04.2016 05:38, Marek Olšák wrote: From: Marek Olšák --- src/gallium/auxiliary/util/u_math.h| 6 ++ src/gallium/drivers/radeon/radeon_winsys.h | 4 ++-- src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 29 +- src/gallium/winsys/amdgpu/drm/

Re: [Mesa-dev] [PATCH 0/5] R600, GCN: Guard Band support

On 2016-04-11 00:34, Marek Olšák wrote: This patch series adds Guard Band support into r600g and radeonsi. It first implements the Guard Band in radeonsi, then it moves all radeonsi scissor & viewport code into gallium/radeon, and then r600g is switched to it and its original scissor & viewport

Re: [Mesa-dev] [PATCH 0/5] R600, GCN: Guard Band support

Am 11.04.2016 um 15:58 schrieb Marek Olšák: > On Mon, Apr 11, 2016 at 2:41 PM, Roland Scheidegger > wrote: >> Am 11.04.2016 um 00:34 schrieb Marek Olšák: >>> Hi, >>> >>> This patch series adds Guard Band support into r600g and radeonsi. >>> >>> It first implements the Guard Band in radeonsi, then

Re: [Mesa-dev] [PATCH 1/7] gallium/radeon: move pipeline stat context flags to common code

Series is Reviewed-by: Nicolai Hähnle On 08.04.2016 18:12, Marek Olšák wrote: From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 5 - src/gallium/drivers/radeonsi/si_pipe.h| 3 --- src/gallium/drivers/radeonsi/si_state.c | 8 src/gallium/dri

Re: [Mesa-dev] Newbie task to get started

On Mon, Apr 11, 2016 at 12:06 PM, Jason Ekstrand wrote: > Another pretty easy task is to find GL ES extensions where the desktop > variant is already implemented. Then 95% of the code is there, you just > have to see what (if anything) is different with the ES variant and wire it > up. If you're

Re: [Mesa-dev] [PATCH] radeonsi: fix mask checking when emitting scissors and viewports

Thanks for doing this. Reviewed-by: Nicolai Hähnle On 08.04.2016 04:00, Marek Olšák wrote: From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/

Re: [Mesa-dev] [PATCH] radeonsi: implement and rely on set_active_query_state

Reviewed-by: Nicolai Hähnle On 08.04.2016 03:58, Marek Olšák wrote: From: Marek Olšák --- src/gallium/drivers/radeonsi/si_blit.c | 3 --- src/gallium/drivers/radeonsi/si_pipe.h | 4 src/gallium/drivers/radeonsi/si_state.c | 32 +++- src/gal

Re: [Mesa-dev] Newbie task to get started

On Mon, Apr 11, 2016 at 8:25 AM, Ilia Mirkin wrote: > On Mon, Apr 11, 2016 at 11:18 AM, Jakob Sinclair > wrote: > > On 2016-04-11 14:07, Marek Olšák wrote: > >> > >> Hi Jakob, > >> > >> Getting familiar with the code should be the first priority. I suggest > >> you start with a simple feature li

Re: [Mesa-dev] [PATCH] gallium/radeon: unify checking streamout enable state

Reviewed-by: Nicolai Hähnle On 08.04.2016 04:00, Marek Olšák wrote: From: Marek Olšák --- src/gallium/drivers/r600/r600_state_common.c | 5 ++--- src/gallium/drivers/radeon/r600_pipe_common.h | 6 ++ src/gallium/drivers/radeon/r600_streamout.c | 6 -- src/gallium/drivers/radeo

Re: [Mesa-dev] [RFC PATCH] GBM: Add map/unmap functions

On 11 April 2016 at 15:31, Rob Clark wrote: > On Mon, Apr 11, 2016 at 10:09 AM, Emil Velikov > wrote: >> Hi Rob, >> >> On 31 March 2016 at 04:21, Rob Herring wrote: >>> This adds GBM map and unmap functions. Unlike prior attempts, this >>> version provides a region and usage flags for the mappi

Re: [Mesa-dev] [PATCH 1/2] gallium: add pipe_context::set_active_query_state for pausing queries

On 07.04.2016 19:11, Marek Olšák wrote: From: Marek Olšák --- src/gallium/docs/source/context.rst | 3 +++ src/gallium/drivers/ddebug/dd_context.c | 9 + src/gallium/drivers/freedreno/freedreno_query.c | 6 ++ src/gallium/drivers/i915/i915_query.c

Re: [Mesa-dev] [PATCH 0/6] Radeon EG, GCN: Texture filtering cleanups

Series is: Reviewed-by: Nicolai Hähnle On 11.04.2016 10:25, Marek Olšák wrote: Hi, These are cleanups and small improvements of texture filtering I copied from the closed driver. Please review. Marek ___ mesa-dev mailing list mesa-dev@lists.freed

Re: [Mesa-dev] [PATCH 03/10] mesa/st: add endian_format field to struct pipe_resource

Am 11.04.2016 um 16:34 schrieb Oded Gabbay: > This patch adds a new field, called "endian_format", to > "struct pipe_resource". The new field is of type "enum pipe_endian" and > can receive one of two values: > - PIPE_ENDIAN_LITTLE > - PIPE_ENDIAN_NATIVE > > PIPE_ENDIAN_NATIVE is initialized to ei

Re: [Mesa-dev] Newbie task to get started

Hi Jakob, If you want something _really_ easy to work on there's usually some superficial code clean-ups that can be done. One off the top of my head is to replace "GLvoid" with "void" in much of the code. In the early days of GL, GLvoid was used quite a bit in header files. Now, the ARB ha

Re: [Mesa-dev] Newbie task to get started

On Mon, Apr 11, 2016 at 11:18 AM, Jakob Sinclair wrote: > On 2016-04-11 14:07, Marek Olšák wrote: >> >> Hi Jakob, >> >> Getting familiar with the code should be the first priority. I suggest >> you start with a simple feature like adding an easy GL or GL ES >> extension into your favourite driver.

[Mesa-dev] [PATCH 5/6] r600g: clean up aniso state translation

From: Marek Olšák --- src/gallium/drivers/r600/evergreen_state.c | 9 - src/gallium/drivers/r600/evergreend.h| 14 +++--- src/gallium/drivers/r600/r600_pipe.h | 1 - src/gallium/drivers/r600/r600_state.c| 17 + src/gallium/drivers/r600/

[Mesa-dev] [PATCH 6/6] r600g: disable aniso filtering for non-mipmap textures on EG

From: Marek Olšák this is the default behavior of the closed driver when running on VI --- src/gallium/drivers/r600/evergreen_state.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c in

[Mesa-dev] [PATCH 3/6] radeonsi: disable aniso filtering for non-mipmap textures on SI-CI

From: Marek Olšák The closed driver does this, but it looks at base_level and last_level and uses a conditional assignment, which LLVM can't generate on SGPRs. That led me to invent this solution that abuses the image descriptor. --- src/gallium/drivers/radeonsi/si_shader.c | 36 +++

[Mesa-dev] [PATCH 1/6] gallium/radeon: fix maximum texture anisotropy setup

From: Marek Olšák We were overdoing it for non-power-of-two values. --- src/gallium/drivers/radeon/r600_pipe_common.h | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h

[Mesa-dev] [PATCH 4/6] radeonsi: clean up aniso state translation

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 15 +++ src/gallium/drivers/radeonsi/si_state.c | 18 +++--- src/gallium/drivers/radeonsi/sid.h| 5 + 3 files changed, 23 insertions(+), 15 deletions(-) diff --git a/src/gallium/

[Mesa-dev] [PATCH 0/6] Radeon EG,GCN: Texture filtering cleanups

Hi, These are cleanups and small improvements of texture filtering I copied from the closed driver. Please review. Marek ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

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