[Mesa-dev] [PATCH 2/7] Define constants and functions for ARB_framebuffer_no_attachment extension

From: Kevin Rogovin Define enumerations, functions and associated glGet's for extension ARB_framebuffer_no_attachment. --- .../glapi/gen/ARB_framebuffer_no_attachments.xml | 33 ++ src/mapi/glapi/gen/Makefile.am | 1 + src/mapi/glapi/gen/gl_API.xml

[Mesa-dev] [PATCH 1/7] Define extension ARB_framebuffer_no_attachments and additions to gl_framebuffer for extension ARB_framebuffer_no_attachments

From: Kevin Rogovin Add extension flag and constant values for ARB_framebuffer_no_attachments. --- src/mesa/main/extensions.c | 1 + src/mesa/main/fbobject.c| 1 + src/mesa/main/framebuffer.c | 1 + src/mesa/main/mtypes.h | 52 - 4 files

[Mesa-dev] [PATCH 6/7] i965: ensure execution of fragment shader when fragment shader has atomic buffer access

From: Kevin Rogovin Ensure that the GPU spawns the fragment shader thread for those fragment shaders with atomic buffer access. --- src/mesa/drivers/dri/i965/gen7_wm_state.c | 7 +++ src/mesa/drivers/dri/i965/gen8_ps_state.c | 4 2 files changed, 11 insertions(+) diff --git a/src/mes

[Mesa-dev] [PATCH] i965: Fix intel_miptree_copy_teximage for GL_TEXTURE_1D_ARRAY

From: Noone For GL_TEXTURE_1D_ARRAY targets we store the depth of the array in the Height field and leave Depth=1 in the underlying texture object. When we call intel_miptree_copy_teximage in the process of re-creating a miptree (possibily because the number of miplevels has changed) we didn't ac

[Mesa-dev] [PATCH] i965: Fix intel_miptree_copy_teximage for GL_TEXTURE_1D_ARRAY

From: Noone For GL_TEXTURE_1D_ARRAY targets we store the depth of the array in the Height field and leave Depth=1 in the underlying texture object. When we call intel_miptree_copy_teximage in the process of re-creating a miptree (possibily because the number of miplevels has changed) we didn't ac

[Mesa-dev] [PATCH] i965: Fill out the rest of brw_debug_recompile_sampler_key().

This makes INTEL_DEBUG=perf report shader recompiles due to CMS vs. UMS/IMS differences and Sandybridge textureGather workarounds. Previously, we just flagged them as "Something else". Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_wm.c | 8 1 file changed, 8 insertio

Re: [Mesa-dev] [PATCH] i965: Disassemble sampler message names on Gen5+.

On the "this is silly, I should really fix it" list forever... Reviewed-by: Chris Forbes On Fri, Apr 24, 2015 at 6:02 PM, Kenneth Graunke wrote: > Previously, sampler messages were decoded as > > sampler (1, 0, 2, 2) mlen 6 rlen 8 { align1 1H }; > > I don't know how much time we've

Re: [Mesa-dev] [PATCH] i965: Disassemble sampler message names on Gen5+.

Awesome! Thanks, that'll save lots of time. We should have done this years ago :) Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] i965: Disassemble sampler message names on Gen5+.

Previously, sampler messages were decoded as sampler (1, 0, 2, 2) mlen 6 rlen 8 { align1 1H }; I don't know how much time we've collectly wasted trying to read this format. I can never recall which number is the surface index, sampler index, message type, or...whatever that other nu

Re: [Mesa-dev] [PATCH 09/12] nir: Add a simple growing array data structure

On Thu, Apr 23, 2015 at 10:14 AM, Emil Velikov wrote: > On 13/04/15 01:51, Matt Turner wrote: >> On Sun, Apr 12, 2015 at 6:38 PM, Jason Ekstrand wrote: >>> >>> On Apr 12, 2015 3:24 PM, "Thomas Helland" wrote: Hi, This looks correct as far as I can tell. I have some comme

Re: [Mesa-dev] [PATCH 05/23] glsl: Add extension plumbing and define for ARB_shader_subroutine

Patches 1,3,4,5 (and 2 with the changes mentioned); Reviewed-by: Tapani Pälli (I'll continue on this a bit later.) On 04/24/2015 04:42 AM, Dave Airlie wrote: From: Chris Forbes Signed-off-by: Chris Forbes --- src/glsl/glcpp/glcpp-parse.y| 3 +++ src/glsl/glsl_parser_extras.cpp

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

On Thu, Apr 23, 2015 at 10:12 PM, Jordan Justen wrote: > On 2015-04-23 12:28:00, Ilia Mirkin wrote: >> On Thu, Apr 23, 2015 at 3:24 PM, Jordan Justen >> wrote: >> >> > +#define DEBUG_SPILL (1l << 31) >> >> >> >> That seems awkward... did you mean 1U? FWIW mesa's not at all careful >

[Mesa-dev] [Bug 90157] GLSL ES does not allow non-constant initializers for globals

https://bugs.freedesktop.org/show_bug.cgi?id=90157 Ian Romanick changed: What|Removed |Added Assignee|i...@freedesktop.org |mesa-dev@lists.freedesktop.

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

On 2015-04-23 12:28:00, Ilia Mirkin wrote: > On Thu, Apr 23, 2015 at 3:24 PM, Jordan Justen > wrote: > >> > +#define DEBUG_SPILL (1l << 31) > >> > >> That seems awkward... did you mean 1U? FWIW mesa's not at all careful > >> about that... > > > > Yeah, I agree. 1l is awkward. > > > >

Re: [Mesa-dev] [PATCH 02/23] glapi: Add ARB_shader_subroutine functions and enums

With the changes below fixed; Reviewed-by: Tapani Pälli On 04/24/2015 04:42 AM, Dave Airlie wrote: From: Chris Forbes Signed-off-by: Chris Forbes --- src/mapi/glapi/gen/ARB_shader_subroutine.xml | 84 src/mapi/glapi/gen/Makefile.am | 1 + src/m

[Mesa-dev] [PATCH] i965/skl: Force the exec size to 8 when initing header for SIMD4x2

On Gen9+ there needs to be a header when sampling using SIMD4x2. The header is set up by copying from the g0 register. Commit 07c571a39f tried to fix this mov instruction to always use an exec size of 8 because previously it was incorrectly using 4. It did this by casting the type of the destinatio

Re: [Mesa-dev] [Mesa-stable] [PATCH 1/2] i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.

On 04/22/2015 02:28 PM, Kenneth Graunke wrote: > On Wednesday, April 22, 2015 02:19:35 PM Ian Romanick wrote: >> Assuming this solves the GPU hangs, the series is >> >> Reviewed-by: Ian Romanick > > Hmm? What GPU hangs? These patches solve misrendering in When we talked about this in the offic

Re: [Mesa-dev] [PATCH 4/7] i965: Add gen8 surface state debug info

On Thu, Apr 23, 2015 at 4:50 PM, Ben Widawsky wrote: > AFAICT, none of the old data was wrong (the gen7 decoder), but it wa smissing > a > bunch of stuff. > > Adds a tick (') to denote the beginning of the surface state for easier > reading. > This will be replaced later with some better, but mo

Re: [Mesa-dev] [PATCH 5/8] i965: Add gen9 surface state decoding

Oops, ignore this one. It was from an older series. On Thu, Apr 23, 2015 at 04:50:01PM -0700, Ben Widawsky wrote: > Gen9 is mostly the same as Gen8. > > NOTE: There are some things intentionally left out of this decoding. > > Signed-off-by: Ben Widawsky > --- > src/mesa/drivers/dri/i965/brw_st

Re: [Mesa-dev] [PATCH 1/7] i965: Add all surface types to the batch decode

On Thu, Apr 23, 2015 at 4:49 PM, Ben Widawsky wrote: > It's true that not all surfaces apply for every gen, but for the most part > this > is what we want. (The unfortunate case is when we use an valid surface, but > not > for the specific GEN). > > This was automated with a vim macro. > > v2: S

[Mesa-dev] [PATCH 23/23] st/mesa: enable shader subroutine

From: Dave Airlie I'm not sure if we shouldn't enable this everywhere and rip out the API checks, discuss, Signed-off-by: Dave Airlie --- src/mesa/state_tracker/st_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker

[Mesa-dev] [PATCH 08/23] glsl: Add production for subroutine qualifier with type list

From: Chris Forbes Signed-off-by: Chris Forbes --- src/glsl/glsl_parser.yy | 18 ++ 1 file changed, 18 insertions(+) diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy index 743cf26..97507eb 100644 --- a/src/glsl/glsl_parser.yy +++ b/src/glsl/glsl_parser.yy @@ -215,

[Mesa-dev] [PATCH 22/23] st/mesa: add subroutine bits

From: Dave Airlie Just add support for the subroutine type to the glsl->tgsi convertor. Signed-off-by: Dave Airlie --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_t

[Mesa-dev] [PATCH 20/23] program: add subroutine uniform support

From: Dave Airlie Add support for the subroutine uniform type ir->mesa.cpp Signed-off-by: Dave Airlie --- src/mesa/program/ir_to_mesa.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp index 3dcb537..404b029 100644 --- a/

[Mesa-dev] [PATCH 14/23] glsl/ir: allow ir_call to handle subroutine calling

From: Dave Airlie This adds a ir_variable which contains the subroutine uniform and an array rvalue for the deref of that uniform, these are stored in the ir_call and lowered later. Signed-off-by: Dave Airlie --- src/glsl/ir.h | 21 - 1 file changed, 20 insertions(+), 1 del

[Mesa-dev] [PATCH 19/23] program_resource: add subroutine support

From: Dave Airlie This fleshes out the ARB_program_query support for the APIs that ARB_shader_subroutine introduces, leaving some TODOs for later addition. Signed-off-by: Dave Airlie --- src/mesa/main/shader_query.cpp | 46 ++ 1 file changed, 46 insertio

[Mesa-dev] [PATCH 16/23] glsl/ir: add subroutine lowering pass

From: Dave Airlie This lowers the enhanced ir_call using the lookaside table of subroutines into an if ladder. This initially was done at the AST level but it caused some ordering issues so a separate pass was required. Signed-off-by: Dave Airlie --- src/glsl/Makefile.sources | 1 + sr

[Mesa-dev] [PATCH 21/23] mesa: fill out the ARB_shader_subroutine APIs

From: Dave Airlie This fleshes out the APIs, using the program resource APIs where they should match. It also sets the default values to valid subroutines. Signed-off-by: Dave Airlie --- src/mesa/main/shaderapi.c | 430 +- src/mesa/main/shaderapi.h

[Mesa-dev] [PATCH 18/23] glsl: add uniform and program resource support

From: Dave Airlie This adds linker support for subroutine uniforms, they have some subtle differences from real uniforms, we also hide them and they are given internal uniform names. This also adds the subroutine locations and subroutine uniforms to the program resource tracking for later use.

[Mesa-dev] [PATCH 03/23] mesa: Add extension tracking for arb_shader_subroutine

From: Chris Forbes Signed-off-by: Chris Forbes --- src/mesa/main/extensions.c | 1 + src/mesa/main/mtypes.h | 1 + 2 files changed, 2 insertions(+) diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c index 3d4965c..dfb1a9d 100644 --- a/src/mesa/main/extensions.c +++ b/src/

[Mesa-dev] [PATCH 01/23] mesa: Add stubs for ARB_shader_subroutine entrypoints

From: Chris Forbes Signed-off-by: Chris Forbes --- src/mesa/main/shaderapi.c | 63 +++ src/mesa/main/shaderapi.h | 35 ++ 2 files changed, 98 insertions(+) diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c ind

[Mesa-dev] ARB_shader_subroutine - first try

Hey, This is my first submission of ARB_shader_subroutine, it's been through a few internal revisions in my brain, and its based on some parser work from Chris, but I may merge that stuff into mine as I change his stuff heavily. I implemented this by extending ir_call in the end and adding a lowe

[Mesa-dev] [PATCH 11/23] glsl/types: add new subroutine type

From: Dave Airlie This type will be used to store the name of subroutine types as in subroutine void myfunc(void); will store myfunc into a subroutine type. This is required to the parser can identify a subroutine type in a uniform decleration as a valid type, and also for looking up the type l

[Mesa-dev] [PATCH 13/23] glsl/ir: add subroutine information storage to ir_function

From: Dave Airlie We need to store two sets of info into the ir_function, if this is a function definition with a subroutine list (subroutine_def) or if it a subroutine prototype. Signed-off-by: Dave Airlie --- src/glsl/ir.cpp | 4 src/glsl/ir.h | 7 +++

[Mesa-dev] [PATCH 15/23] glsl: add ast/parser support for subroutine parsing storage

From: Dave Airlie This is the guts of the GLSL parser and AST support for shader subroutines. The code creates a subroutine type in the parser, and uses that there to validate the identifiers. The parser also distinguishes between subroutine types/function prototypes /uniforms and subroutine def

[Mesa-dev] [PATCH 17/23] mesa/mtypes: add gl_subroutine_function and uniform storage to shader

From: Dave Airlie This adds the necessary storage for subroutine info to gl_shader. Signed-off-by: Dave Airlie --- src/mesa/main/mtypes.h | 15 +++ 1 file changed, 15 insertions(+) diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index 4c63684..78a155f 100644 --- a/src

[Mesa-dev] [PATCH 12/23] mesa: add inline conversion functions for ARB_shader_subroutine

From: Dave Airlie This handles converting the shader stages to the internal prefix along with the program resource interfaces. Signed-off-by: Dave Airlie --- src/mesa/main/shaderobj.h | 84 +++ 1 file changed, 84 insertions(+) diff --git a/src/mesa/

[Mesa-dev] [PATCH 02/23] glapi: Add ARB_shader_subroutine functions and enums

From: Chris Forbes Signed-off-by: Chris Forbes --- src/mapi/glapi/gen/ARB_shader_subroutine.xml | 84 src/mapi/glapi/gen/Makefile.am | 1 + src/mapi/glapi/gen/gl_API.xml| 6 +- 3 files changed, 90 insertions(+), 1 deletion(-) create

[Mesa-dev] [PATCH 07/23] glsl: Add production for "subroutine qualifier"

From: Chris Forbes This covers two of the three uses of 'subroutine': - Subroutine type declarations - Subroutine uniform declarations Support for the `subroutine (type, ...)` form will be added in a later commit. Signed-off-by: Chris Forbes --- src/glsl/ast.h | 3 +++ src/gl

[Mesa-dev] [PATCH 04/23] mesa: Add glGet support for ARB_shader_subroutine implementation limits

From: Chris Forbes Signed-off-by: Chris Forbes --- src/mesa/main/config.h | 6 ++ src/mesa/main/get.c | 1 + src/mesa/main/get_hash_params.py | 4 src/mesa/main/tests/enum_strings.cpp | 9 + 4 files changed, 20 insertions(+) diff --git a/src/

[Mesa-dev] [PATCH 05/23] glsl: Add extension plumbing and define for ARB_shader_subroutine

From: Chris Forbes Signed-off-by: Chris Forbes --- src/glsl/glcpp/glcpp-parse.y| 3 +++ src/glsl/glsl_parser_extras.cpp | 1 + src/glsl/glsl_parser_extras.h | 2 ++ src/glsl/standalone_scaffolding.cpp | 1 + 4 files changed, 7 insertions(+) diff --git a/src/glsl/glcpp/glcpp-p

[Mesa-dev] [PATCH 10/23] glsl: Disallow 'subroutine' as a general type qualifier

From: Chris Forbes Signed-off-by: Chris Forbes --- src/glsl/ast_to_hir.cpp | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp index 7836936..90b732c 100644 --- a/src/glsl/ast_to_hir.cpp +++ b/src/glsl/ast_to_hir.cpp @@ -2419,6 +2419,12 @@

[Mesa-dev] [PATCH 09/23] glsl: Exclude 'subroutine' from has_qualifier()

From: Chris Forbes Signed-off-by: Chris Forbes --- src/glsl/ast_type.cpp | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/glsl/ast_type.cpp b/src/glsl/ast_type.cpp index b596cd5..74b1ab5 100644 --- a/src/glsl/ast_type.cpp +++ b/src/glsl/ast_type.cpp @@ -40,7 +40,12

[Mesa-dev] [PATCH 06/23] glsl: Make `subroutine` a reserved keyword

From: Chris Forbes Signed-off-by: Chris Forbes --- src/glsl/glsl_lexer.ll | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/glsl/glsl_lexer.ll b/src/glsl/glsl_lexer.ll index 2785ed1..febf2d2 100644 --- a/src/glsl/glsl_lexer.ll +++ b/src/glsl/glsl_lexer.ll @@ -577,7 +577,7

Re: [Mesa-dev] [PATCH V2 13/22] i965: Use BRW_SURFACE_* in place of GL_TEXTURE_*

On Fri, Apr 17, 2015 at 04:51:34PM -0700, Anuj Phogat wrote: > Makes no functional changes in the code. > > Signed-off-by: Anuj Phogat > Reviewed-by: Chris Forbes > --- > src/mesa/drivers/dri/i965/gen8_surface_state.c | 15 +-- > 1 file changed, 9 insertions(+), 6 deletions(-) > >

Re: [Mesa-dev] [PATCH V2 14/22] i965/gen9: Set vertical and horizontal surface alignments

On Fri, Apr 17, 2015 at 04:51:35PM -0700, Anuj Phogat wrote: > Patch sets the alignments for texture and renderbuffer surfaces. > > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/i965/gen8_surface_state.c | 34 > +++--- > 1 file changed, 30 insertions(+), 4 deletion

Re: [Mesa-dev] [PATCH V2 06/22] i965/gen9: Set tiled resource mode for the miptree

On Fri, Apr 17, 2015 at 04:51:27PM -0700, Anuj Phogat wrote: > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/i965/brw_tex_layout.c| 2 ++ > src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 ++ > 2 files changed, 8 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_te

[Mesa-dev] [PATCH 6/7] i965: Add renderbuffer surface indexes to debug

This patch is optional in the series. It does make the output much cleaner, but there is some risk. Sample output: 0x7180: 0x231d7000: SURF005: 2D R8G8B8A8_UNORM VALIGN4 HALIGN4 Y-tiled 0x7184: 0x1800: SURF005: MOCS: 0x18 Base MIP: 3 (0 mips) Surface QPitch: 0 0x7188

[Mesa-dev] [PATCH 1/7] i965: Add all surface types to the batch decode

It's true that not all surfaces apply for every gen, but for the most part this is what we want. (The unfortunate case is when we use an valid surface, but not for the specific GEN). This was automated with a vim macro. v2: Shortened common forms such as R8G8B8A8->RGBA8. Note that this makes some

[Mesa-dev] [PATCH 3/7] i965: Add gen7+ sampler state to batch debug

OLD: 0x7e00: 0x1000: WM SAMP0: filtering 0x7e04: 0x000d: WM SAMP0: wrapping, lod 0x7e08: 0x: WM SAMP0: default color pointer 0x7e0c: 0x0090: WM SAMP0: chroma key, aniso NEW: 0x7e00: 0x1000: SAMPLER_STATE 0: Disabled = no, Base Mi

[Mesa-dev] [PATCH 0/7] surface state decode improvements (gen8+)

While trying to debug Skylake fast color clears, I noticed that the surface state generated by our decoder was woefully inadequate. Much of the dumped state was so stale as to be useless. Just to be clear, the code is not auto generated from a spec, and so I'm certain there are bugs in the decoder

[Mesa-dev] [PATCH 7/7] i965: Add gen8 blend state

OLD: 0x7340: 0x0080:BLEND: 0x7344: 0x84202100:BLEND: NEW: 0x7340: 0x0080:BLEND: Alpha blend/test 0x7344: 0x000b84202100: BLEND_ENTRY00: Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)

[Mesa-dev] [PATCH 5/8] i965: Add gen9 surface state decoding

Gen9 is mostly the same as Gen8. NOTE: There are some things intentionally left out of this decoding. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_state_dump.c | 30 +++--- 1 file changed, 23 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/d

[Mesa-dev] [PATCH 5/7] i965: Add Gen9 surface state decoding

Gen9 surface state is very similar to the previous generation. The important changes here are aux mode, and the way clear colors work. NOTE: There are some things intentionally left out of this decoding. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_state_dump.c | 36 +++

[Mesa-dev] [PATCH 8/8] for test only

--- src/mesa/drivers/dri/i965/intel_debug.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_debug.c b/src/mesa/drivers/dri/i965/intel_debug.c index a5b883c..b4ec59e 100644 --- a/src/mesa/drivers/dri/i965/intel_debug.c +++ b/src/mesa/drivers/dri/

[Mesa-dev] [PATCH 2/7] i965: Add viewport extents (gen8) to batch decode

0x7da0: 0xc1da740e: SF_CLIP VP: guardband xmin = -27.306667 0x7da4: 0x41da740e: SF_CLIP VP: guardband xmax = 27.306667 0x7da4: 0x41da740e: SF_CLIP VP: guardband ymin = -23.405714 0x7da8: 0xc1bb3ee7: SF_CLIP VP: guardband ymax = 23.405714 0x7db0: 0x00

[Mesa-dev] [PATCH 4/7] i965: Add gen8 surface state debug info

AFAICT, none of the old data was wrong (the gen7 decoder), but it wa smissing a bunch of stuff. Adds a tick (') to denote the beginning of the surface state for easier reading. This will be replaced later with some better, but more risky code. OLD: 0x7980: 0x23016000: SURF: 2D BRW_SU

Re: [Mesa-dev] [PATCH V2 05/22] i965: Pass miptree pointer as function parameter in intel_vertical_texture_alignment_unit

On Fri, Apr 17, 2015 at 04:51:26PM -0700, Anuj Phogat wrote: > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/i965/brw_tex_layout.c | 18 -- > 1 file changed, 8 insertions(+), 10 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c > b/src/mesa/drive

Re: [Mesa-dev] [PATCH v2 1/2] i965/debug: Use the ull specifier for DEBUG enum defines

Both are Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH V2 02/22] i965: Choose tiling in brw_miptree_layout() function

On Fri, Apr 17, 2015 at 04:51:23PM -0700, Anuj Phogat wrote: > This refactoring is required by later patches in this series. > > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/i965/brw_tex_layout.c| 19 +++- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 31 > +++

[Mesa-dev] [PATCH v2 1/2] i965/debug: Use the ull specifier for DEBUG enum defines

The INTEL_DEBUG variable is a uint64_t and if we want a enum value higer than 32 bits, you need to use ull. We might as well use it for all of them. --- src/mesa/drivers/dri/i965/intel_debug.h | 62 - 1 file changed, 31 insertions(+), 31 deletions(-) diff --git a/

[Mesa-dev] [PATCH v2 2/2] i965: Add an INTEL_DEBUG=spill option to test spilling

--- src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 2 +- src/mesa/drivers/dri/i965/intel_debug.c | 1 + src/mesa/drivers/dri/i965/intel_debug.h | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mes

Re: [Mesa-dev] [PATCH] Fix 32bit compilation with -Werror=implicit-function-declaration

On Monday 13 April 2015 22:35:03 Pali Rohár wrote: > On Monday 13 April 2015 22:32:10 Brian Paul wrote: > > On 04/13/2015 01:49 PM, Pali Rohár wrote: > > > On Monday 13 April 2015 21:26:32 Pali Rohár wrote: > > >> File glapi_entrypoint.c calls memcpy() function, but does > > >> not include string.h

Re: [Mesa-dev] [PATCH] Fix 32bit compilation with -Werror=implicit-function-declaration

On 23/04/15 18:46, Pali Rohár wrote: On Monday 13 April 2015 22:35:03 Pali Rohár wrote: On Monday 13 April 2015 22:32:10 Brian Paul wrote: On 04/13/2015 01:49 PM, Pali Rohár wrote: On Monday 13 April 2015 21:26:32 Pali Rohár wrote: File glapi_entrypoint.c calls memcpy() function, but does not

[Mesa-dev] [Bug 90130] gl_PrimitiveId seems to reset at 340

https://bugs.freedesktop.org/show_bug.cgi?id=90130 Roland Scheidegger changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

On Thu, Apr 23, 2015 at 3:24 PM, Jordan Justen wrote: >> > +#define DEBUG_SPILL (1l << 31) >> >> That seems awkward... did you mean 1U? FWIW mesa's not at all careful >> about that... > > Yeah, I agree. 1l is awkward. > > But I think 1U is just unsigned. I don't think that is guarant

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

On Thu, Apr 23, 2015 at 3:20 PM, Jason Ekstrand wrote: > > On Apr 23, 2015 12:19 PM, "Neil Roberts" wrote: >> >> Ilia Mirkin writes: >> >> > That seems awkward... did you mean 1U? FWIW mesa's not at all careful >> > about that... >> >> Or maybe even UINT64_C(1). 1l would still be 32-bit on 32-bi

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

On 2015-04-23 12:01:41, Ilia Mirkin wrote: > On Thu, Apr 23, 2015 at 2:50 PM, Jason Ekstrand wrote: > > diff --git a/src/mesa/drivers/dri/i965/intel_debug.h > > b/src/mesa/drivers/dri/i965/intel_debug.h > > index 807ad98..e5af998 100644 > > --- a/src/mesa/drivers/dri/i965/intel_debug.h > > +++ b/

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

On Apr 23, 2015 12:19 PM, "Neil Roberts" wrote: > > Ilia Mirkin writes: > > > That seems awkward... did you mean 1U? FWIW mesa's not at all careful > > about that... > > Or maybe even UINT64_C(1). 1l would still be 32-bit on 32-bit > architectures. I guess this is more of a problem for subsequent

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

Ilia Mirkin writes: > That seems awkward... did you mean 1U? FWIW mesa's not at all careful > about that... Or maybe even UINT64_C(1). 1l would still be 32-bit on 32-bit architectures. I guess this is more of a problem for subsequent flags that go over 32-bit. - Neil ___

Re: [Mesa-dev] i965: Batch emission refactoring

On Thu, Apr 23, 2015 at 11:56:31AM -0700, Matt Turner wrote: > I've looked through all 18 patches, and they look fine to me -- but > I'm not sure how much that's worth. > > I noted a bunch of whitespace mistakes (Is there a way to configure > git commit to warn you about things like this?) but not

Re: [Mesa-dev] [PATCH 18/18] i965/gen8: Expose state base address setup

On Thu, Apr 23, 2015 at 11:53:57AM -0700, Matt Turner wrote: > On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen > wrote: > > Signed-off-by: Topi Pohjolainen > > --- > > src/mesa/drivers/dri/i965/brw_state.h | 3 +++ > > src/mesa/drivers/dri/i965/gen8_misc_state.c | 4 ++-- > > 2 files cha

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

On Thu, Apr 23, 2015 at 2:50 PM, Jason Ekstrand wrote: > diff --git a/src/mesa/drivers/dri/i965/intel_debug.h > b/src/mesa/drivers/dri/i965/intel_debug.h > index 807ad98..e5af998 100644 > --- a/src/mesa/drivers/dri/i965/intel_debug.h > +++ b/src/mesa/drivers/dri/i965/intel_debug.h > @@ -64,6 +64,

Re: [Mesa-dev] [PATCH 17/18] i965/ps/gen8: Refactor state uploading

On Thu, Apr 23, 2015 at 11:53:49AM -0700, Matt Turner wrote: > On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen > wrote: > > Signed-off-by: Topi Pohjolainen > > --- > > src/mesa/drivers/dri/i965/brw_state.h | 12 + > > src/mesa/drivers/dri/i965/gen8_ps_state.c | 74 > >

Re: [Mesa-dev] i965: Batch emission refactoring

I've looked through all 18 patches, and they look fine to me -- but I'm not sure how much that's worth. I noted a bunch of whitespace mistakes (Is there a way to configure git commit to warn you about things like this?) but not much else. I don't know if that's because the series is perfect or if

Re: [Mesa-dev] [PATCH 15/18] i965/wm/gen6: Refactor push constant state uploading

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_state.h | 5 > src/mesa/drivers/dri/i965/gen6_wm_state.c | 50 > ++- > 2 files changed, 34 insertions(+), 21 deletions(-) > > di

Re: [Mesa-dev] [PATCH 13/18] i965: Pass slice details as parameters for surface setup

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Also changed a couple of direct shifts into SET_FIELD(). > > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_context.h | 3 ++- > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 30 > +---

Re: [Mesa-dev] [PATCH 05/18] i965: Refactor sampler state setup

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_sampler_state.c | 60 > +-- > src/mesa/drivers/dri/i965/brw_state.h | 9 > 2 files changed, 47 insertions(+), 22 deletions(-) >

Re: [Mesa-dev] [PATCH 18/18] i965/gen8: Expose state base address setup

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_state.h | 3 +++ > src/mesa/drivers/dri/i965/gen8_misc_state.c | 4 ++-- > 2 files changed, 5 insertions(+), 2 deletions(-) > > diff --git a/src/mesa/drivers/dri

Re: [Mesa-dev] [PATCH 06/18] i965: Move texture buffer dispatch into single location

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > All generations do the same exacr dispatch and it could be typo: exact ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 17/18] i965/ps/gen8: Refactor state uploading

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_state.h | 12 + > src/mesa/drivers/dri/i965/gen8_ps_state.c | 74 > --- > 2 files changed, 59 insertions(+), 27 deletions(-) > > d

Re: [Mesa-dev] [PATCH 02/18] i965: Expose and refactor brw_update_renderbuffer_surfaces()

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Note that brw_update_renderbuffer_surfaces() already had a helper > variable which was used in parallel to direct access of the current > draw buffer of the context. > > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/b

Re: [Mesa-dev] [PATCH 08/18] i965: Move tex miptree and format resolving into dispatcher

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > All hardware platforms have this in common, so do it in the > hardware independent dispatcher. > > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_context.h | 4 ++- > src/mesa/drivers/dri/i965/brw_wm_sur

Re: [Mesa-dev] [PATCH 01/18] i965: Refactor rb surface setup to allow caller to store offsets

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Notice that in gen7_wm_surface_state.c there is also indentation > change in the surrounding code removing tabs. > > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_context.h | 8 +++ > src/mesa/drive

[Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

--- src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 2 +- src/mesa/drivers/dri/i965/intel_debug.c | 1 + src/mesa/drivers/dri/i965/intel_debug.h | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mes

Re: [Mesa-dev] [PATCH V2 03/22] i965: Move intel_miptree_choose_tiling() to brw_tex_layout.c

On Fri, Apr 17, 2015 at 04:51:24PM -0700, Anuj Phogat wrote: > Patch continues code refactoring. > > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/i965/brw_tex_layout.c| 105 > ++ > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 104 ---

Re: [Mesa-dev] [PATCH V2 04/22] i965: Create a helper function intel_miptree_total_width_height()

On Fri, Apr 17, 2015 at 04:51:25PM -0700, Anuj Phogat wrote: > and some more code refactoring. No functional changes in this patch. > > Signed-off-by: Anuj Phogat Reviewed-by: Topi Pohjolainen ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org h

[Mesa-dev] [PATCH 13/14] i965/blorp/gen6: Prepare vertex buffer setup logic for gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 30 ++ 1 file changed, 22 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index f45dcd4..22ea86c 100644 --- a

[Mesa-dev] [PATCH 03/14] meta: Provide read access to blit shaders

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/common/meta.c | 17 - src/mesa/drivers/common/meta.h | 5 - 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c index cf99d95..8c69b5d 100644 ---

[Mesa-dev] [PATCH 02/14] i965/blorp/gen6: Support for loading glsl-based fragment shaders

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 1 + src/mesa/drivers/dri/i965/gen6_blorp.cpp | 74 2 files changed, 75 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h index

[Mesa-dev] [PATCH 10/14] i965/blorp: Enable glsl-based fbo blits

Use meta-path instead of blorp for 2D-blits. Reduces cpu-overhead increasing the performance of meta-path. On IVB (blorp disabled and hence meta path enabled) a microbenchmark found in mesa-demos (copypixrate -blit -back): x 62 10665.83 13388.95 11357.77 11467.463 574.57333 + 62 199

[Mesa-dev] [PATCH 09/14] i965/gen6: Add support for setting minimum layer for tex surfaces

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index ad5ddb5..c006762 100644 --- a/src

[Mesa-dev] [PATCH 08/14] i965/blorp: Add support for setting samplers for glsl-based blits

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 2 ++ src/mesa/drivers/dri/i965/gen6_blorp.cpp | 30 ++ 2 files changed, 32 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h index

[Mesa-dev] [PATCH 04/14] i965/meta: Add helper for looking up blit programs

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_meta_util.c | 148 ++ src/mesa/drivers/dri/i965/brw_meta_util.h | 9 ++ 2 files changed, 157 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.c b/src/mesa/drivers/dri/i965/brw_meta_

[Mesa-dev] [PATCH 05/14] i965/blorp: Add plumbing for glsl-based color blits

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 27 + src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 90 2 files changed, 117 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_

[Mesa-dev] [PATCH 01/14] i965/blorp/gen7: Support for loading glsl-based fragment shaders

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 15 + src/mesa/drivers/dri/i965/brw_blorp.h| 41 src/mesa/drivers/dri/i965/gen6_blorp.cpp | 22 + src/mesa/drivers/dri/i965/gen7_blorp.cpp | 54 +

[Mesa-dev] [PATCH 06/14] i965/blorp: Add support for loading vertices for glsl-based blits

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 5 ++ src/mesa/drivers/dri/i965/gen6_blorp.cpp | 94 2 files changed, 99 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h inde

[Mesa-dev] [PATCH 11/14] i965/blorp/gen7: Prepare re-using for gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index 7ee62f7..d41d592 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 12/14] i965/blorp/gen7: Expose state setup applicable to gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 36 src/mesa/drivers/dri/i965/gen7_blorp.cpp | 20 +- 2 files changed, 46 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/

[Mesa-dev] [PATCH 14/14] i965/blorp/gen8: Execution support

Batch emission logic for launching glsl-based programs without reading/writing the current gl-context. Initially I wrote support also for launching the handwritten assembly programs but I took it out. It is very unlikely that we ever want to use them for gen >= 8. The whole idea of this series is

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