the number of vertices to fetch doesn't necessarily equal the
total number of input vertices, e.g. we might want to fetch
a single vertex but then draw it twice. Lets use the correct
number of input vertices in the statistics.
Signed-off-by: Zack Rusin
---
src/gallium/auxiliary/draw/draw_pt_fetc
Pass in the size of the index buffer, when available, and use it
to handle out of bounds conditions. The behavior in the case of
an overflow needs to be the same as with other overflows in the
vertex processing pipeline meaning that a vertex should still
be generated but all attributes in it set to
Kenneth Graunke writes:
> On 05/13/2013 11:00 AM, Eric Anholt wrote:
>> Chris Forbes writes:
>>
>>> Signed-off-by: Chris Forbes
>>> ---
>>> src/mesa/drivers/dri/i915/i915_state.c | 9 +
>>> src/mesa/drivers/dri/i965/brw_cc.c | 5 +++--
>>> src/mesa/drivers/dri/i965/gen6_cc.c
On 05/13/2013 01:53 PM, Rodrigo Vivi wrote:
Signed-off-by: Rodrigo Vivi
---
src/mesa/drivers/dri/intel/intel_chipset.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h
b/src/mesa/drivers/dri/intel/intel_chipset.h
index df025ac
On 05/13/2013 01:53 PM, Rodrigo Vivi wrote:
At DDX commit Chris mentioned the tendency we have of finding out more
PCI IDs only when users report. So Let's add all new reserved Haswell IDs.
References: http://bugs.freedesktop.org/show_bug.cgi?id=63701
Signed-off-by: Rodrigo Vivi
Paulo sent me
I agree with all your suggestions on this patch. With them, is this r-b you?
-Jordan
On Sun, Apr 21, 2013 at 11:31 AM, Kenneth Graunke wrote:
> On 04/19/2013 12:35 PM, Jordan Justen wrote:
>>
>> An interface block member may specify the type:
>> in {
>> in vec4 in_var_with_qualifier;
>> };
https://bugs.freedesktop.org/show_bug.cgi?id=64568
Priority: medium
Bug ID: 64568
Keywords: regression
CC: mar...@gmail.com
Assignee: mesa-dev@lists.freedesktop.org
Summary: SIGSEGV src/mesa/main/bufferobj.c:291
Severit
From: Alex Deucher
Note: this is a candidate for the 9.1 branch
Signed-off-by: Alex Deucher
---
include/pci_ids/radeonsi_pci_ids.h |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/include/pci_ids/radeonsi_pci_ids.h
b/include/pci_ids/radeonsi_pci_ids.h
index 68d79
From: Alex Deucher
Signed-off-by: Alex Deucher
---
src/gallium/drivers/radeonsi/radeonsi_pipe.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c
b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
index fa40097..b988e72 100644
---
From: Alex Deucher
Note: this is a candidate for the 9.1 branch
Signed-off-by: Alex Deucher
---
src/gallium/drivers/radeonsi/radeonsi_pipe.c |1 +
src/gallium/drivers/radeonsi/si_state.c |3 +++
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c |1 +
src/gallium/wins
At DDX commit Chris mentioned the tendency we have of finding out more
PCI IDs only when users report. So Let's add all new reserved Haswell IDs.
References: http://bugs.freedesktop.org/show_bug.cgi?id=63701
Signed-off-by: Rodrigo Vivi
---
include/pci_ids/i965_pci_ids.h | 24
Signed-off-by: Rodrigo Vivi
---
src/mesa/drivers/dri/intel/intel_chipset.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h
b/src/mesa/drivers/dri/intel/intel_chipset.h
index df025ac..ee735bb 100644
--- a/src/mesa/drivers/dri/inte
On 05/13/2013 11:00 AM, Eric Anholt wrote:
Chris Forbes writes:
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i915/i915_state.c | 9 +
src/mesa/drivers/dri/i965/brw_cc.c | 5 +++--
src/mesa/drivers/dri/i965/gen6_cc.c| 5 +++--
3 files changed, 11 insertions(+), 8 d
I've just picked over a bunch of commits to the 9.1 branch. There are a
few commits (some fairly old) that wouldn't pick cleanly. Hopefully
someone that knows that code can either resolve the conflicts or add the
commit IDs to bin/.cherry-ignore.
I'd like to release this as 9.1.3 either late
On Friday 10 May 2013 14:17:47 Eric Anholt wrote:
> Andreas Hartmetz writes:
> > On Wednesday 08 May 2013 13:33:37 Eric Anholt wrote:
> >> Christoph Brill writes:
> >> > Hi list,
> >> >
> >> > I'm trying to follow the patches and patchsets sent to mesa-dev
> >> > and
> >> > really like the proce
On 05/13/2013 04:10 AM, Chris Forbes wrote:
Replaces: "[PATCH] mesa: Fix meta smashing stencil reference value on restore"
This series changes the way stencil reference values are clamped. Previously,
the values would be clamped according to the bit depth of the stencil buffer
bound _when the th
Chris Forbes writes:
> Signed-off-by: Chris Forbes
> ---
> src/mesa/drivers/dri/i915/i915_state.c | 9 +
> src/mesa/drivers/dri/i965/brw_cc.c | 5 +++--
> src/mesa/drivers/dri/i965/gen6_cc.c| 5 +++--
> 3 files changed, 11 insertions(+), 8 deletions(-)
>
> diff --git a/src/mesa/
On 05/13/2013 04:10 AM, Chris Forbes wrote:
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/r200/r200_state.c | 3 ++-
src/mesa/drivers/dri/radeon/radeon_state.c | 4 +++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/r200/r200_state.c
b/src/me
On 05/13/2013 04:10 AM, Chris Forbes wrote:
Replaces: "[PATCH] mesa: Fix meta smashing stencil reference value on restore"
This series changes the way stencil reference values are clamped. Previously,
the values would be clamped according to the bit depth of the stencil buffer
bound _when the th
Le dimanche 12 mai 2013 20:37:17 Vinson Lee a écrit :
> Signed-off-by: Vinson Lee
> ---
> src/gallium/auxiliary/gallivm/lp_bld_debug.cpp | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/auxiliary/gallivm/lp_bld_debug.cpp
> b/src/gallium/auxiliary/gallivm/lp
The problem is the sampler units are allocated from the same pool for all
shader stages, so if a vertex shader uses 12 samplers (0..11), the fragment
shader samplers start at index 12, leaving only 4 sampler units
for the fragment shader. The main cause is probably the fact that samplers
(texture u
to match the size of ctx->Texture.Unit, and it will also fix
piglit/max-samplers with the following commit.
---
src/mesa/swrast/s_context.c |6 +++---
src/mesa/swrast/s_context.h |2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/swrast/s_context.c b/src/mesa/sw
https://bugs.freedesktop.org/show_bug.cgi?id=58718
--- Comment #20 from Sergey Anikin ---
(In reply to comment #19)
> Yes, I've built Mesa 9.0.2 / LLVM 3.2 with the compiler hotfix and it works.
> The test application also works.
Thanks a lot for the confirmation, Keith!
--
You are receiving t
https://bugs.freedesktop.org/show_bug.cgi?id=58718
--- Comment #19 from Keith Kriewall ---
Yes, I've built Mesa 9.0.2 / LLVM 3.2 with the compiler hotfix and it works.
The test application also works.
--
You are receiving this mail because:
You are the assignee for the bug.
___
On 13 May 2013 04:10, Chris Forbes wrote:
> Replaces: "[PATCH] mesa: Fix meta smashing stencil reference value on
> restore"
>
> This series changes the way stencil reference values are clamped.
> Previously,
> the values would be clamped according to the bit depth of the stencil
> buffer
> bound
On Sun, May 12, 2013 at 07:41:21AM -0700, Vincent Lejeune wrote:
> Hi,
> Patches 2 and 3 factorizes some code from the backend. Patch 3 should avoid
> some recomputation too, which shouldn't hurt.
> Patch 4 and 5 rework how textures are handled in our backend. It replaces
> TGSI like intrinsic (i
All drivers now clamp this to the appropriate range for the bound
stencil buffer when emitting stencil state.
Signed-off-by: Chris Forbes
---
src/mesa/main/stencil.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/src/mesa/main/stencil.c b/src/mesa/main/stencil.c
index cbdee6b..50570
Signed-off-by: Chris Forbes
---
src/mesa/swrast/s_stencil.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/swrast/s_stencil.c b/src/mesa/swrast/s_stencil.c
index 0c46d93..a63a773 100644
--- a/src/mesa/swrast/s_stencil.c
+++ b/src/mesa/swrast/s_stencil.c
@@ -29,
Signed-off-by: Chris Forbes
---
src/mesa/state_tracker/st_atom_depth.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/state_tracker/st_atom_depth.c
b/src/mesa/state_tracker/st_atom_depth.c
index e351c76..18a56a2 100644
--- a/src/mesa/state_tracker/st_atom_dep
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/r200/r200_state.c | 3 ++-
src/mesa/drivers/dri/radeon/radeon_state.c | 4 +++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/r200/r200_state.c
b/src/mesa/drivers/dri/r200/r200_state.c
index f812a15..3
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/nouveau/nv04_state_raster.c | 3 ++-
src/mesa/drivers/dri/nouveau/nv10_state_raster.c | 4 +++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/nouveau/nv04_state_raster.c
b/src/mesa/drivers/dri/nouveau/nv04
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i915/i915_state.c | 9 +
src/mesa/drivers/dri/i965/brw_cc.c | 5 +++--
src/mesa/drivers/dri/i965/gen6_cc.c| 5 +++--
3 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/i915_state.c
b/src/m
Signed-off-by: Chris Forbes
---
src/mesa/main/get.c | 6 +-
src/mesa/main/get_hash_params.py | 2 +-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index f498118..593c75b 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/mai
Clamps the stencil reference value to the range representable in the
currently-bound draw framebuffer's stencil attachment.
Signed-off-by: Chris Forbes
---
src/mesa/main/stencil.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/mesa/main/stencil.h b/src/mesa/main/stencil.h
index
Replaces: "[PATCH] mesa: Fix meta smashing stencil reference value on restore"
This series changes the way stencil reference values are clamped. Previously,
the values would be clamped according to the bit depth of the stencil buffer
bound _when the the value was specified_. This looked correct in
On 05/13/2013 12:15 AM, Chris Forbes wrote:
After a meta op which touches the stencil state, the stencil reference
value would be revalidated against the current stencil depth, rather
than simply being restored.
In particular, the following call sequence would cause the stencil
reference value t
After a meta op which touches the stencil state, the stencil reference
value would be revalidated against the current stencil depth, rather
than simply being restored.
In particular, the following call sequence would cause the stencil
reference value to be smashed to zero:
- BindFramebuffer( /* f
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