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@@ -938,6 +939,32 @@ class CodeGenModule : public CodeGenTypeCache {
// Return the function body address of the given function.
llvm::Constant *GetFunctionStart(const ValueDecl *Decl);
+ /// Return a function pointer for a reference to the given function.
+ /// This corr
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@@ -3041,3 +3046,20 @@ llvm::Value
*CodeGenFunction::emitBoolVecConversion(llvm::Value *SrcVec,
return Builder.CreateShuffleVector(SrcVec, ShuffleMask, Name);
}
+
+void CodeGenFunction::EmitPointerAuthOperandBundle(
+const CGPointerAuthInfo &PointerAuth,
+SmallVecto
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@@ -0,0 +1,5 @@
+// RUN: %clang_cc1 -triple arm64e-apple-ios -fptrauth-calls %s -verify
-emit-llvm -o -
+
+void f(void);
+
+int *pf = (int *)&f + 1; // expected-error{{cannot compile this static
initializer yet}}
kovdan01 wrote:
> I'll see if I can improve the
@@ -354,6 +354,23 @@ Given that ``signedPointer`` matches the layout for signed
pointers signed with
the given key, extract the raw pointer from it. This operation does not trap
and cannot fail, even if the pointer is not validly signed.
+``ptrauth_sign_constant``
+^
@@ -58,6 +58,35 @@ void test_string_discriminator(const char *str) {
}
+void test_sign_constant(int *dp, int (*fp)(int)) {
+ __builtin_ptrauth_sign_constant(&dv, VALID_DATA_KEY); // expected-error
{{too few arguments}}
+ __builtin_ptrauth_sign_constant(&dv, VALID_DATA_KEY,
@@ -354,6 +354,23 @@ Given that ``signedPointer`` matches the layout for signed
pointers signed with
the given key, extract the raw pointer from it. This operation does not trap
and cannot fail, even if the pointer is not validly signed.
+``ptrauth_sign_constant``
+^
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LGTM with a couple of documentation-related comments
https://github.com/llvm/llvm-project/pull/93904
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@@ -0,0 +1,10 @@
+// RUN: %clang_cc1 -triple arm64-apple-ios -fptrauth-calls
-fptrauth-intrinsics -emit-llvm %s -o - | FileCheck %s
kovdan01 wrote:
Thanks. I'm OK with merging this "as is" and enhancing/re-organizing tests as a
separate PR.
https://github.com
https://github.com/kovdan01 approved this pull request.
LGTM, but this needs a rebase - the base branch was updated, and now the PR
contains unrelated changes.
https://github.com/llvm/llvm-project/pull/93906
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LGTM
https://github.com/llvm/llvm-project/pull/100219
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LGTM
https://github.com/llvm/llvm-project/pull/100215
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LGTM
https://github.com/llvm/llvm-project/pull/100332
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@@ -8410,17 +8447,57 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
InGlue = Chain.getValue(1);
}
+ unsigned Opc = IsTailCall ? AArch64ISD::TC_RETURN : AArch64ISD::CALL;
+
std::vector Ops;
Ops.push_back(Chain);
Ops.push_back(Callee);
+ // Calls w
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@@ -1694,6 +1718,35 @@ let Predicates = [HasPAuth] in {
def BLRABZ : AuthOneOperand<0b001, 1, "blrabz">;
}
+ // BLRA pseudo, generalized version of BLRAA/BLRAB/Z.
+ // This directly manipulates x16/x17, which are the only registers the OS
+ // guarantees are safe to
@@ -1769,6 +1775,39 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(const
MachineInstr *MI) {
OutStreamer->emitLabel(EndSym);
}
+void AArch64AsmPrinter::emitPtrauthBranch(const MachineInstr *MI) {
+ unsigned InstsEmitted = 0;
+
+ unsigned BrTarget = MI->getOperand(0).g
@@ -0,0 +1,183 @@
+; RUN: llc -mtriple arm64e-apple-darwin -o - -global-isel -global-isel-abort=1
-verify-machineinstrs %s | FileCheck %s --check-prefixes=CHECK
kovdan01 wrote:
Please also add tests for ELF: `-mtriple aarch64 -mattr=+pauth`. Check
directives ar
@@ -1909,9 +1948,60 @@ void AArch64AsmPrinter::emitInstruction(const
MachineInstr *MI) {
emitPtrauthAuthResign(MI);
return;
+ case AArch64::BLRA:
+emitPtrauthBranch(MI);
+return;
+
// Tail calls use pseudo instructions so they have the proper code-gen
/
@@ -1909,9 +1948,60 @@ void AArch64AsmPrinter::emitInstruction(const
MachineInstr *MI) {
emitPtrauthAuthResign(MI);
return;
+ case AArch64::BLRA:
+emitPtrauthBranch(MI);
+return;
+
// Tail calls use pseudo instructions so they have the proper code-gen
/
@@ -0,0 +1,183 @@
+; RUN: llc -mtriple arm64e-apple-darwin -o - -global-isel -global-isel-abort=1
-verify-machineinstrs %s | FileCheck %s --check-prefixes=CHECK
kovdan01 wrote:
`--check-prefixes=CHECK` is not necessary (at least now, when no other RUN
lines are
@@ -8410,17 +8447,57 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
InGlue = Chain.getValue(1);
}
+ unsigned Opc = IsTailCall ? AArch64ISD::TC_RETURN : AArch64ISD::CALL;
+
std::vector Ops;
Ops.push_back(Chain);
Ops.push_back(Callee);
+ // Calls w
@@ -1012,25 +1014,37 @@ bool
AArch64CallLowering::isEligibleForTailCallOptimization(
}
static unsigned getCallOpcode(const MachineFunction &CallerF, bool IsIndirect,
- bool IsTailCall) {
+ bool IsTailCall,
+
@@ -8640,6 +8642,15 @@ void SelectionDAGBuilder::LowerCallTo(const CallBase
&CB, SDValue Callee,
CB.countOperandBundlesOfType(LLVMContext::OB_preallocated) != 0)
.setCFIType(CFIType)
.setConvergenceControlToken(ConvControlToken);
+
+ // Set the pointer a
@@ -1012,25 +1014,37 @@ bool
AArch64CallLowering::isEligibleForTailCallOptimization(
}
static unsigned getCallOpcode(const MachineFunction &CallerF, bool IsIndirect,
- bool IsTailCall) {
+ bool IsTailCall,
+
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https://github.com/kovdan01 requested changes to this pull request.
@ahmedbougacha In terms of functionality, LGTM (but I'll prefer other guys also
looking through the changes). I've left several minor style-related comments.
One more overall style comment which might probably require an additi
@@ -1769,6 +1775,41 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(const
MachineInstr *MI) {
OutStreamer->emitLabel(EndSym);
}
+void AArch64AsmPrinter::emitPtrauthBranch(const MachineInstr *MI) {
+ unsigned InstsEmitted = 0;
+
kovdan01 wrote:
This bla
@@ -817,10 +817,44 @@ bool AArch64ExpandPseudo::expandCALL_RVMARKER(
MachineInstr &MI = *MBBI;
MachineOperand &RVTarget = MI.getOperand(0);
assert(RVTarget.isGlobal() && "invalid operand for attached call");
- MachineInstr *OriginalCall =
- createCall(MBB, MBBI, TII
@@ -9206,6 +9222,31 @@ void SelectionDAGBuilder::visitCall(const CallInst &I) {
LowerCallTo(I, Callee, I.isTailCall(), I.isMustTailCall());
}
+void SelectionDAGBuilder::LowerCallSiteWithPtrAuthBundle(
+const CallBase &CB, const BasicBlock *EHPadBB) {
+ auto PAB = CB.g
@@ -2642,6 +2642,20 @@ bool IRTranslator::translateCallBase(const CallBase &CB,
}
}
+ std::optional PAI;
+ if (CB.countOperandBundlesOfType(LLVMContext::OB_ptrauth)) {
+// Functions should never be ptrauth-called directly.
+assert(!CB.getCalledFunction() && "in
@@ -2642,6 +2642,20 @@ bool IRTranslator::translateCallBase(const CallBase &CB,
}
}
+ std::optional PAI;
+ if (CB.countOperandBundlesOfType(LLVMContext::OB_ptrauth)) {
+// Functions should never be ptrauth-called directly.
+assert(!CB.getCalledFunction() && "in
@@ -817,10 +817,44 @@ bool AArch64ExpandPseudo::expandCALL_RVMARKER(
MachineInstr &MI = *MBBI;
MachineOperand &RVTarget = MI.getOperand(0);
assert(RVTarget.isGlobal() && "invalid operand for attached call");
- MachineInstr *OriginalCall =
- createCall(MBB, MBBI, TII
@@ -817,10 +817,44 @@ bool AArch64ExpandPseudo::expandCALL_RVMARKER(
MachineInstr &MI = *MBBI;
MachineOperand &RVTarget = MI.getOperand(0);
assert(RVTarget.isGlobal() && "invalid operand for attached call");
- MachineInstr *OriginalCall =
- createCall(MBB, MBBI, TII
@@ -9206,6 +9222,31 @@ void SelectionDAGBuilder::visitCall(const CallInst &I) {
LowerCallTo(I, Callee, I.isTailCall(), I.isMustTailCall());
}
+void SelectionDAGBuilder::LowerCallSiteWithPtrAuthBundle(
+const CallBase &CB, const BasicBlock *EHPadBB) {
+ auto PAB = CB.g
@@ -9206,6 +9222,31 @@ void SelectionDAGBuilder::visitCall(const CallInst &I) {
LowerCallTo(I, Callee, I.isTailCall(), I.isMustTailCall());
}
+void SelectionDAGBuilder::LowerCallSiteWithPtrAuthBundle(
+const CallBase &CB, const BasicBlock *EHPadBB) {
+ auto PAB = CB.g
@@ -8640,6 +8642,15 @@ void SelectionDAGBuilder::LowerCallTo(const CallBase
&CB, SDValue Callee,
CB.countOperandBundlesOfType(LLVMContext::OB_preallocated) != 0)
.setCFIType(CFIType)
.setConvergenceControlToken(ConvControlToken);
+
+ // Set the pointer a
@@ -1694,6 +1718,35 @@ let Predicates = [HasPAuth] in {
def BLRABZ : AuthOneOperand<0b001, 1, "blrabz">;
}
+ // BLRA pseudo, generalized version of BLRAA/BLRAB/Z.
+ // This directly manipulates x16/x17, which are the only registers the OS
+ // guarantees are safe to
@@ -817,10 +817,44 @@ bool AArch64ExpandPseudo::expandCALL_RVMARKER(
MachineInstr &MI = *MBBI;
MachineOperand &RVTarget = MI.getOperand(0);
assert(RVTarget.isGlobal() && "invalid operand for attached call");
- MachineInstr *OriginalCall =
- createCall(MBB, MBBI, TII
https://github.com/kovdan01 commented:
With latest update, test-suite passes, thanks!
https://github.com/llvm/llvm-project/pull/110705
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@@ -107,6 +107,19 @@ unsigned AArch64InstrInfo::getInstSizeInBytes(const
MachineInstr &MI) const {
unsigned NumBytes = 0;
const MCInstrDesc &Desc = MI.getDesc();
+ if (!MI.isBundle() && isTailCallReturnInst(MI)) {
+NumBytes = Desc.getSize() ? Desc.getSize() : 4;
+
+
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https://github.com/kovdan01 commented:
@atrosinenko Could you please add a test for the case you've fixed in your
latest commit edaae6a75879a38ffe8cd4e064aa9aca77126ef3? I might be missing
smth, but the fix looks untested.
https://github.com/llvm/llvm-project/pull/110705
__
kovdan01 wrote:
@atrosinenko Here is a reproducer IR code.
```
define void @_ZN7myshape4moveEv(ptr %this) #0 {
entry:
%0 = load ptr, ptr %this, align 8
%vtable = load ptr, ptr %0, align 8
%1 = ptrtoint ptr %0 to i64
%2 = tail call i64 @llvm.ptrauth.blend(i64 %1, i64 50297)
%3 = ptrto
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kovdan01 wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/112959?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/kovdan01 created
https://github.com/llvm/llvm-project/pull/112959
When PAuth core info is present and (platform,version) is not (0,0),
treat input files as pac-enabled and do not emit a warning with
`-z pac-plt` passed.
>From 5420db8f3959f073f379466c340252a1816e1810 Mon Sep 1
https://github.com/kovdan01 ready_for_review
https://github.com/llvm/llvm-project/pull/112959
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https://github.com/llvm/llvm-project/pull/113150
Enable init/fini address discrimination, type info vtable pointer
discrimination and AArch64 jump table hardening as part of pauthtest ABI.
>From 872c8b968ca87d46452eaa775fd0eb5845b06012 Mon Sep 17 00:00:00 200
https://github.com/kovdan01 created
https://github.com/llvm/llvm-project/pull/113152
Most ptrauth flags are ABI-affecting, so allow them only for Linux and
Darwin OS which explicitly support pointer authentication. Leave
`-faarch64-jump-table-hardening` available for all AArch64 targets since
it
https://github.com/kovdan01 created
https://github.com/llvm/llvm-project/pull/113151
Since pauthtest is a Linux-specific ABI, it should not be handled in
common driver code.
>From 418ead464f348562b70de13b7b45a5846da6c30e Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Mon, 21 Oct 2024 12:0
kovdan01 wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/113151?utm_source=stack-comment-downstack-mergeability-warning"
kovdan01 wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/113152?utm_source=stack-comment-downstack-mergeability-warning"
kovdan01 wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/113150?utm_source=stack-comment-downstack-mergeability-warning"
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kovdan01 wrote:
@atrosinenko With this patch applied, the following tests in test-suite
compiled in Release mode become failed with segmentation fault:
1. SingleSource/Benchmarks/Misc-C++-EH/spirit.test
2. MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test
3. MultiSource/Benchmarks/Prolangs-C++/
@@ -1757,38 +1762,70 @@ void
AArch64AsmPrinter::emitPtrauthCheckAuthenticatedValue(
//Lsuccess:
// ...
//
- // This sequence is expensive, but we need more information to be able to
- // do better.
- //
- // We can't TBZ the poison bit because EnhancedPAC2 X
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LGTM, thanks!
https://github.com/llvm/llvm-project/pull/110705
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https://github.com/kovdan01 updated
https://github.com/llvm/llvm-project/pull/112959
>From 5420db8f3959f073f379466c340252a1816e1810 Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Fri, 18 Oct 2024 22:07:51 +0300
Subject: [PATCH 1/2] [PAC][lld] Do not emit warnings for `-z pac-plt` with
val
kovdan01 wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/113945?utm_source=stack-comment-downstack-mergeability-warning"
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https://github.com/kovdan01 created
https://github.com/llvm/llvm-project/pull/113945
Assume PAC instructions being supported with PAuth core info different
from (0,0). Given that, `autia1716; br x17` can be replaced with
`braa x17, x16; nop`.
>From f2daf75b8506e31180f2d41291c6f1a63da5138b Mon S
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Would be glad to see everyone's feedback on the changes.
https://github.com/llvm/llvm-project/pull/113152
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Would be glad to see everyone's feedback on the changes.
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Would be glad to see everyone's feedback on the changes.
https://github.com/llvm/llvm-project/pull/113151
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Would be glad to see everyone's feedback on the changes.
https://github.com/llvm/llvm-project/pull/113150
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https://github.com/llvm/llvm-project/pull/113812
Support the following relocations and assembly operators:
- `R_AARCH64_AUTH_GOT_ADR_PREL_LO21` (`:got_auth:` for `adr`)
- `R_AARCH64_AUTH_GOT_LD_PREL19` (`:got_auth:` for `ldr`)
`LOADgotAUTH` pseudo-instructio
kovdan01 wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/113812?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/kovdan01 created
https://github.com/llvm/llvm-project/pull/113813
Support the following relocations and assembly operators:
- `R_AARCH64_AUTH_TLSDESC_ADR_PAGE21` (`:tlsdesc_auth:` for `adrp`)
- `R_AARCH64_AUTH_TLSDESC_LD64_LO12` (`:tlsdesc_auth_lo12:` for `ldr`)
- `R_AARCH64_
kovdan01 wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/113813?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/kovdan01 created
https://github.com/llvm/llvm-project/pull/113816
Support `R_AARCH64_AUTH_GOT_ADR_PREL_LO21` and `R_AARCH64_AUTH_GOT_LD_PREL19`
GOT-generating relocations.
>From 71a974673f926882e07c0e7b7cbaa76ab923a0be Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Fri,
https://github.com/kovdan01 created
https://github.com/llvm/llvm-project/pull/113817
Support `R_AARCH64_AUTH_TLSDESC_ADR_PAGE21`, `R_AARCH64_AUTH_TLSDESC_LD64_LO12`
and `R_AARCH64_AUTH_TLSDESC_LD64_LO12` static TLSDESC relocations.
>From 48a2a0ddec5137d6ac4d6ca65351e8a3ddbdd719 Mon Sep 17 00:00
kovdan01 wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/113817?utm_source=stack-comment-downstack-mergeability-warning"
kovdan01 wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/113816?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/kovdan01 edited
https://github.com/llvm/llvm-project/pull/113816
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@@ -163,8 +163,15 @@ class AArch64AsmPrinter : public AsmPrinter {
// Emit the sequence for AUT or AUTPAC.
void emitPtrauthAuthResign(const MachineInstr *MI);
- // Emit the sequence to compute a discriminator into x17, or reuse AddrDisc.
- unsigned emitPtrauthDiscriminat
@@ -163,8 +163,15 @@ class AArch64AsmPrinter : public AsmPrinter {
// Emit the sequence for AUT or AUTPAC.
void emitPtrauthAuthResign(const MachineInstr *MI);
- // Emit the sequence to compute a discriminator into x17, or reuse AddrDisc.
- unsigned emitPtrauthDiscriminat
@@ -188,6 +188,33 @@ define void @test_tailcall_omit_mov_x16_x16(ptr %objptr)
#0 {
ret void
}
+define i32 @test_call_omit_extra_moves(ptr %objptr) #0 {
kovdan01 wrote:
As far as I see, there are two places where `emitPtrauthDiscriminator` is
called with `
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