================ @@ -1909,9 +1948,60 @@ void AArch64AsmPrinter::emitInstruction(const MachineInstr *MI) { emitPtrauthAuthResign(MI); return; + case AArch64::BLRA: + emitPtrauthBranch(MI); + return; + // Tail calls use pseudo instructions so they have the proper code-gen // attributes (isCall, isReturn, etc.). We lower them to the real // instruction here. + case AArch64::AUTH_TCRETURN: + case AArch64::AUTH_TCRETURN_BTI: { + const uint64_t Key = MI->getOperand(2).getImm(); + assert(Key < 2 && "Unknown key kind for authenticating tail-call return"); + const uint64_t Disc = MI->getOperand(3).getImm(); + Register AddrDisc = MI->getOperand(4).getReg(); + + Register ScratchReg = MI->getOperand(0).getReg() == AArch64::X16 + ? AArch64::X17 + : AArch64::X16; + + unsigned DiscReg = AddrDisc; + if (Disc) { + assert(isUInt<16>(Disc) && "Integer discriminator is too wide"); + + if (AddrDisc != AArch64::NoRegister) { + EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::ORRXrs) + .addReg(ScratchReg) + .addReg(AArch64::XZR) + .addReg(AddrDisc) + .addImm(0)); + EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::MOVKXi) + .addReg(ScratchReg) + .addReg(ScratchReg) + .addImm(Disc) + .addImm(/*shift=*/48)); + } else { + EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::MOVZXi) + .addReg(ScratchReg) + .addImm(Disc) + .addImm(/*shift=*/0)); + } + DiscReg = ScratchReg; + } + + const bool isZero = DiscReg == AArch64::NoRegister; ---------------- kovdan01 wrote:
```suggestion const bool IsZero = DiscReg == AArch64::NoRegister; ``` https://github.com/llvm/llvm-project/pull/85736 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits