[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130064 >From 3dcdf09b2a4635da32ff99208ddad0c27bdc621e Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:07:23 + Subject: [PATCH 1/2] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM --- llvm/lib

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM (PR #130066)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130066 >From 3060681f19ebf8d1ff61f54c7efd679ef6fbb817 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:42:54 + Subject: [PATCH] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM --- .../llvm/C

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM (PR #130065)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130065 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertHardClauses to NPM (PR #130062)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130062?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM (PR #130060)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130060?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port GCNCreateVOPD to NPM (PR #130059)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130059 >From 78bcc3a3576cc1f0dba5c9feb5ed781a62877ffe Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 10 Mar 2025 04:31:20 + Subject: [PATCH 1/3] [AMDGPU][NFC] Format GCNCreateVOPD.cpp --- llvm/lib/Target/

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)

https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/134033 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/134033 >From 1b93c63ac6160a9d98b8329184dd1bedc2f0c758 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 2 Apr 2025 06:22:30 + Subject: [PATCH] [AMDGPU][NPM] Add isRequired to passes missing it --- llvm/lib/T

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/134033 >From 1b93c63ac6160a9d98b8329184dd1bedc2f0c758 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 2 Apr 2025 06:22:30 + Subject: [PATCH] [AMDGPU][NPM] Add isRequired to passes missing it --- llvm/lib/T

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/134033 >From 50a8ebc18a464a5004f00331d44781fde2cb3296 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 2 Apr 2025 06:22:30 + Subject: [PATCH] [AMDGPU][NPM] Add isRequired to passes missing it --- llvm/lib/T

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/134033 >From 50a8ebc18a464a5004f00331d44781fde2cb3296 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 2 Apr 2025 06:22:30 + Subject: [PATCH] [AMDGPU][NPM] Add isRequired to passes missing it --- llvm/lib/T

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Complete optimized regalloc pipeline (PR #138491)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/138491 Also fill in some other passes. >From d415354c8ef7e761a8bcbc83420501bca8abc2f3 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 06:30:03 + Subject: [PATCH] [AMDGPU][NPM] Complete optimized

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Complete optimized regalloc pipeline (PR #138491)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/138491 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Complete optimized regalloc pipeline (PR #138491)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138491?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #138660)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138660?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #138660)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/138660 None >From d32c6c4804dfbfb715c21fa5738e909e2dd6edcc Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Tue, 6 May 2025 09:05:52 + Subject: [PATCH] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag --- llvm/

[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #138660)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/138660 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Complete optimized regalloc pipeline (PR #138491)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138491 >From 5f81915d0988bf2f620986c7b39216a920bd407d Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 06:30:03 + Subject: [PATCH] [AMDGPU][NPM] Complete optimized regalloc pipeline Also fill in s

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass (PR #138496)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138496 >From c7a0a3b087152f4406c23465aa065d800544b4fd Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 08:58:58 + Subject: [PATCH] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass --- llvm/lib/T

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Complete optimized regalloc pipeline (PR #138491)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138491 >From 5f81915d0988bf2f620986c7b39216a920bd407d Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 06:30:03 + Subject: [PATCH] [AMDGPU][NPM] Complete optimized regalloc pipeline Also fill in s

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAMachineSinking to NPM (PR #138497)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138497 >From 15c1c3d387f588c5c9a46cadce937104d3e6a83a Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 09:17:40 + Subject: [PATCH] [CodeGen][NPM] Port PostRAMachineSinking to NPM --- llvm/include

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass (PR #138496)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138496 >From c7a0a3b087152f4406c23465aa065d800544b4fd Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 08:58:58 + Subject: [PATCH] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass --- llvm/lib/T

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAMachineSinking to NPM (PR #138497)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138497 >From 15c1c3d387f588c5c9a46cadce937104d3e6a83a Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 09:17:40 + Subject: [PATCH] [CodeGen][NPM] Port PostRAMachineSinking to NPM --- llvm/include

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port InitUndef to NPM (PR #138495)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138495 >From 26319d05e0ef733c0ba26d80a82c56011a553edd Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 08:47:42 + Subject: [PATCH 1/2] [CodeGen][NPM] Port InitUndef to NPM --- llvm/include/llvm/C

[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #138660)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138660 >From 87c1295ee4502f5cc227d7912cb21dd7e069320c Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Tue, 6 May 2025 09:05:52 + Subject: [PATCH] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag --- llvm/includ

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port InitUndef to NPM (PR #138495)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138495 >From 26319d05e0ef733c0ba26d80a82c56011a553edd Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 08:47:42 + Subject: [PATCH 1/2] [CodeGen][NPM] Port InitUndef to NPM --- llvm/include/llvm/C

[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #138660)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138660 >From 87c1295ee4502f5cc227d7912cb21dd7e069320c Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Tue, 6 May 2025 09:05:52 + Subject: [PATCH] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag --- llvm/includ

[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #138670)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/138670 None Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Aria

[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #138670)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138670?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAMachineSinking to NPM (PR #138497)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138497 >From 72ba54e7458fa1b63a9deb01ae3b5131222f516b Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 09:17:40 + Subject: [PATCH] [CodeGen][NPM] Port PostRAMachineSinking to NPM --- llvm/include

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAMachineSinking to NPM (PR #138497)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138497 >From 72ba54e7458fa1b63a9deb01ae3b5131222f516b Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 09:17:40 + Subject: [PATCH] [CodeGen][NPM] Port PostRAMachineSinking to NPM --- llvm/include

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass (PR #138496)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138496 >From 7b10c2ced561a9693f505e187bfb64f593e81562 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 08:58:58 + Subject: [PATCH] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass --- llvm/lib/T

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port InitUndef to NPM (PR #138495)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138495 >From 2db3af07bf3894df69e0336e2c71c4704fd4fca8 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 08:47:42 + Subject: [PATCH 1/2] [CodeGen][NPM] Port InitUndef to NPM --- llvm/include/llvm/C

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass (PR #138496)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138496 >From 7b10c2ced561a9693f505e187bfb64f593e81562 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 08:58:58 + Subject: [PATCH] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass --- llvm/lib/T

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port InitUndef to NPM (PR #138495)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/138495 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass (PR #138496)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/138496 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAMachineSinking to NPM (PR #138497)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/138497 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Complete optimized regalloc pipeline (PR #138491)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/138491 >From fec3016e7cfaefd3fb66a7ec3e9c9a09085e2d49 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 06:30:03 + Subject: [PATCH] [AMDGPU][NPM] Complete optimized regalloc pipeline Also fill in s

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass (PR #138496)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/138496 None >From bd51fd929097dba2593a6a0f3e7cb7982ff75b57 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 08:58:58 + Subject: [PATCH] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass --- llvm

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAMachineSinking to NPM (PR #138497)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/138497 None Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Aria

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port InitUndef to NPM (PR #138495)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/138495 None >From 2db3af07bf3894df69e0336e2c71c4704fd4fca8 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 5 May 2025 08:47:42 + Subject: [PATCH] [CodeGen][NPM] Port InitUndef to NPM --- llvm/include/llvm

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass (PR #138496)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138496?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port InitUndef to NPM (PR #138495)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138495?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAMachineSinking to NPM (PR #138497)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138497?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/134033 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans

[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #133050)

https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/133050 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #133050)

optimisan wrote: Stack updated manually: * #133050 * **#134033** https://app.graphite.dev/github/pr/llvm/llvm-project/134033?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#135752** https:/

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/134033 >From f20165ea400c932590036224b5f3f4f2ccac00c8 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 2 Apr 2025 06:22:30 + Subject: [PATCH] [AMDGPU][NPM] Add isRequired to passes missing it --- llvm/lib/T

[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #138830)

https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/138830 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #138830)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/138830 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #138830)

https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/138830 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (PR #120557)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/120557 >From 64fc22034753b75dceb4d1f51ab2de88649d291a Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Tue, 11 Feb 2025 12:36:40 + Subject: [PATCH 1/4] [CodeGen][NewPM] Plug greedy RA in codegen pipeline --- llv

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocGreedy to NPM (PR #119540)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/119540 >From 38a3dab96c301bd21eaa7586e49484f35a237f71 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 11 Dec 2024 08:51:55 + Subject: [PATCH 1/8] [CodeGen][NewPM] Port RegAllocGreedy to NPM --- llvm/includ

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM (PR #118462)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/118462 >From 6638037194a6ba920de27d08ffb33f599d601bd5 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Tue, 3 Dec 2024 10:12:36 + Subject: [PATCH 1/9] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocGreedy to NPM (PR #119540)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/119540 >From cc0367a02d043a96980843b1ea491779daa2d3c0 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 11 Dec 2024 08:51:55 + Subject: [PATCH 1/8] [CodeGen][NewPM] Port RegAllocGreedy to NPM --- llvm/includ

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertWaitcnts to NPM (PR #130061)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130061 >From 6faf91245f016f428516d571e5bc8c85f983eb53 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 04:41:08 + Subject: [PATCH] [AMDGPU][NPM] Port SIInsertWaitcnts to NPM --- llvm/lib/Target/A

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertHardClauses to NPM (PR #130062)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130062 >From 39768ea2dd18e37366c4034c677c83c1887fce0b Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 04:52:38 + Subject: [PATCH] [AMDGPU][NPM] Port SIInsertHardClauses to NPM --- llvm/lib/Targe

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130064 >From 147e7aff2a06c2b55dac8b9c9d1cd0c366325264 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:07:23 + Subject: [PATCH] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM --- llvm/lib/Tar

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM (PR #130065)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130065 >From 18645979e311d48be0926edac75cc92ed255fe5e Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:20:13 + Subject: [PATCH] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM --- llvm/lib/Target/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM (PR #130066)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130066 >From 1d23b9ce3735a442acdf3d1d2bae44cf81a9712c Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:42:54 + Subject: [PATCH] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM --- .../llvm/C

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SILateBranchLowering to NPM (PR #130063)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130063 >From 33a5201fec71751cec72bf63fd80b873961ac247 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 05:26:49 + Subject: [PATCH] [AMDGPU][NPM] Port SILateBranchLowering to NPM --- llvm/lib/Targ

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM (PR #130069)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130069 >From 5c5dde0748e0ea175f51c462eae329bea3a9188e Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:20:36 + Subject: [PATCH] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM --- ..

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Cleanup AMDGPUPassRegistry.def (PR #130071)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130071 >From e281c45b9e5853115605cd0c9fbb232b0dacdc3b Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:56:28 + Subject: [PATCH] [AMDGPU][NPM] Cleanup AMDGPUPassRegistry.def --- llvm/lib/Target

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port BranchRelaxation to NPM (PR #130067)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130067 >From b4d0fbae6828037b73903aef6a122458c8ce48fa Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:56:04 + Subject: [PATCH] [CodeGen][NPM] Port BranchRelaxation to NPM This completes the Pr

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM (PR #130068)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130068 >From f06e7f4a6b9638adc3ee286ce64191741e021d91 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 09:30:37 + Subject: [PATCH] [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM --- .../llvm/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PatchableFunction to NPM (PR #129866)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129866 >From 399b9973e9f788a58c7476925a85f090d673ca0f Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:34:25 + Subject: [PATCH] [CodeGen][NPM] Port PatchableFunction to NPM --- llvm/include/ll

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port FEntryInserter to NPM (PR #129857)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129857 >From 4b18d66c696656f0f04dff15028904f9b4c17901 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 09:19:08 + Subject: [PATCH] [CodeGen][NPM] Port FEntryInserter to NPM --- llvm/include/llvm/

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port GCNCreateVOPD to NPM (PR #130059)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130059 >From 9ba01338705902014ddf5f6d4285cd0563ce1e28 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:52:00 + Subject: [PATCH] [AMDGPU][NPM] Port GCNCreateVOPD to NPM --- llvm/lib/Target/AMDG

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (PR #130070)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130070 >From dc9e5f0c8e37c54b7ba8fa24c57e8c8912861619 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:45:25 + Subject: [PATCH] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM --- .../

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port XRayInstrumentation to NPM (PR #129865)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129865 >From 20188b3b5d1dbfea562b0912bf4624d9c7c18ca1 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:11:27 + Subject: [PATCH] [CodeGen][NPM] Port XRayInstrumentation to NPM --- .../llvm/Code

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM (PR #130068)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130068?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (PR #130070)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130070 >From d4ed8c036554f66384ab9578c32f00a50426a88e Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:45:25 + Subject: [PATCH] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM --- .../

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Cleanup AMDGPUPassRegistry.def (PR #130071)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130071 None >From 462a05548fb65f3f8cf1310edd064ee1483c1c43 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:56:28 + Subject: [PATCH] [AMDGPU][NPM] Cleanup AMDGPUPassRegistry.def --- llvm/lib/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM (PR #130069)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130069 None >From 003ff875ebf977ef373e8d039a31a5cbb3f8c853 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:20:36 + Subject: [PATCH] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM -

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM (PR #130068)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130068 None >From e9865932db7cff474a1df1d71f9a01b2d6bec47f Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 09:30:37 + Subject: [PATCH] [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM --- ...

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (PR #130070)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130070 None >From 578b467fb9a8338e84833f6596768b8048bbd531 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:45:25 + Subject: [PATCH] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM ---

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SILateBranchLowering to NPM (PR #130063)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130063 None >From 5f050b8e6b439c534cbbfe36305560b7fa2c5cfa Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 05:26:49 + Subject: [PATCH] [AMDGPU][NPM] Port SILateBranchLowering to NPM --- llvm/li

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM (PR #130066)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130066 None >From 0a495b860dfd609179c655c87c2146c6aba3c7f1 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:42:54 + Subject: [PATCH] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM --- .../

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port GCNCreateVOPD to NPM (PR #130059)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130059?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Cleanup AMDGPUPassRegistry.def (PR #130071)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130071?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM (PR #130069)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130069?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (PR #130070)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130070?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM (PR #130066)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130066?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port GCNCreateVOPD to NPM (PR #130059)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130059 None >From d82b6dd57dcae61ba7790c7681dc5ae3a5d7fbbd Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:52:00 + Subject: [PATCH] [AMDGPU][NPM] Port GCNCreateVOPD to NPM --- llvm/lib/Targe

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port BranchRelaxation to NPM (PR #130067)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130067?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertHardClauses to NPM (PR #130062)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130062 None >From 88d2174897b3a23ea0a7d8b1e915eb99c0992696 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 04:52:38 + Subject: [PATCH] [AMDGPU][NPM] Port SIInsertHardClauses to NPM --- llvm/lib

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM (PR #130065)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130065?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Cleanup AMDGPUPassRegistry.def (PR #130071)

https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/130071 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertWaitcnts to NPM (PR #130061)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130061 None >From 10605a79e1d1c6d1c227b98019fd4a4c568345b8 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 04:41:08 + Subject: [PATCH] [AMDGPU][NPM] Port SIInsertWaitcnts to NPM --- llvm/lib/Ta

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineBlockPlacementStats to NPM (PR #129853)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129853 >From 957ca954e2bdaf7f1c3dc841eeeadf76e2580ce8 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 08:59:23 + Subject: [PATCH 1/2] [CodeGen][NPM] Port MachineBlockPlacementStats to NPM --- ..

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineBlockPlacementStats to NPM (PR #129853)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129853 >From 19662079ef1d5ede80dc6cdf0d8c0983033b15ed Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 08:59:23 + Subject: [PATCH 1/2] [CodeGen][NPM] Port MachineBlockPlacementStats to NPM --- ..

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Cleanup AMDGPUPassRegistry.def (PR #130071)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130071 >From 96b27b6690cb5b8c4925a7a584f1bfd4781a5cf0 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:56:28 + Subject: [PATCH] [AMDGPU][NPM] Cleanup AMDGPUPassRegistry.def --- llvm/lib/Target

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM (PR #130066)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130066 >From 0397215a75549a48fa2569344d8a5bd0a2addc91 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:42:54 + Subject: [PATCH] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM --- .../llvm/C

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM (PR #130060)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130060 >From b1402edb380ddf044af4810a9b7a88c4f874c0ed Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 11:06:40 + Subject: [PATCH] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM --- llvm/lib/Target/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM (PR #130069)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130069 >From ca3edf5d1ae10f70bce8efe35b858104c67b917c Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:20:36 + Subject: [PATCH] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM --- ..

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port BranchRelaxation to NPM (PR #130067)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130067 >From b8c2186b63bd1b494cec02624c588596b7237600 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:56:04 + Subject: [PATCH] [CodeGen][NPM] Port BranchRelaxation to NPM This completes the Pr

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertWaitcnts to NPM (PR #130061)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130061 >From 11b7833df74f3d2dd933a28b69a5dcf86c041b21 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 04:41:08 + Subject: [PATCH] [AMDGPU][NPM] Port SIInsertWaitcnts to NPM --- llvm/lib/Target/A

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM (PR #130068)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130068 >From ffd87288a22b18efaa3763909ca2d1ca75bff384 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 09:30:37 + Subject: [PATCH] [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM --- .../llvm/

[llvm-branch-commits] [llvm] [AMDGPU][NFC] Format GCNCreateVOPD.cpp (PR #130548)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130548 None >From 78bcc3a3576cc1f0dba5c9feb5ed781a62877ffe Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 10 Mar 2025 04:31:20 + Subject: [PATCH] [AMDGPU][NFC] Format GCNCreateVOPD.cpp --- llvm/lib/Targe

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port GCNCreateVOPD to NPM (PR #130059)

https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/130059 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

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