https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130059
None >From d82b6dd57dcae61ba7790c7681dc5ae3a5d7fbbd Mon Sep 17 00:00:00 2001 From: Akshat Oke <akshat....@amd.com> Date: Wed, 5 Mar 2025 10:52:00 +0000 Subject: [PATCH] [AMDGPU][NPM] Port GCNCreateVOPD to NPM --- llvm/lib/Target/AMDGPU/AMDGPU.h | 7 ++- llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def | 1 + .../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 4 +- llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp | 53 ++++++++++++------- 4 files changed, 43 insertions(+), 22 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h index 57297288eecb4..f208a8bb9964b 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPU.h +++ b/llvm/lib/Target/AMDGPU/AMDGPU.h @@ -358,6 +358,11 @@ class SIModeRegisterPass : public PassInfoMixin<SIModeRegisterPass> { PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager &AM); }; +class GCNCreateVOPDPass : public PassInfoMixin<GCNCreateVOPDPass> { +public: + PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &AM); +}; + FunctionPass *createAMDGPUAnnotateUniformValuesLegacy(); ModulePass *createAMDGPUPrintfRuntimeBinding(); @@ -443,7 +448,7 @@ extern char &SIFormMemoryClausesID; void initializeSIPostRABundlerLegacyPass(PassRegistry &); extern char &SIPostRABundlerLegacyID; -void initializeGCNCreateVOPDPass(PassRegistry &); +void initializeGCNCreateVOPDLegacyPass(PassRegistry &); extern char &GCNCreateVOPDID; void initializeAMDGPUUnifyDivergentExitNodesPass(PassRegistry&); diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def index 1050855176c04..0e3dcb4267ede 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def +++ b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def @@ -103,6 +103,7 @@ MACHINE_FUNCTION_PASS("amdgpu-rewrite-partial-reg-uses", GCNRewritePartialRegUse MACHINE_FUNCTION_PASS("amdgpu-pre-ra-optimizations", GCNPreRAOptimizationsPass()) MACHINE_FUNCTION_PASS("amdgpu-nsa-reassign", GCNNSAReassignPass()) MACHINE_FUNCTION_PASS("gcn-dpp-combine", GCNDPPCombinePass()) +MACHINE_FUNCTION_PASS("gcn-create-vopd", GCNCreateVOPDPass()) MACHINE_FUNCTION_PASS("si-fix-sgpr-copies", SIFixSGPRCopiesPass()) MACHINE_FUNCTION_PASS("si-fix-vgpr-copies", SIFixVGPRCopiesPass()) MACHINE_FUNCTION_PASS("si-fold-operands", SIFoldOperandsPass()); diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index ce3dcd920bce3..73ae9135eb319 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -546,7 +546,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() { initializeSIPreAllocateWWMRegsLegacyPass(*PR); initializeSIFormMemoryClausesLegacyPass(*PR); initializeSIPostRABundlerLegacyPass(*PR); - initializeGCNCreateVOPDPass(*PR); + initializeGCNCreateVOPDLegacyPass(*PR); initializeAMDGPUUnifyDivergentExitNodesPass(*PR); initializeAMDGPUAAWrapperPassPass(*PR); initializeAMDGPUExternalAAWrapperPass(*PR); @@ -2149,7 +2149,7 @@ void AMDGPUCodeGenPassBuilder::addPostRegAlloc(AddMachinePass &addPass) const { void AMDGPUCodeGenPassBuilder::addPreEmitPass(AddMachinePass &addPass) const { if (isPassEnabled(EnableVOPD, CodeGenOptLevel::Less)) { - // TODO: addPass(GCNCreateVOPDPass()); + addPass(GCNCreateVOPDPass()); } // TODO: addPass(SIMemoryLegalizerPass()); // TODO: addPass(SIInsertWaitcntsPass()); diff --git a/llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp b/llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp index d40a1a2a10d9b..614262e817162 100644 --- a/llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp +++ b/llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp @@ -27,6 +27,7 @@ #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineOperand.h" +#include "llvm/CodeGen/MachinePassManager.h" #include "llvm/Support/Debug.h" #define DEBUG_TYPE "gcn-create-vopd" @@ -36,7 +37,7 @@ using namespace llvm; namespace { -class GCNCreateVOPD : public MachineFunctionPass { +class GCNCreateVOPD { private: class VOPDCombineInfo { public: @@ -49,20 +50,8 @@ class GCNCreateVOPD : public MachineFunctionPass { }; public: - static char ID; const GCNSubtarget *ST = nullptr; - GCNCreateVOPD() : MachineFunctionPass(ID) {} - - void getAnalysisUsage(AnalysisUsage &AU) const override { - AU.setPreservesCFG(); - MachineFunctionPass::getAnalysisUsage(AU); - } - - StringRef getPassName() const override { - return "GCN Create VOPD Instructions"; - } - bool doReplace(const SIInstrInfo *SII, VOPDCombineInfo &CI) { auto *FirstMI = CI.FirstMI; auto *SecondMI = CI.SecondMI; @@ -112,9 +101,7 @@ class GCNCreateVOPD : public MachineFunctionPass { return true; } - bool runOnMachineFunction(MachineFunction &MF) override { - if (skipFunction(MF.getFunction())) - return false; + bool run(MachineFunction &MF) { ST = &MF.getSubtarget<GCNSubtarget>(); if (!AMDGPU::hasVOPD(*ST) || !ST->isWave32()) return false; @@ -163,11 +150,39 @@ class GCNCreateVOPD : public MachineFunctionPass { } }; +class GCNCreateVOPDLegacy : public MachineFunctionPass { +public: + static char ID; + GCNCreateVOPDLegacy() : MachineFunctionPass(ID) {} + + void getAnalysisUsage(AnalysisUsage &AU) const override { + AU.setPreservesCFG(); + MachineFunctionPass::getAnalysisUsage(AU); + } + + StringRef getPassName() const override { + return "GCN Create VOPD Instructions"; + } + bool runOnMachineFunction(MachineFunction &MF) override { + if (skipFunction(MF.getFunction())) + return false; + + return GCNCreateVOPD().run(MF); + } +}; + } // namespace -char GCNCreateVOPD::ID = 0; +PreservedAnalyses llvm::GCNCreateVOPDPass::run(MachineFunction &MF, + MachineFunctionAnalysisManager &AM) { + if (!GCNCreateVOPD().run(MF)) + return PreservedAnalyses::all(); + return getMachineFunctionPassPreservedAnalyses().preserveSet<CFGAnalyses>(); +} + +char GCNCreateVOPDLegacy::ID = 0; -char &llvm::GCNCreateVOPDID = GCNCreateVOPD::ID; +char &llvm::GCNCreateVOPDID = GCNCreateVOPDLegacy::ID; -INITIALIZE_PASS(GCNCreateVOPD, DEBUG_TYPE, "GCN Create VOPD Instructions", +INITIALIZE_PASS(GCNCreateVOPDLegacy, DEBUG_TYPE, "GCN Create VOPD Instructions", false, false) _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits