@@ -1,279 +1,327 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple arm64e-apple-darwin -global-isel=0
-verify-machineinstrs \
-; RUN: -aarch64-ptrauth-auth-checks=none | FileCheck %s -DL="L"
--check-p
@@ -2104,23 +2115,19 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(const
MachineInstr *MI) {
break;
}
- auto AUTKey = (AArch64PACKey::ID)MI->getOperand(0).getImm();
- uint64_t AUTDisc = MI->getOperand(1).getImm();
- unsigned AUTAddrDisc = MI->getOperand(2).getReg(
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/132857
>From 4eac4350b8a540aba5c5ed658353b4f6abaf329b Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Thu, 5 Jun 2025 22:15:52 -0700
Subject: [PATCH] Address comments
Created using spr 1.3.6-beta.1
---
llvm/lib/T
@@ -33,36 +33,45 @@ target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
define i64 @test_auth_blend(i64 %arg, i64 %arg1) {
; UNCHECKED-LABEL: test_auth_blend:
-; UNCHECKED: %bb.0:
-; UNCHECKED-NEXT:mov x16, x0
-; UNCHECKED-NEXT:mov x17, x1
-; UNCHECKED-NEXT:
@@ -1951,9 +1952,23 @@ let Predicates = [HasPAuth] in {
let Uses = [X16];
}
+ def AUTxMxN : Pseudo<(outs GPR64:$AuthVal, GPR64common:$Scratch),
+ (ins GPR64:$Val, i32imm:$Key,
+i64imm:$Disc, GPR64:$AddrDisc),
+
@@ -2146,23 +2153,19 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(const
MachineInstr *MI) {
if (!IsAUTPAC)
return;
- auto PACKey = (AArch64PACKey::ID)MI->getOperand(3).getImm();
- uint64_t PACDisc = MI->getOperand(4).getImm();
- unsigned PACAddrDisc = MI->getOper
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/132857
>From 4eac4350b8a540aba5c5ed658353b4f6abaf329b Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Thu, 5 Jun 2025 22:15:52 -0700
Subject: [PATCH] Address comments
Created using spr 1.3.6-beta.1
---
llvm/lib/T
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/133530
>From b37a44fff650b06eda249060277d0c007226cad2 Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Thu, 3 Apr 2025 21:51:44 -0700
Subject: [PATCH] Fix CMake build
Created using spr 1.3.6-beta.1
---
compiler-rt
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/134197
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llvmbot wrote:
@llvm/pr-subscribers-backend-hexagon
Author: Matt Arsenault (arsenm)
Changes
This is redundant with the IsDefault field, so avoid a really
long enclosing pair of braces. This will make it easier to gradually
remove calls from the default set.
---
Full diff: https://github.c
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/147651
This is redundant with the IsDefault field, so avoid a really
long enclosing pair of braces. This will make it easier to gradually
remove calls from the default set.
>From cab40d42c0720b6ad474b9919e6295578a4cbc00
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/147652?utm_source=stack-comment-downstack-mergeability-warning";
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/147651?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/147652
This doesn't yet attempt to move the OS dependent configuration
shared with other targets. Removes __riscv_flush_icache from the
default set so it's no longer falsely reported as available for
other targets.
>Fro
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/147651
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https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/147652
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llvmbot wrote:
@llvm/pr-subscribers-backend-hexagon
@llvm/pr-subscribers-llvm-selectiondag
Author: Matt Arsenault (arsenm)
Changes
Filter out PPCF128 calls from the default set, and only add them
back to PPC.
---
Full diff: https://github.com/llvm/llvm-project/pull/147656.diff
1 Files A
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/147656?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/147656
Filter out PPCF128 calls from the default set, and only add them
back to PPC.
>From 5b51c683685361162172f98fbe0dda31f7e067ad Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 9 Jul 2025 14:40:34 +0900
Sub
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/147656
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llvmbot wrote:
@llvm/pr-subscribers-vectorizers
Author: Sam Tebbs (SamTebbs33)
Changes
Partial reductions can easily be represented by the VPReductionRecipe class by
setting their scale factor to something greater than 1. This PR merges the two
together and gives VPReductionRecipe a VFSc
https://github.com/SamTebbs33 closed
https://github.com/llvm/llvm-project/pull/146073
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llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: Sam Tebbs (SamTebbs33)
Changes
Partial reductions can easily be represented by the VPReductionRecipe class by
setting their scale factor to something greater than 1. This PR merges the two
together and gives VPReductionRecipe a
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/147482
>From ef8813a7879e2ef6f97694bad32ad336794d4a80 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Tue, 24 Jun 2025 16:45:41 +0900
Subject: [PATCH] Hexagon: Move runtime libcall configuration to tablegen
---
ll
SamTebbs33 wrote:
Closed in favour of a PR based on top of
https://github.com/llvm/llvm-project/pull/147302
https://github.com/llvm/llvm-project/pull/146073
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@@ -953,8 +953,17 @@ class SelectionDAG {
}
/// Insert \p SubVec at the \p Idx element of \p Vec.
+ /// If \p SkipUndef is true and \p SubVec is UNDEF/POISON, then \p Vec is
+ /// returned.
bjope wrote:
I think having an explicit flag to say "I want an
https://github.com/bjope edited https://github.com/llvm/llvm-project/pull/143105
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llvmbot wrote:
@llvm/pr-subscribers-clang-static-analyzer-1
Author: Utkarsh Saxena (usx95)
Changes
This patch introduces a new Python-based benchmarking tool for Clang's Lifetime
Safety analysis. This script automates the process of generating targeted C++
test cases, measuring the perfo
Author: enh-google
Date: 2025-07-08T15:04:06-04:00
New Revision: 423d4220dbc69236fc4c8a98ac75c7780eaece2c
URL:
https://github.com/llvm/llvm-project/commit/423d4220dbc69236fc4c8a98ac75c7780eaece2c
DIFF:
https://github.com/llvm/llvm-project/commit/423d4220dbc69236fc4c8a98ac75c7780eaece2c.diff
LO
llvmbot wrote:
@llvm/pr-subscribers-llvm-ir
Author: Matt Arsenault (arsenm)
Changes
This doesn't yet attempt to move the OS dependent configuration
shared with other targets. Removes __riscv_flush_icache from the
default set so it's no longer falsely reported as available for
other targets
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/147658
Starts adding a stub X86 configuration which doesn't attempt
the system specific pieces yet. This is mostly to have a point
to add back in the f80 calls so they can be removed from every
other target.
>From 1391d
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/147658?utm_source=stack-comment-downstack-mergeability-warning";
llvmbot wrote:
@llvm/pr-subscribers-llvm-selectiondag
@llvm/pr-subscribers-backend-hexagon
Author: Matt Arsenault (arsenm)
Changes
Starts adding a stub X86 configuration which doesn't attempt
the system specific pieces yet. This is mostly to have a point
to add back in the f80 calls so the
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/147658
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https://github.com/RKSimon approved this pull request.
https://github.com/llvm/llvm-project/pull/147651
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arsenm wrote:
### Merge activity
* **Jul 8, 8:07 AM UTC**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/146081).
https://github.com/llvm/llvm-project/pull/146081
__
@@ -1213,11 +1213,17 @@ static void insertSpills(const FrameDataInfo
&FrameData, coro::Shape &Shape) {
for (const auto &A : FrameData.Allocas) {
AllocaInst *Alloca = A.Alloca;
UsersToUpdate.clear();
-for (User *U : Alloca->users()) {
+for (User *U : make_earl
https://github.com/inbelic updated
https://github.com/llvm/llvm-project/pull/147115
>From cb29c3acd72990b35e7be85d2f9796fb8098f3d2 Mon Sep 17 00:00:00 2001
From: Finn Plummer
Date: Fri, 27 Jun 2025 18:36:38 +
Subject: [PATCH 01/15] nfc: introduce wrapper `RootSignatureElement` around
`Root
https://github.com/inbelic edited
https://github.com/llvm/llvm-project/pull/147115
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@@ -130,12 +149,13 @@ class SemaHLSL : public SemaBase {
/// Creates the Root Signature decl of the parsed Root Signature elements
/// onto the AST and push it onto current Scope
- void ActOnFinishRootSignatureDecl(
- SourceLocation Loc, IdentifierInfo *DeclIdent,
-
https://github.com/joaosaffran updated
https://github.com/llvm/llvm-project/pull/147573
>From 01a558be2b36a6bb00e1027c4d042c7bacd4ed5a Mon Sep 17 00:00:00 2001
From: joaosaffran
Date: Mon, 7 Jul 2025 19:26:24 +
Subject: [PATCH 1/6] add validation
---
.../DXILPostOptimizationValidation.cpp
llvmbot wrote:
@llvm/pr-subscribers-backend-systemz
Author: Matt Arsenault (arsenm)
Changes
The ZOS run line is mostly broken. update_test_checks seems
to not work on it and I have no idea what I'm looking at here.
It's not obvious to me what the calls are. I added some checks
for the refe
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/147473?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/147473
The ZOS run line is mostly broken. update_test_checks seems
to not work on it and I have no idea what I'm looking at here.
It's not obvious to me what the calls are. I added some checks
for the references to the l
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/139517
>From 67eb18a9d3e49b07491f95dde427f434337612b8 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 12 May 2025 08:02:22 +
Subject: [PATCH 1/4] [CodeGen][NPM] Introduce FreeAllAnalysesPass
This replaces t
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff HEAD~1 HEAD --extensions h,cpp --
llvm/include/llvm/CodeGen/MachineFunctionAnalysis.h
@@ -2128,6 +2128,161 @@ genLoopOp(lower::AbstractConverter &converter,
lower::SymMap &symTable,
return loopOp;
}
+static mlir::omp::CanonicalLoopOp
+genCanonicalLoopOp(lower::AbstractConverter &converter, lower::SymMap
&symTable,
+ semantics::SemanticsCon
https://github.com/cdevadas approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/139517
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@@ -2128,6 +2128,161 @@ genLoopOp(lower::AbstractConverter &converter,
lower::SymMap &symTable,
return loopOp;
}
+static mlir::omp::CanonicalLoopOp
+genCanonicalLoopOp(lower::AbstractConverter &converter, lower::SymMap
&symTable,
+ semantics::SemanticsCon
@@ -3012,6 +3013,366 @@ void LoopNestOp::gatherWrappers(
}
}
+//===--===//
+// OpenMP canonical loop handling
+//===--===//
+
+std::tuple
+
@@ -382,7 +382,7 @@ FUNCTION_PASS("extra-vector-passes",
FUNCTION_PASS("fix-irreducible", FixIrreduciblePass())
FUNCTION_PASS("flatten-cfg", FlattenCFGPass())
FUNCTION_PASS("float2int", Float2IntPass())
-FUNCTION_PASS("free-all-analyses", FreeAllAnalysesPass())
+FUNCTION_PASS("
@@ -3012,6 +3013,366 @@ void LoopNestOp::gatherWrappers(
}
}
+//===--===//
+// OpenMP canonical loop handling
+//===--===//
+
+std::tuple
+
@@ -3012,6 +3013,366 @@ void LoopNestOp::gatherWrappers(
}
}
+//===--===//
+// OpenMP canonical loop handling
+//===--===//
+
+std::tuple
+
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/139517
>From 67eb18a9d3e49b07491f95dde427f434337612b8 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 12 May 2025 08:02:22 +
Subject: [PATCH 1/5] [CodeGen][NPM] Introduce FreeAllAnalysesPass
This replaces t
@@ -382,7 +382,7 @@ FUNCTION_PASS("extra-vector-passes",
FUNCTION_PASS("fix-irreducible", FixIrreduciblePass())
FUNCTION_PASS("flatten-cfg", FlattenCFGPass())
FUNCTION_PASS("float2int", Float2IntPass())
-FUNCTION_PASS("free-all-analyses", FreeAllAnalysesPass())
+FUNCTION_PASS("
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/142391
>From 7b0003f249619b6b584d8a6501a2c6048deb1843 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Thu, 8 May 2025 17:38:27 +
Subject: [PATCH 1/3] [AArch64] Prepare for split ZPR and PPR area allocation
(N
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/144785
>From fed2aa77ab2cd5d2354d128fcfbe70bad8a4ec22 Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Wed, 18 Jun 2025 21:55:47 +0200
Subject: [PATCH 1/3] [Flang][MLIR] Add `!$omp unroll` and
`omp.unroll_heurist
@@ -299,14 +297,20 @@ class AArch64FunctionInfo final : public
MachineFunctionInfo {
TailCallReservedStack = bytes;
}
- bool hasCalculatedStackSizeSVE() const { return HasCalculatedStackSizeSVE; }
+ void setStackSizeZPR(uint64_t S) {
+HasCalculatedStackSizeSVE = t
@@ -299,14 +297,20 @@ class AArch64FunctionInfo final : public
MachineFunctionInfo {
TailCallReservedStack = bytes;
}
- bool hasCalculatedStackSizeSVE() const { return HasCalculatedStackSizeSVE; }
+ void setStackSizeZPR(uint64_t S) {
+HasCalculatedStackSizeSVE = t
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/138497
>From aac1ecba7f1c390cd34ec529a20c89b3dfcbaf34 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 5 May 2025 09:17:40 +
Subject: [PATCH] [CodeGen][NPM] Port PostRAMachineSinking to NPM
---
llvm/include
@@ -19,6 +19,11 @@
namespace llvm {
+struct SVEStackSizes {
MacDue wrote:
The return value of `determineSVEStackObjectOffsets()` is the SVE stack sizes
(the values will be >= 0).
https://github.com/llvm/llvm-project/pull/142391
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https://github.com/llvm/llvm-project/pull/138660
>From 6ecdd40d56c96c02be51a80352a64e6cfa96b748 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 6 May 2025 09:05:52 +
Subject: [PATCH] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag
---
llvm/includ
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/138828
>From b9b06240fb34a1019abc3951f38342aaa8955dbe Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 6 May 2025 11:04:05 +
Subject: [PATCH 1/2] [CodeGen][NPM] Register Function Passes
---
llvm/include/llv
https://github.com/RossBrunton updated
https://github.com/llvm/llvm-project/pull/147317
>From 9b79557e7a536ccd4b02365c9dd98a4ef69f87e1 Mon Sep 17 00:00:00 2001
From: Ross Brunton
Date: Mon, 7 Jul 2025 16:10:19 +0100
Subject: [PATCH 1/2] [Offload] Allow "tagging" device info entries with
offloa
https://github.com/heiher approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/147471
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https://github.com/RossBrunton updated
https://github.com/llvm/llvm-project/pull/147318
>From 0550a48a4794312063b27a342d68f708ccf55684 Mon Sep 17 00:00:00 2001
From: Ross Brunton
Date: Mon, 7 Jul 2025 16:13:32 +0100
Subject: [PATCH 1/2] [Offload] Refactor device information queries to use new
https://github.com/RossBrunton updated
https://github.com/llvm/llvm-project/pull/147318
>From 0550a48a4794312063b27a342d68f708ccf55684 Mon Sep 17 00:00:00 2001
From: Ross Brunton
Date: Mon, 7 Jul 2025 16:13:32 +0100
Subject: [PATCH] [Offload] Refactor device information queries to use new
tagg
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/138670
>From 9acbf2f2fe9e90a96714e5fb6e0e94f7511c6cbd Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 6 May 2025 09:55:07 +
Subject: [PATCH] [CodeGen][NPM] Read TargetMachine's EnableIPRA option
---
llvm/i
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/138829
>From 1c9888a20e8e42d6dadf7da80f90870414b4cdb9 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 6 May 2025 14:12:36 +
Subject: [PATCH 1/2] [CodeGen][NPM] Port ProcessImplicitDefs to NPM
---
llvm/incl
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/138830
>From eb703f4f25a1d8896b7a90c602a6f22888934752 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 7 May 2025 08:57:31 +
Subject: [PATCH] [CodeGen][NPM] Account inserted passes for -start/stop
options
-
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/139516
>From b1efb52e4c7b2c8f2b98947bcc8265237fedb03e Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 7 May 2025 09:40:22 +
Subject: [PATCH] [AMDGPU][NPM] Fill in addPreSched2 passes
---
llvm/lib/Target/AM
https://github.com/paulwalker-arm approved this pull request.
https://github.com/llvm/llvm-project/pull/147468
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@@ -849,17 +849,46 @@ SDValue
DAGTypeLegalizer::SoftenFloatRes_UnaryWithTwoFPResults(
SetSoftenedFloat(SDValue(N, ResNum), CreateStackLoad(SlackSlot));
}
- return SDValue();
+ return true;
}
SDValue DAGTypeLegalizer::SoftenFloatRes_FSINCOS(SDNode *N) {
- return S
https://github.com/MacDue approved this pull request.
The logic here LGTM, can't vouch for the WASM tests though.
https://github.com/llvm/llvm-project/pull/147468
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@@ -849,17 +849,46 @@ SDValue
DAGTypeLegalizer::SoftenFloatRes_UnaryWithTwoFPResults(
SetSoftenedFloat(SDValue(N, ResNum), CreateStackLoad(SlackSlot));
}
- return SDValue();
+ return true;
}
SDValue DAGTypeLegalizer::SoftenFloatRes_FSINCOS(SDNode *N) {
- return S
llvmbot wrote:
@llvm/pr-subscribers-backend-hexagon
Author: Matt Arsenault (arsenm)
Changes
---
Patch is 44.74 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/147474.diff
1 Files Affected:
- (added) llvm/test/CodeGen/Hexagon/llvm.sincos.ll
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/147474
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https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/147477
None
>From bcdec6c6ab324120ce1049acb983ff9b151963e4 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Tue, 8 Jul 2025 16:59:33 +0900
Subject: [PATCH] SystemZ: Remove unnecessary requires asserts from test
---
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/147477?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/147473
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https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/147477
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arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/147474?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/MacDue edited
https://github.com/llvm/llvm-project/pull/147468
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https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/147474
None
>From 71feda6983a21ec11f0c663d8fd8be901a3efed5 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Tue, 8 Jul 2025 16:55:31 +0900
Subject: [PATCH] Hexagon: Add sincos intrinsic test
---
llvm/test/CodeGen/
@@ -849,17 +849,46 @@ SDValue
DAGTypeLegalizer::SoftenFloatRes_UnaryWithTwoFPResults(
SetSoftenedFloat(SDValue(N, ResNum), CreateStackLoad(SlackSlot));
}
- return SDValue();
+ return true;
}
SDValue DAGTypeLegalizer::SoftenFloatRes_FSINCOS(SDNode *N) {
- return S
llvmbot wrote:
@llvm/pr-subscribers-backend-systemz
Author: Matt Arsenault (arsenm)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/147477.diff
1 Files Affected:
- (modified) llvm/test/CodeGen/SystemZ/systemz-large-stack-frames.ll (-1)
``diff
diff --git a/l
@@ -849,17 +849,46 @@ SDValue
DAGTypeLegalizer::SoftenFloatRes_UnaryWithTwoFPResults(
SetSoftenedFloat(SDValue(N, ResNum), CreateStackLoad(SlackSlot));
}
- return SDValue();
+ return true;
}
SDValue DAGTypeLegalizer::SoftenFloatRes_FSINCOS(SDNode *N) {
- return S
https://github.com/arsenm edited
https://github.com/llvm/llvm-project/pull/147468
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arsenm wrote:
### Merge activity
* **Jul 8, 8:07 AM UTC**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/146080).
https://github.com/llvm/llvm-project/pull/146080
__
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/146084
>From 0daf2fa9aa2e36d9d7c08a2cf7c404b94541f177 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 23 Jun 2025 19:10:30 +0900
Subject: [PATCH 1/5] RuntimeLibcalls: Remove table of soft float compare cond
co
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/146083
>From c8ec606cb68011cb6b3325578cba85baf09166a5 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 23 Jun 2025 20:14:11 +0900
Subject: [PATCH 1/3] ARM: Unconditionally set eabi libcall calling convs in
Runt
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/146084
>From 5e6ec6330a82caa45790f2feb3b82502e2bbdd98 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 23 Jun 2025 23:23:01 +0900
Subject: [PATCH] ARM: Start moving runtime libcalls into tablegen
We still need
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/146083
>From 95a6996b4bd696673e91a6def421c14534dad4c1 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 23 Jun 2025 20:14:11 +0900
Subject: [PATCH 1/3] ARM: Unconditionally set eabi libcall calling convs in
Runt
https://github.com/graphite-app[bot] updated
https://github.com/llvm/llvm-project/pull/146083
>From 95a6996b4bd696673e91a6def421c14534dad4c1 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 23 Jun 2025 20:14:11 +0900
Subject: [PATCH 1/3] ARM: Unconditionally set eabi libcall calling con
https://github.com/RKSimon approved this pull request.
https://github.com/llvm/llvm-project/pull/147468
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https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/146083
>From 95a6996b4bd696673e91a6def421c14534dad4c1 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 23 Jun 2025 20:14:11 +0900
Subject: [PATCH 1/3] ARM: Unconditionally set eabi libcall calling convs in
Runt
@@ -1213,11 +1213,17 @@ static void insertSpills(const FrameDataInfo
&FrameData, coro::Shape &Shape) {
for (const auto &A : FrameData.Allocas) {
AllocaInst *Alloca = A.Alloca;
UsersToUpdate.clear();
-for (User *U : Alloca->users()) {
+for (User *U : make_earl
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/138496
>From c644259a62dd20fb84de932f6123882909ba89ed Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 5 May 2025 08:58:58 +
Subject: [PATCH] [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass
---
llvm/lib/T
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/147468
Fix asserting in the error case.
>From 65011f9bf50b08f011edcd281ccc60431e0d170c Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Tue, 8 Jul 2025 15:35:25 +0900
Subject: [PATCH] DAG: Fall back to separate sin
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/147468?utm_source=stack-comment-downstack-mergeability-warning";
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