llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Akshat Oke (optimisan)
Changes
This allows -passes option to target function passes in the codegen pipeline
by their CL name.
---
Full diff: https://github.com/llvm/llvm-project/pull/138828.diff
3 Files Affected:
- (modified)
https://github.com/tblah approved this pull request.
Thanks for the updates
https://github.com/llvm/llvm-project/pull/138505
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https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120716
>From 72fd8a6b0d8d304992a804e7e05367389feedc2c Mon Sep 17 00:00:00 2001
From: jofrn
Date: Fri, 20 Dec 2024 06:14:28 -0500
Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector
AtomicExpan
@@ -162,7 +173,52 @@ class DoConcurrentConversion
assert(loop.getRegion().hasOneBlock());
mlir::Block &loopBlock = loop.getRegion().getBlocks().front();
-// Collect iteration variable(s) allocations do that we can move them
+// Handle localization
+if (!loo
https://github.com/fhahn approved this pull request.
LGTM, thanks!
https://github.com/llvm/llvm-project/pull/138681
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https://github.com/svenvh approved this pull request.
https://github.com/llvm/llvm-project/pull/138863
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https://github.com/skatrak approved this pull request.
Thank you, this LGTM. I just have a non-blocking suggestion.
https://github.com/llvm/llvm-project/pull/137841
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https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/138065
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https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/138064
Rate limit · GitHub
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background-color: #f6f8fa;
color: #24292e;
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https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/125432
>From c5cfc13dc2b4c70860fddf9060805c57a932ba22 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Fri, 31 Jan 2025 13:12:56 -0500
Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic
vector.
After spl
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/125432
>From c5cfc13dc2b4c70860fddf9060805c57a932ba22 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Fri, 31 Jan 2025 13:12:56 -0500
Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic
vector.
After spl
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120640
>From 4783f04e8ce1786d3cb40e8573cd602b9f0979b5 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 16:25:55 -0500
Subject: [PATCH] [SelectionDAG] Split vector types for atomic load
Vector types that aren'
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From c476a2452e64f7f6127ad0265c4c6aba7a08531a Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/138635
>From 939a68f81bd2add47607063c83123c252cc156c8 Mon Sep 17 00:00:00 2001
From: jofernau_amdeng
Date: Tue, 6 May 2025 01:48:11 -0400
Subject: [PATCH] [X86] Remove extra MOV after widening atomic load
This change ad
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120716
>From 8e1beaef4c295d500183bd82e1ddb0010128d4b2 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Fri, 20 Dec 2024 06:14:28 -0500
Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector
AtomicExpan
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120640
>From 4783f04e8ce1786d3cb40e8573cd602b9f0979b5 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 16:25:55 -0500
Subject: [PATCH] [SelectionDAG] Split vector types for atomic load
Vector types that aren'
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120640
>From 4783f04e8ce1786d3cb40e8573cd602b9f0979b5 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 16:25:55 -0500
Subject: [PATCH] [SelectionDAG] Split vector types for atomic load
Vector types that aren'
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 01f388d501562796484ac3d1be8e29c27a33b702 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/138635
>From 939a68f81bd2add47607063c83123c252cc156c8 Mon Sep 17 00:00:00 2001
From: jofernau_amdeng
Date: Tue, 6 May 2025 01:48:11 -0400
Subject: [PATCH] [X86] Remove extra MOV after widening atomic load
This change ad
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From c476a2452e64f7f6127ad0265c4c6aba7a08531a Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/138635
>From 939a68f81bd2add47607063c83123c252cc156c8 Mon Sep 17 00:00:00 2001
From: jofernau_amdeng
Date: Tue, 6 May 2025 01:48:11 -0400
Subject: [PATCH] [X86] Remove extra MOV after widening atomic load
This change ad
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From c476a2452e64f7f6127ad0265c4c6aba7a08531a Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120716
>From 8e1beaef4c295d500183bd82e1ddb0010128d4b2 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Fri, 20 Dec 2024 06:14:28 -0500
Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector
AtomicExpan
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120598
>From 45d0296e3a33d4e483dc6869a058a02f3074c77a Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 11:19:39 -0500
Subject: [PATCH] [SelectionDAG] Widen <2 x T> vector types for atomic load
Vector types of
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From 70a0cadf649521d83669dbb08100c81873c7231b Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120716
>From 8e1beaef4c295d500183bd82e1ddb0010128d4b2 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Fri, 20 Dec 2024 06:14:28 -0500
Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector
AtomicExpan
arsenm wrote:
### Merge activity
* **May 8, 1:53 AM EDT**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/138962).
https://github.com/llvm/llvm-project/pull/138962
__
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/138865
>From 4a1cda956b007b112584f60390162a1cf89f3587 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 7 May 2025 14:39:38 +0200
Subject: [PATCH] clang: Read the address space from the ABIArgInfo
Do not assume
arsenm wrote:
### Merge activity
* **May 8, 1:53 AM EDT**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/138961).
https://github.com/llvm/llvm-project/pull/138961
__
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/138866
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@@ -427,6 +428,29 @@ Value *VPInstruction::generate(VPTransformState &State) {
{PredTy, ScalarTC->getType()},
{VIVElem0, ScalarTC}, nullptr, Name);
}
+ // Count the number of bits set in each lane and redu
@@ -279,6 +278,7 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS(
#ifndef DUMMY_FUNCTION_PASS
#define DUMMY_FUNCTION_PASS(NAME, PASS_NAME)
#endif
+DUMMY_FUNCTION_PASS("tlshoist", TLSVariableHoistPass)
paperchalice wrote:
IR passes are handled in `PassRegistry.def`, just
https://github.com/optimisan edited
https://github.com/llvm/llvm-project/pull/138830
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@@ -279,6 +278,7 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS(
#ifndef DUMMY_FUNCTION_PASS
#define DUMMY_FUNCTION_PASS(NAME, PASS_NAME)
#endif
+DUMMY_FUNCTION_PASS("tlshoist", TLSVariableHoistPass)
paperchalice wrote:
Also tls hoist pass was removed in pull request 11
@@ -70,7 +70,6 @@ FUNCTION_PASS("scalarize-masked-mem-intrin",
ScalarizeMaskedMemIntrinPass())
FUNCTION_PASS("select-optimize", SelectOptimizePass(TM))
FUNCTION_PASS("sjlj-eh-prepare", SjLjEHPreparePass(TM))
FUNCTION_PASS("stack-protector", StackProtectorPass(TM))
-FUNCTION_PA
@@ -418,7 +418,13 @@ class LoopVectorizationPlanner {
/// Build VPlans for the specified \p UserVF and \p UserIC if they are
/// non-zero or all applicable candidate VFs otherwise. If vectorization and
/// interleaving should be avoided up-front, no plans are generated.
-
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/138635
>From 5b5d94887ed368de16e1395727295527ff67b471 Mon Sep 17 00:00:00 2001
From: jofernau_amdeng
Date: Tue, 6 May 2025 01:48:11 -0400
Subject: [PATCH] [X86] Remove extra MOV after widening atomic load
This change ad
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120640
>From 0e4399dc220b175e78ad110118635bf5e843d768 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 16:25:55 -0500
Subject: [PATCH] [SelectionDAG] Split vector types for atomic load
Vector types that aren'
llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: Matt Arsenault (arsenm)
Changes
This fixes emitting undefined behavior where a 64-bit generic
pointer is written to a 32-bit slot allocated for a private pointer.
This can be seen in test/CodeGenOpenCL/amdgcn-automatic-variable.cl's
https://github.com/optimisan ready_for_review
https://github.com/llvm/llvm-project/pull/138830
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https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 08e39f28a1f041a72bbbf3ebe520f9136e5aebbc Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/vpykhtin updated
https://github.com/llvm/llvm-project/pull/135181
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https://github.com/vpykhtin updated
https://github.com/llvm/llvm-project/pull/135180
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https://github.com/llvm/llvm-project/pull/138830
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arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138863?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/138866
It isn't used and is redundant with the result pointer type argument.
A more reasonable API would only have LangAS parameters, or IR parameters,
not both. Not all values have a meaningful value for this. I'm also
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/138863
This fixes emitting undefined behavior where a 64-bit generic
pointer is written to a 32-bit slot allocated for a private pointer.
This can be seen in test/CodeGenOpenCL/amdgcn-automatic-variable.cl's
wrong_pointe
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/138864
This essentially reverts 1bf1a156d673.
OpenCL's handling of address spaces has always been a mess, but it's
better than it used to be so this hack appears to be unnecessary now.
None of the code here should real
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/138865
Do not assume it's the alloca address space, we have an explicit
address space to use for the argument already. Also use the original
value's type instead of assuming DefaultAS.
>From 2e920e995f2db29b40a5b18496dc
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138865?utm_source=stack-comment-downstack-mergeability-warning";
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
This fixes emitting undefined behavior where a 64-bit generic
pointer is written to a 32-bit slot allocated for a private pointer.
This can be seen in test/CodeGenOpenCL/amdgcn-automatic-variable.cl'
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
This essentially reverts 1bf1a156d673.
OpenCL's handling of address spaces has always been a mess, but it's
better than it used to be so this hack appears to be unnecessary now.
None of the code he
llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: Matt Arsenault (arsenm)
Changes
It isn't used and is redundant with the result pointer type argument.
A more reasonable API would only have LangAS parameters, or IR parameters,
not both. Not all values have a meaningful value for th
OCHyams wrote:
> LGTM (although the hand-written (check-lines that is) tests are more fun and
> easier to read)
Agreed. I think I must've lost steam around this part of the stack. Fixed.
https://github.com/llvm/llvm-project/pull/133490
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https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120598
>From 99a560ff2b72ea0dd90c16fedeaac27820398079 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 11:19:39 -0500
Subject: [PATCH] [SelectionDAG] Widen <2 x T> vector types for atomic load
Vector types of
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120640
>From 0e4399dc220b175e78ad110118635bf5e843d768 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 16:25:55 -0500
Subject: [PATCH] [SelectionDAG] Split vector types for atomic load
Vector types that aren'
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 5ce8ea6a12090d66e6bacceea9837c54ee83 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From 531bc05506d196392d1aac609049bda9cad7da01 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 08e39f28a1f041a72bbbf3ebe520f9136e5aebbc Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 5ce8ea6a12090d66e6bacceea9837c54ee83 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120598
>From 99a560ff2b72ea0dd90c16fedeaac27820398079 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 11:19:39 -0500
Subject: [PATCH] [SelectionDAG] Widen <2 x T> vector types for atomic load
Vector types of
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From 531bc05506d196392d1aac609049bda9cad7da01 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/138635
>From 5b5d94887ed368de16e1395727295527ff67b471 Mon Sep 17 00:00:00 2001
From: jofernau_amdeng
Date: Tue, 6 May 2025 01:48:11 -0400
Subject: [PATCH] [X86] Remove extra MOV after widening atomic load
This change ad
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120716
>From 72fd8a6b0d8d304992a804e7e05367389feedc2c Mon Sep 17 00:00:00 2001
From: jofrn
Date: Fri, 20 Dec 2024 06:14:28 -0500
Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector
AtomicExpan
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120640
>From 0e4399dc220b175e78ad110118635bf5e843d768 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 16:25:55 -0500
Subject: [PATCH] [SelectionDAG] Split vector types for atomic load
Vector types that aren'
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From 531bc05506d196392d1aac609049bda9cad7da01 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 08e39f28a1f041a72bbbf3ebe520f9136e5aebbc Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
mstorsjo wrote:
I had a look at the test failures locally; this seems to be caused by updates
on the macOS CI runners - which has been waived on the main branch via #135202
/ 88e15b781506949c56936b8642774125772fdeb2. I guess we could backport that
commit as well? We'd probably need to do that
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 5ce8ea6a12090d66e6bacceea9837c54ee83 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120598
>From 99a560ff2b72ea0dd90c16fedeaac27820398079 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 11:19:39 -0500
Subject: [PATCH] [SelectionDAG] Widen <2 x T> vector types for atomic load
Vector types of
Keenuts wrote:
Hi, I'm trying to understand the heavy load on the CI we have. I see many
force-push/sync of this PR (which triggers a partial build/test).
Is this an automated sync?
https://github.com/llvm/llvm-project/pull/138062
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@@ -3075,9 +3115,6 @@ convertOmpCancel(omp::CancelOp op, llvm::IRBuilderBase
&builder,
llvm::OpenMPIRBuilder::LocationDescription ompLoc(builder);
llvm::OpenMPIRBuilder *ompBuilder = moduleTranslation.getOpenMPBuilder();
- if (failed(checkImplementationStatus(*op.getOper
https://github.com/skatrak edited
https://github.com/llvm/llvm-project/pull/137841
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https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/138863
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llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: Matt Arsenault (arsenm)
Changes
This essentially reverts 1bf1a156d673.
OpenCL's handling of address spaces has always been a mess, but it's
better than it used to be so this hack appears to be unnecessary now.
None of the code her
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Abhina Sree (abhina-sree)
Changes
This patch enables the fexec-charset option to control the execution charset of
string literals. It sets the default internal charset, system charset, and
execution charset for z/OS and UTF-8 for all othe
https://github.com/abhina-sree created
https://github.com/llvm/llvm-project/pull/138895
This patch enables the fexec-charset option to control the execution charset of
string literals. It sets the default internal charset, system charset, and
execution charset for z/OS and UTF-8 for all other
https://github.com/svenvh approved this pull request.
https://github.com/llvm/llvm-project/pull/138864
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https://github.com/optimisan edited
https://github.com/llvm/llvm-project/pull/138829
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https://github.com/optimisan ready_for_review
https://github.com/llvm/llvm-project/pull/138828
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llvmbot wrote:
@llvm/pr-subscribers-backend-x86
Author: Akshat Oke (optimisan)
Changes
AMDGPU/llc-pipeline-npm.ll test update is because the dummy class name is now
changed to its CL name.
---
Patch is 22.56 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-
https://github.com/optimisan ready_for_review
https://github.com/llvm/llvm-project/pull/138829
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Author: Philip Reames
Date: 2025-05-07T08:18:37-07:00
New Revision: 137a062e2185cdd797c0c009f556a200e8194009
URL:
https://github.com/llvm/llvm-project/commit/137a062e2185cdd797c0c009f556a200e8194009
DIFF:
https://github.com/llvm/llvm-project/commit/137a062e2185cdd797c0c009f556a200e8194009.diff
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138866?utm_source=stack-comment-downstack-mergeability-warning";
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138864?utm_source=stack-comment-downstack-mergeability-warning";
llvmbot wrote:
@llvm/pr-subscribers-mlir
Author: Krzysztof Drewniak (krzysz00)
Changes
This PR updates the FoldMemRefAliasOps to use `affine.linearize_index` and
`affine.delinearize_index` to perform the index computations needed to fold a
`memref.expand_shape` or `memref.collapse_shape`
https://github.com/krzysz00 created
https://github.com/llvm/llvm-project/pull/138930
This PR updates the FoldMemRefAliasOps to use `affine.linearize_index` and
`affine.delinearize_index` to perform the index computations needed to fold a
`memref.expand_shape` or `memref.collapse_shape` into it
llvmbot wrote:
@llvm/pr-subscribers-mlir-memref
Author: Krzysztof Drewniak (krzysz00)
Changes
This PR updates the FoldMemRefAliasOps to use `affine.linearize_index` and
`affine.delinearize_index` to perform the index computations needed to fold a
`memref.expand_shape` or `memref.collapse
krzysz00 wrote:
PRs this depends on:
* #138929
https://github.com/llvm/llvm-project/pull/138930
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https://github.com/iajbar approved this pull request.
https://github.com/llvm/llvm-project/pull/138770
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ilovepi wrote:
> I can join libc monthly meeting, sure.
Great. Looking forward to discussing this then. I'll add the topic to the
meeting agenda.
https://github.com/llvm/llvm-project/pull/135706
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https://github.com/efriedma-quic approved this pull request.
https://github.com/llvm/llvm-project/pull/138863
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https://github.com/llvm/llvm-project/pull/138830
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@@ -548,19 +357,16 @@ class DoConcurrentConversionPass
return;
}
-llvm::DenseSet concurrentLoopsToSkip;
+llvm::DenseSet concurrentLoopsToSkip;
tblah wrote:
My concern was that the walk order might be changed some time because I didn't
reali
https://github.com/paperchalice edited
https://github.com/llvm/llvm-project/pull/138828
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https://github.com/tblah approved this pull request.
https://github.com/llvm/llvm-project/pull/138489
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https://github.com/tblah approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/138816
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optimisan wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138829?utm_source=stack-comment-downstack-mergeability-warning
@@ -3235,6 +3263,36 @@ void VPWidenPointerInductionRecipe::print(raw_ostream
&O, const Twine &Indent,
}
#endif
+void VPAliasLaneMaskRecipe::execute(VPTransformState &State) {
+ IRBuilderBase Builder = State.Builder;
+ Value *SinkValue = State.get(getSinkValue(), true);
+ V
@@ -195,6 +195,13 @@ enum class TailFoldingStyle {
DataWithEVL,
};
+enum class RTCheckStyle {
+ /// Branch to scalar loop if checks fails at runtime.
+ ScalarFallback,
+ /// Form a mask based on elements which won't be a WAR or RAW hazard
SamTebbs33 wrote
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