[llvm-branch-commits] [llvm] [AMDGPU] Remove the pass `AMDGPUPromoteKernelArguments` (PR #137655)

2025-04-30 Thread Shilei Tian via llvm-branch-commits
https://github.com/shiltian closed https://github.com/llvm/llvm-project/pull/137655 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Remove the pass `AMDGPUPromoteKernelArguments` (PR #137655)

2025-04-30 Thread Shilei Tian via llvm-branch-commits
shiltian wrote: Will close this for now. I'll revisit this if we can handle the case under discussion properly. https://github.com/llvm/llvm-project/pull/137655 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm

[llvm-branch-commits] [clang] [llvm] [AMDGPU][Attributor] Rework update of `AAAMDWavesPerEU` (PR #123995)

2025-04-30 Thread Shilei Tian via llvm-branch-commits
@@ -1425,8 +1453,14 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM, } } - ChangeStatus Change = A.run(); - return Change == ChangeStatus::CHANGED; + bool Changed = A.run() == ChangeStatus::CHANGED; + + if (Changed && (LTOPhase == ThinOrFullL

[llvm-branch-commits] [llvm] [GOFF] Add writing of text records (PR #137235)

2025-04-30 Thread Kai Nacke via llvm-branch-commits
redstar wrote: I had to force-push to get the fixed test cases. https://github.com/llvm/llvm-project/pull/137235 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: refactor issue reporting (PR #135662)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/135662 >From 0d477fa179d365147d2cd809724b07f050603ff6 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Mon, 14 Apr 2025 15:08:54 +0300 Subject: [PATCH 1/5] [BOLT] Gadget scanner: refactor issue reporting Re

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: refactor issue reporting (PR #135662)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/135662 >From 0d477fa179d365147d2cd809724b07f050603ff6 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Mon, 14 Apr 2025 15:08:54 +0300 Subject: [PATCH 1/5] [BOLT] Gadget scanner: refactor issue reporting Re

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: detect untrusted LR before tail call (PR #137224)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/137224 >From 33158bcada96af1d201a5cb5342f0256f30894cd Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Tue, 22 Apr 2025 21:43:14 +0300 Subject: [PATCH] [BOLT] Gadget scanner: detect untrusted LR before tail

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: clarify MCPlusBuilder callbacks interface (PR #136147)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/136147 >From 59afabd2a0b89f6e529f58cd17ac56673e2c0599 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Thu, 17 Apr 2025 15:40:05 +0300 Subject: [PATCH] [BOLT] Gadget scanner: clarify MCPlusBuilder callbacks

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: use more appropriate types (NFC) (PR #135661)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/135661 >From b942d6e9dc8858653e4669d6a1b8e50f0dc19061 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Mon, 14 Apr 2025 14:35:56 +0300 Subject: [PATCH 1/2] [BOLT] Gadget scanner: use more appropriate types (

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: improve handling of unreachable basic blocks (PR #136183)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/136183 >From 352364dfc00d23111fc44bc807d3484bc67aff00 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Thu, 17 Apr 2025 20:51:16 +0300 Subject: [PATCH 1/2] [BOLT] Gadget scanner: improve handling of unreacha

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: do not crash on debug-printing CFI instructions (PR #136151)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/136151 >From a0a9cdfe1b7dacc9193317ef2ef8e340076067e7 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Tue, 15 Apr 2025 21:47:18 +0300 Subject: [PATCH] [BOLT] Gadget scanner: do not crash on debug-printing C

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: improve handling of unreachable basic blocks (PR #136183)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/136183 >From 352364dfc00d23111fc44bc807d3484bc67aff00 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Thu, 17 Apr 2025 20:51:16 +0300 Subject: [PATCH 1/2] [BOLT] Gadget scanner: improve handling of unreacha

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: use more appropriate types (NFC) (PR #135661)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/135661 >From b942d6e9dc8858653e4669d6a1b8e50f0dc19061 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Mon, 14 Apr 2025 14:35:56 +0300 Subject: [PATCH 1/2] [BOLT] Gadget scanner: use more appropriate types (

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: clarify MCPlusBuilder callbacks interface (PR #136147)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/136147 >From 59afabd2a0b89f6e529f58cd17ac56673e2c0599 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Thu, 17 Apr 2025 15:40:05 +0300 Subject: [PATCH] [BOLT] Gadget scanner: clarify MCPlusBuilder callbacks

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: detect untrusted LR before tail call (PR #137224)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/137224 >From 33158bcada96af1d201a5cb5342f0256f30894cd Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Tue, 22 Apr 2025 21:43:14 +0300 Subject: [PATCH] [BOLT] Gadget scanner: detect untrusted LR before tail

[llvm-branch-commits] [llvm] [AArch64][llvm] Codegen for 16/32/64-bit floating-point atomicrmw fminimum/faximum (PR #137703)

2025-04-30 Thread via llvm-branch-commits
https://github.com/CarolineConcatto approved this pull request. Thank you Jonathan, LGTM! https://github.com/llvm/llvm-project/pull/137703 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/li

[llvm-branch-commits] [llvm] [LoopVectorizer] Bundle partial reductions inside VPMulAccumulateReductionRecipe (PR #136173)

2025-04-30 Thread Sam Tebbs via llvm-branch-commits
@@ -986,11 +986,23 @@ InstructionCost TargetTransformInfo::getShuffleCost( TargetTransformInfo::PartialReductionExtendKind TargetTransformInfo::getPartialReductionExtendKind(Instruction *I) { - if (isa(I)) -return PR_SignExtend; - if (isa(I)) + auto *Cast = dyn_cast(I);

[llvm-branch-commits] [llvm] [LoopVectorizer] Bundle partial reductions inside VPMulAccumulateReductionRecipe (PR #136173)

2025-04-30 Thread Sam Tebbs via llvm-branch-commits
@@ -986,11 +986,23 @@ InstructionCost TargetTransformInfo::getShuffleCost( TargetTransformInfo::PartialReductionExtendKind TargetTransformInfo::getPartialReductionExtendKind(Instruction *I) { - if (isa(I)) -return PR_SignExtend; - if (isa(I)) + auto *Cast = dyn_cast(I);

[llvm-branch-commits] [llvm] [LoopVectorizer] Bundle partial reductions inside VPMulAccumulateReductionRecipe (PR #136173)

2025-04-30 Thread Sam Tebbs via llvm-branch-commits
@@ -2432,12 +2437,40 @@ static void tryToCreateAbstractReductionRecipe(VPReductionRecipe *Red, Red->replaceAllUsesWith(AbstractR); } +/// This function tries to create an abstract recipe from a partial reduction to +/// hide its mul and extends from cost estimation. +stati

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: account for BRK when searching for auth oracles (PR #137975)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko ready_for_review https://github.com/llvm/llvm-project/pull/137975 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: detect authentication oracles (PR #135663)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/135663 >From 46e3e96a9c0ffab84ee7003621041b7bf76f3d78 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Sat, 5 Apr 2025 14:54:01 +0300 Subject: [PATCH 1/4] [BOLT] Gadget scanner: detect authentication oracles

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: account for BRK when searching for auth oracles (PR #137975)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko created https://github.com/llvm/llvm-project/pull/137975 An authenticated pointer can be explicitly checked by the compiler via a sequence of instructions that executes BRK on failure. It is important to recognize such BRK instruction as checking every register (as

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: account for BRK when searching for auth oracles (PR #137975)

2025-04-30 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-bolt Author: Anatoly Trosinenko (atrosinenko) Changes An authenticated pointer can be explicitly checked by the compiler via a sequence of instructions that executes BRK on failure. It is important to recognize such BRK instruction as checking every regi

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: account for BRK when searching for auth oracles (PR #137975)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
atrosinenko wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/137975?utm_source=stack-comment-downstack-mergeability-warni

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: account for BRK when searching for auth oracles (PR #137975)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko edited https://github.com/llvm/llvm-project/pull/137975 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] Recommit "[ConstraintElim] Simplify cmp after uadd.sat/usub.sat (#135603)" (PR #136467)

2025-04-30 Thread Iris Shi via llvm-branch-commits
el-ev wrote: ### Merge activity * **Apr 30, 9:40 AM EDT**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/136467). https://github.com/llvm/llvm-project/pull/136467 __

[llvm-branch-commits] [llvm] [LoopVectorizer] Bundle partial reductions inside VPMulAccumulateReductionRecipe (PR #136173)

2025-04-30 Thread Sander de Smalen via llvm-branch-commits
@@ -4923,9 +4923,7 @@ InstructionCost AArch64TTIImpl::getPartialReductionCost( return Invalid; break; case 16: - if (AccumEVT == MVT::i64) -Cost *= 2; - else if (AccumEVT != MVT::i32) + if (AccumEVT != MVT::i32) sdesmale

[llvm-branch-commits] [llvm] [LoopVectorizer] Bundle partial reductions inside VPMulAccumulateReductionRecipe (PR #136173)

2025-04-30 Thread Sander de Smalen via llvm-branch-commits
@@ -2056,55 +2056,6 @@ class VPReductionPHIRecipe : public VPHeaderPHIRecipe, } }; -/// A recipe for forming partial reductions. In the loop, an accumulator and sdesmalen-arm wrote: (We discussed this offline) swapping the operands in the debug-print functi

[llvm-branch-commits] [llvm] [LoopVectorizer] Bundle partial reductions inside VPMulAccumulateReductionRecipe (PR #136173)

2025-04-30 Thread Sander de Smalen via llvm-branch-commits
@@ -986,11 +986,23 @@ InstructionCost TargetTransformInfo::getShuffleCost( TargetTransformInfo::PartialReductionExtendKind TargetTransformInfo::getPartialReductionExtendKind(Instruction *I) { - if (isa(I)) -return PR_SignExtend; - if (isa(I)) + auto *Cast = dyn_cast(I);

[llvm-branch-commits] [llvm] [LoopVectorizer] Bundle partial reductions inside VPMulAccumulateReductionRecipe (PR #136173)

2025-04-30 Thread Sander de Smalen via llvm-branch-commits
@@ -986,11 +986,23 @@ InstructionCost TargetTransformInfo::getShuffleCost( TargetTransformInfo::PartialReductionExtendKind TargetTransformInfo::getPartialReductionExtendKind(Instruction *I) { - if (isa(I)) -return PR_SignExtend; - if (isa(I)) + auto *Cast = dyn_cast(I);

[llvm-branch-commits] [llvm] [LoopVectorizer] Bundle partial reductions inside VPMulAccumulateReductionRecipe (PR #136173)

2025-04-30 Thread Sander de Smalen via llvm-branch-commits
@@ -2432,12 +2437,40 @@ static void tryToCreateAbstractReductionRecipe(VPReductionRecipe *Red, Red->replaceAllUsesWith(AbstractR); } +/// This function tries to create an abstract recipe from a partial reduction to +/// hide its mul and extends from cost estimation. +stati

[llvm-branch-commits] [flang] release/20.x: [flang] Exempt construct entities from SAVE check for PURE (#131383) (PR #137752)

2025-04-30 Thread Eugene Epshteyn via llvm-branch-commits
https://github.com/eugeneepshteyn approved this pull request. https://github.com/llvm/llvm-project/pull/137752 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [LoopVectorizer] Bundle partial reductions inside VPMulAccumulateReductionRecipe (PR #136173)

2025-04-30 Thread Sam Tebbs via llvm-branch-commits
@@ -2432,12 +2437,40 @@ static void tryToCreateAbstractReductionRecipe(VPReductionRecipe *Red, Red->replaceAllUsesWith(AbstractR); } +/// This function tries to create an abstract recipe from a partial reduction to +/// hide its mul and extends from cost estimation. +stati

[llvm-branch-commits] [AutoUpgrade][AMDGPU] Adjust AS7 address width to 48 bits (PR #137418)

2025-04-30 Thread Krzysztof Drewniak via llvm-branch-commits
krzysz00 wrote: So p9 is quite weird. It's used, IIRC, by, https://github.com/GPUOpen-Drivers/llpc internally to represent "structured" pointers, and so its interpretation is `{p8 rsrc, i32 index, i32 offset}` . This does still have a 48-bit effective address by way of a thoroughly weird ptrt

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: detect authentication oracles (PR #135663)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/135663 >From 46e3e96a9c0ffab84ee7003621041b7bf76f3d78 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Sat, 5 Apr 2025 14:54:01 +0300 Subject: [PATCH 1/4] [BOLT] Gadget scanner: detect authentication oracles

[llvm-branch-commits] [llvm] [AArch64][llvm] Pre-commit tests for #137703 (NFC) (PR #137702)

2025-04-30 Thread via llvm-branch-commits
https://github.com/CarolineConcatto approved this pull request. I could not spot any significant difference between fmin and fminimum. So I believe this is fine. Thank you for the work Jonathan https://github.com/llvm/llvm-project/pull/137702 ___ llv

[llvm-branch-commits] [llvm] release/20.x: [AArch64][SME] Prevent spills of ZT0 when ZA is not enabled (PR #137683)

2025-04-30 Thread Benjamin Maxwell via llvm-branch-commits
MacDue wrote: @sdesmalen-arm What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/137683 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/

[llvm-branch-commits] [llvm] [GOFF] Add writing of text records (PR #137235)

2025-04-30 Thread Kai Nacke via llvm-branch-commits
https://github.com/redstar updated https://github.com/llvm/llvm-project/pull/137235 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-s

[llvm-branch-commits] [llvm] [BOLT][test] Fix callcont-fallthru.s after #129481 (PR #135867)

2025-04-30 Thread Vladislav Khmelevsky via llvm-branch-commits
yota9 wrote: @paschalis-mpeis Could you please check if the binaries are identical and it is indeed nm problem? E.g. with objdump, is plt entry is there? Maybe there is problem related to the plt section type, e.g. one of the binaries has .plt.sec or .plt.got section and there is some kind of

[llvm-branch-commits] [AutoUpgrade][AMDGPU] Adjust AS7 address width to 48 bits (PR #137418)

2025-04-30 Thread Alexander Richardson via llvm-branch-commits
arichardson wrote: @krzysz00 I tried setting the p8 index size to 0 and this almost works but there are a handful of tests that fail. The first one is: ``` define ptr addrspace(8) @v_ptrmask_buffer_resource_variable_i128_neg8(ptr addrspace(8) %ptr) { ; GCN-LABEL: v_ptrmask_buffer_resource_vari

[llvm-branch-commits] [clang] release/20.x: [Clang][MicrosoftMangle] Implement mangling for ConstantMatrixType (#134930) (PR #138017)

2025-04-30 Thread via llvm-branch-commits
github-actions[bot] wrote: ⚠️ We detected that you are using a GitHub private e-mail address to contribute to the repo. Please turn off [Keep my email addresses private](https://github.com/settings/emails) setting in your account. See [LLVM Discourse](https://discourse.llvm.org/t/hidden-email

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add mandatory parameters for RootConstants (PR #138002)

2025-04-30 Thread Finn Plummer via llvm-branch-commits
https://github.com/inbelic created https://github.com/llvm/llvm-project/pull/138002 - defines the `parseRootConstantParams` function and adds handling for the mandatory arguments of `num32BitConstants` and `bReg` - adds corresponding unit tests Part two of implementing #126576 >From 15857bf

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add mandatory parameters for RootConstants (PR #138002)

2025-04-30 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-hlsl Author: Finn Plummer (inbelic) Changes - defines the `parseRootConstantParams` function and adds handling for the mandatory arguments of `num32BitConstants` and `bReg` - adds corresponding unit tests Part two of implementing #126576 --- Full di

[llvm-branch-commits] [clang] release/20.x: [Clang][MicrosoftMangle] Implement mangling for ConstantMatrixType (#134930) (PR #138017)

2025-04-30 Thread via llvm-branch-commits
https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/138017 Backport f5a30f111dc4ad6422863722eb708059a68a9d5c Requested by: @tstellar >From bc9b07f09ab1c728e4dcce614eb4ccfa2e5e52c7 Mon Sep 17 00:00:00 2001 From: Losy001 <64610343+losy...@users.noreply.github.com> Date:

[llvm-branch-commits] [clang] release/20.x: [Clang][MicrosoftMangle] Implement mangling for ConstantMatrixType (#134930) (PR #138017)

2025-04-30 Thread via llvm-branch-commits
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/138017 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] release/20.x: [Clang][MicrosoftMangle] Implement mangling for ConstantMatrixType (#134930) (PR #138017)

2025-04-30 Thread via llvm-branch-commits
llvmbot wrote: @rnk What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/138017 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/

[llvm-branch-commits] [llvm] [GOFF] Add writing of text records (PR #137235)

2025-04-30 Thread Ulrich Weigand via llvm-branch-commits
@@ -688,28 +689,32 @@ MCSectionGOFF *MCContext::getGOFFSection(SectionKind Kind, StringRef Name, return Iter->second; StringRef CachedName = StringRef(Iter->first.c_str(), Name.size()); - MCSectionGOFF *GOFFSection = new (GOFFAllocator.Allocate()) MCSectionGOFF( -

[llvm-branch-commits] [llvm] [AArch64][llvm] Codegen for 16/32/64-bit floating-point atomicrmw fminimum/faximum (PR #137703)

2025-04-30 Thread Jonathan Thackray via llvm-branch-commits
https://github.com/jthackray updated https://github.com/llvm/llvm-project/pull/137703 >From c47eaad006a6310f667ac5e12589935b5e62a322 Mon Sep 17 00:00:00 2001 From: Jonathan Thackray Date: Wed, 23 Apr 2025 21:10:31 + Subject: [PATCH] [AArch64][llvm] Codegen for 16/32/64-bit floating-point a

[llvm-branch-commits] [llvm] [AArch64][llvm] Pre-commit tests for #137703 (NFC) (PR #137702)

2025-04-30 Thread Jonathan Thackray via llvm-branch-commits
https://github.com/jthackray updated https://github.com/llvm/llvm-project/pull/137702 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans

[llvm-branch-commits] [lld] release/20.x: [wasm-ld] Refactor WasmSym from static globals to per-link context (#134970) (PR #137620)

2025-04-30 Thread Sam Clegg via llvm-branch-commits
sbc100 wrote: > cc @tstellar > > Not sure you saw my tag above but as I mentioned here [#137620 > (comment)](https://github.com/llvm/llvm-project/pull/137620#issuecomment-2834979164) > I had to manually backport this due to some merge conflicts. This was > critical for downstream projects and

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add mandatory parameters for RootConstants (PR #138002)

2025-04-30 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang Author: Finn Plummer (inbelic) Changes - defines the `parseRootConstantParams` function and adds handling for the mandatory arguments of `num32BitConstants` and `bReg` - adds corresponding unit tests Part two of implementing #126576 --- Full d

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add mandatory parameters for RootConstants (PR #138002)

2025-04-30 Thread Finn Plummer via llvm-branch-commits
https://github.com/inbelic updated https://github.com/llvm/llvm-project/pull/138002 >From 15857bf8e1303e2325b48e417e7abd26aa77910e Mon Sep 17 00:00:00 2001 From: Finn Plummer Date: Wed, 30 Apr 2025 17:53:11 + Subject: [PATCH] [HLSL][RootSignature] Add mandatory parameters for RootConstants

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add optional parameter for RootConstants (PR #138007)

2025-04-30 Thread Finn Plummer via llvm-branch-commits
https://github.com/inbelic created https://github.com/llvm/llvm-project/pull/138007 - extends `parseRootConstantParams` and the struct to include the optional parameters of a RootConstant - adds corresponding unit tests Part three of and resolves https://github.com/llvm/llvm-project/issues/12

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add optional parameter for RootConstants (PR #138007)

2025-04-30 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-hlsl @llvm/pr-subscribers-clang Author: Finn Plummer (inbelic) Changes - extends `parseRootConstantParams` and the struct to include the optional parameters of a RootConstant - adds corresponding unit tests Part three of and resolves https://github.co

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add optional parameters for RootConstants (PR #138007)

2025-04-30 Thread Finn Plummer via llvm-branch-commits
https://github.com/inbelic edited https://github.com/llvm/llvm-project/pull/138007 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [AutoUpgrade][AMDGPU] Adjust AS7 address width to 48 bits (PR #137418)

2025-04-30 Thread Alexander Richardson via llvm-branch-commits
arichardson wrote: > So p9 is quite weird. It's used, IIRC, by, > https://github.com/GPUOpen-Drivers/llpc internally to represent "structured" > pointers, and so its interpretation is `{p8 rsrc, i32 index, i32 offset}` . > This does still have a 48-bit effective address by way of a thoroughly

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add mandatory parameters for RootConstants (PR #138002)

2025-04-30 Thread Finn Plummer via llvm-branch-commits
https://github.com/inbelic updated https://github.com/llvm/llvm-project/pull/138002 >From 15857bf8e1303e2325b48e417e7abd26aa77910e Mon Sep 17 00:00:00 2001 From: Finn Plummer Date: Wed, 30 Apr 2025 17:53:11 + Subject: [PATCH 1/2] [HLSL][RootSignature] Add mandatory parameters for RootConst

[llvm-branch-commits] [llvm] [BOLT][test] Fix callcont-fallthru.s after #129481 (PR #135867)

2025-04-30 Thread Amir Ayupov via llvm-branch-commits
aaupov wrote: Thanks for tracking it down, looks like it's an issue with GNU nm. However llvm-nm has no functionality equivalent to `nm --synthetic` which prints the address of the PLT entry, and the test relies on that. Let me try to decouple this test from GNU nm. https://github.com/llvm/ll

[llvm-branch-commits] [llvm] release/20.x: [AArch64][SME] Prevent spills of ZT0 when ZA is not enabled (PR #137683)

2025-04-30 Thread Sander de Smalen via llvm-branch-commits
https://github.com/sdesmalen-arm approved this pull request. https://github.com/llvm/llvm-project/pull/137683 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [MLIR][OpenMP] Assert on map translation functions, NFC (PR #137199)

2025-04-30 Thread Sergio Afonso via llvm-branch-commits
@@ -3623,6 +3623,9 @@ static llvm::omp::OpenMPOffloadMappingFlags mapParentWithMembers( LLVM::ModuleTranslation &moduleTranslation, llvm::IRBuilderBase &builder, llvm::OpenMPIRBuilder &ompBuilder, DataLayout &dl, MapInfosTy &combinedInfo, MapInfoData &mapData, uin

[llvm-branch-commits] [clang-tools-extra] release/20.x: [clang-tidy] Do not pass any file when listing checks in run_clang_ti… (#137286) (PR #137775)

2025-04-30 Thread Carlos Galvez via llvm-branch-commits
https://github.com/carlosgalvezp updated https://github.com/llvm/llvm-project/pull/137775 >From 387c2886b68b1eaf68916e4b08e8d92966a1 Mon Sep 17 00:00:00 2001 From: Carlos Galvez Date: Tue, 29 Apr 2025 11:13:30 +0200 Subject: [PATCH] =?UTF-8?q?[clang-tidy]=20Do=20not=20pass=20any=20file=20w?

[llvm-branch-commits] [llvm] [BOLT][test] Fix callcont-fallthru.s after #129481 (PR #135867)

2025-04-30 Thread Paschalis Mpeis via llvm-branch-commits
paschalis-mpeis wrote: Hey @yota9, thanks for the suggestions! Indeed, the PLT entries exist in both binaries. For example running: ``` build/bin/llvm-objdump -d -j .plt build/tools/bolt/test/X86/Output/callcont-fallthru.s.tmp ``` shows: ``` build/tools/bolt/test/X86/Output/callcont-fallth

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: detect untrusted LR before tail call (PR #137224)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/137224 >From 7d1cbb97817e615a5fa8841d72a18643b5722114 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Tue, 22 Apr 2025 21:43:14 +0300 Subject: [PATCH] [BOLT] Gadget scanner: detect untrusted LR before tail

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: detect untrusted LR before tail call (PR #137224)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/137224 >From 7d1cbb97817e615a5fa8841d72a18643b5722114 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Tue, 22 Apr 2025 21:43:14 +0300 Subject: [PATCH] [BOLT] Gadget scanner: detect untrusted LR before tail

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: improve handling of unreachable basic blocks (PR #136183)

2025-04-30 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/136183 >From 96e1b04ab61480c080350d9fc2c658cb0364f4da Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Thu, 17 Apr 2025 20:51:16 +0300 Subject: [PATCH 1/2] [BOLT] Gadget scanner: improve handling of unreacha

[llvm-branch-commits] [llvm] [ConstraintElim] Simplify `usub_with_overflow` when A uge B (PR #135785)

2025-04-30 Thread Iris Shi via llvm-branch-commits
https://github.com/el-ev updated https://github.com/llvm/llvm-project/pull/135785 >From c5328e2075b5f98311eb9c9657da79d800cf28f4 Mon Sep 17 00:00:00 2001 From: Iris Shi <0...@owo.li> Date: Tue, 15 Apr 2025 20:20:45 +0800 Subject: [PATCH 1/2] [ConstraintElim] Simplify `usub_with_overflow` when A

[llvm-branch-commits] [llvm] [BOLT][test] Fix callcont-fallthru.s after #129481 (PR #135867)

2025-04-30 Thread Paschalis Mpeis via llvm-branch-commits
paschalis-mpeis wrote: Great. A quick way to use an llvm tool could be: ```bash llvm-objdump -d -j .plt %t | grep @plt ``` This produces output similar to what `nm --synthetic` produces (when it works): ```bash 1430 : ``` You'll need ofc to tweak `link_fdata` to properly parse symb

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/125432 >From d382b955279cf3699599f1885e4c47af5f5bda2e Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 31 Jan 2025 13:12:56 -0500 Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic vector. After spl

[llvm-branch-commits] [llvm] [X86] Manage atomic load of fp -> int promotion in DAG (PR #120386)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120386 >From cb2e5bc0ea3c3d0ccc3f684ef9bced8b30c7e74e Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:38:23 -0500 Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG When lowering atom

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From be154f89c03bf89ee99d213ca954c77c44fc4e9c Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load (PR #120598)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 867af9f33e61399964c51dd0c40dfcf37ec0a1e0 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load Vector ty

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load (PR #120598)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 867af9f33e61399964c51dd0c40dfcf37ec0a1e0 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load Vector ty

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Split via Concat vector types for atomic load (PR #120640)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120640 >From 79fce921b0cb321760da43ede34e58d4e0880d33 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 16:25:55 -0500 Subject: [PATCH] [SelectionDAG][X86] Split via Concat vector types for atomic load Vecto

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From be154f89c03bf89ee99d213ca954c77c44fc4e9c Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [X86] Add atomic vector tests for unaligned >1 sizes. (PR #120387)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120387 >From a60144bede07d2ca53f5f3a48009b10d10f8c082 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:40:32 -0500 Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes. Unaligned atomic ve

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load (PR #120598)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 867af9f33e61399964c51dd0c40dfcf37ec0a1e0 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load Vector ty

[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120385 >From 7f2115c386e164541ba579eefd87bdfbb45c2890 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:37:17 -0500 Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load `load atomic

[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120385 >From 7f2115c386e164541ba579eefd87bdfbb45c2890 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:37:17 -0500 Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load `load atomic

[llvm-branch-commits] [mlir] [MLIR][OpenMP] Assert on map translation functions, NFC (PR #137199)

2025-04-30 Thread Pranav Bhandarkar via llvm-branch-commits
@@ -3623,6 +3623,9 @@ static llvm::omp::OpenMPOffloadMappingFlags mapParentWithMembers( LLVM::ModuleTranslation &moduleTranslation, llvm::IRBuilderBase &builder, llvm::OpenMPIRBuilder &ompBuilder, DataLayout &dl, MapInfosTy &combinedInfo, MapInfoData &mapData, uin

[llvm-branch-commits] [llvm] [DirectX] Implementation of DXILResourceImplicitBinding pass (PR #138043)

2025-04-30 Thread Helena Kotas via llvm-branch-commits
https://github.com/hekota edited https://github.com/llvm/llvm-project/pull/138043 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DirectX] Implement DXILResourceImplicitBinding pass (PR #138043)

2025-04-30 Thread Helena Kotas via llvm-branch-commits
https://github.com/hekota edited https://github.com/llvm/llvm-project/pull/138043 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DirectX] Implement DXILResourceImplicitBinding pass (PR #138043)

2025-04-30 Thread Helena Kotas via llvm-branch-commits
https://github.com/hekota updated https://github.com/llvm/llvm-project/pull/138043 >From f58e2d5c079f31d7a4d99d481a569ad4c754c4e7 Mon Sep 17 00:00:00 2001 From: Helena Kotas Date: Wed, 30 Apr 2025 15:08:04 -0700 Subject: [PATCH 1/2] [HLSL] Implementation of DXILResourceImplicitBinding pass Thi

[llvm-branch-commits] [llvm] [X86] Add atomic vector tests for unaligned >1 sizes. (PR #120387)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120387 >From 6d045290b83d4abb2765e6d323d7a441aab6445c Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:40:32 -0500 Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes. Unaligned atomic ve

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/125432 >From abb646bbd716e2b12e10961c80c28dcfde8d66f5 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 31 Jan 2025 13:12:56 -0500 Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic vector. After spl

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From 855430ef05b0a8cfe6696ec62f827cab6d663655 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load (PR #120598)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 5bc5d3291ad26fa3af646e45bd5d491d03588d98 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load Vector ty

[llvm-branch-commits] [llvm] [X86] Manage atomic load of fp -> int promotion in DAG (PR #120386)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120386 >From 0824a27d19d3a26eaf9d1ce0b04cf09dbf3cab4b Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:38:23 -0500 Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG When lowering atom

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From 855430ef05b0a8cfe6696ec62f827cab6d663655 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load (PR #120598)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 5bc5d3291ad26fa3af646e45bd5d491d03588d98 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load Vector ty

[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120385 >From 4a47d3fd2f29c66c2230f40d7cca8fdbd1238abd Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:37:17 -0500 Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load `load atomic

[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120385 >From 4a47d3fd2f29c66c2230f40d7cca8fdbd1238abd Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:37:17 -0500 Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load `load atomic

[llvm-branch-commits] [llvm] [X86] Manage atomic load of fp -> int promotion in DAG (PR #120386)

2025-04-30 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120386 >From 0824a27d19d3a26eaf9d1ce0b04cf09dbf3cab4b Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:38:23 -0500 Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG When lowering atom

[llvm-branch-commits] [AutoUpgrade][AMDGPU] Adjust AS7 address width to 48 bits (PR #137418)

2025-04-30 Thread Krzysztof Drewniak via llvm-branch-commits
krzysz00 wrote: > I think we just have to pretend that virtual addresses or segment-relative > addresses are the only thing that matters. This is why I've been advocating for the index-based definition of ptrtoaddr. So there's no need to do this 48-bit thing on the assumption that the base of

[llvm-branch-commits] [llvm] [HLSL] Implementation of DXILResourceImplicitBinding pass (PR #138043)

2025-04-30 Thread Helena Kotas via llvm-branch-commits
https://github.com/hekota created https://github.com/llvm/llvm-project/pull/138043 The `DXILResourceImplicitBinding` pass uses the results of `DXILResourceBindingAnalysis` to assigns register slots to resources that do not have explicit binding. It replaces all `llvm.dx.resource.handlefromimp

[llvm-branch-commits] [llvm] [HLSL] Implementation of DXILResourceImplicitBinding pass (PR #138043)

2025-04-30 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-directx Author: Helena Kotas (hekota) Changes The `DXILResourceImplicitBinding` pass uses the results of `DXILResourceBindingAnalysis` to assigns register slots to resources that do not have explicit binding. It replaces all `llvm.dx.resource.

[llvm-branch-commits] [llvm] [HLSL] Implementation of DXILResourceImplicitBinding pass (PR #138043)

2025-04-30 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-analysis Author: Helena Kotas (hekota) Changes The `DXILResourceImplicitBinding` pass uses the results of `DXILResourceBindingAnalysis` to assigns register slots to resources that do not have explicit binding. It replaces all `llvm.dx.resource.ha

[llvm-branch-commits] [llvm] [HLSL] Implementation of DXILResourceImplicitBinding pass (PR #138043)

2025-04-30 Thread Helena Kotas via llvm-branch-commits
@@ -0,0 +1,44 @@ +; RUN: opt -S -dxil-resource-implicit-binding %s | FileCheck %s hekota wrote: I just realized this test is not complete... working on a fix. https://github.com/llvm/llvm-project/pull/138043 ___ llvm-b

[llvm-branch-commits] [clang-tools-extra] [clang-doc] Add Mustache template assets (PR #138059)

2025-04-30 Thread Paul Kirth via llvm-branch-commits
ilovepi wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138059?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] [llvm][IR] Treat memcmp and bcmp as libcalls (PR #135706)

2025-04-30 Thread Paul Kirth via llvm-branch-commits
ilovepi wrote: @efriedma-quic We've been discussing the topic of LTOing libc quite a bit internally, and are currently sketching out how this could work. Unsurprisingly, there's quite a lot to think about in both the compiler and linker, and how the two combine in our different versions of LTO

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add parsing for RootFlags (PR #138055)

2025-04-30 Thread Finn Plummer via llvm-branch-commits
https://github.com/inbelic created https://github.com/llvm/llvm-project/pull/138055 - defines the `RootFlags` in-memory enum - defines `parseRootFlags` to parse the various flag enums into a single `uint32_t` - adds corresponding unit tests - improves the diagnostic message for when we provide

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