arichardson wrote:
@krzysz00 I tried setting the p8 index size to 0 and this almost works but
there are a handful of tests that fail.
The first one is:
```
define ptr addrspace(8) @v_ptrmask_buffer_resource_variable_i128_neg8(ptr
addrspace(8) %ptr) {
; GCN-LABEL: v_ptrmask_buffer_resource_variable_i128_neg8:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_and_b32_e32 v0, -8, v0
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GFX10PLUS-LABEL: v_ptrmask_buffer_resource_variable_i128_neg8:
; GFX10PLUS: ; %bb.0:
; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10PLUS-NEXT: v_and_b32_e32 v0, -8, v0
; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]
%masked = call ptr addrspace(8) @llvm.ptrmask.p8.i128(ptr addrspace(8) %ptr,
i128 -8)
ret ptr addrspace(8) %masked
}
```
This fails with `llvm.ptrmask intrinsic second argument bitwidth must match
pointer index type size of first argument`
How would you expect ptrmask to work here? I would imagine it should use the
address width and not the index width since you have valid codegen for p8. I
don't know enough about amdgpu assembly so I can't tell what is actually being
done here.
Another test that fails is
llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-ptr-add.ll which now crashes
with an assertion failure inside `StraightLineStrengthReduce` instead of
failing with `unable to legalize instruction`. I imagine we could easily avoid
the assertion here and handle that with a sensible error message in the IR
verifier.
llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-load.ll also asserts but should
be easy to handle.
https://github.com/llvm/llvm-project/pull/137418
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