[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_ashr_pk_i8/u8_i32 instructions for gfx950 (PR #117596)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117596 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 of gfx950. (PR #117593)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117593 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add minimum3/maximum3 pkf16 for gfx950 encodings (PR #117601)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/117601 None >From d6a1de80431f1b8db2da27d5fa66f9d3233962cd Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 22 May 2024 19:45:57 +0200 Subject: [PATCH] AMDGPU: Add minimum3/maximum3 pkf16 for gfx950 encodings

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950 (PR #117598)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/117598 The encoding of v_dot2c_f32_bf16 opcode is same as v_mac_f32 in gfx90a, both from gfx9 series. This required a new decoderNameSpace GFX950_DOT. Co-authored-by: Sirish Pande >From 59111c23aa1305a324a8dcb66757a07

[llvm-branch-commits] [llvm] AMDGPU: Add encodings for minimum3/maximum3 f32 for gfx950 (PR #117600)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/117600 None >From f1278e9505bb92cbe1d108a8e745352e23dba3ef Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 22 May 2024 19:36:47 +0200 Subject: [PATCH] AMDGPU: Add encodings for minimum3/maximum3 f32 for gfx950

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support buffer_atomic_pk_add_bf16 for gfx950 (PR #117599)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/117599 Co-authored-by: Sirish Pande >From 57bc1f5cc6065a051a651067ec435a061472 Mon Sep 17 00:00:00 2001 From: Sirish Pande Date: Thu, 16 May 2024 16:21:42 -0500 Subject: [PATCH] AMDGPU: Support buffer_atomic_pk_ad

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2_f32_bf16 instruction for gfx950 (PR #117597)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff 75056a46ee4d7eb6543c2ce99a157a1627a54158 f221f63e40154aaf7f97acc3e48a8b7ba5659f8d --e

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_f32_[fp|bf]6 of gfx950 (PR #117590)

llvmbot wrote: @llvm/pr-subscribers-mc Author: Matt Arsenault (arsenm) Changes Co-authored-by: Pravin Jagtap --- Full diff: https://github.com/llvm/llvm-project/pull/117590.diff 10 Files Affected: - (modified) llvm/lib/Target/AMDGPU/AMDGPU.td (+13-2) - (modifie

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950 (PR #117598)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff f221f63e40154aaf7f97acc3e48a8b7ba5659f8d 59111c23aa1305a324a8dcb66757a07f8e9ef88c --e

[llvm-branch-commits] [llvm] AMDGPU: Add minimum3/maximum3 pkf16 for gfx950 encodings (PR #117601)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117601 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 of gfx950. (PR #117591)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Pravin Jagtap --- Full diff: https://github.com/llvm/llvm-project/pull/117591.diff 5 Files Affected: - (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.td (+1

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_pk32_{bf|f}6_{bf|fp}16 for gfx950 (PR #117592)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117592 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950 (PR #117598)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes The encoding of v_dot2c_f32_bf16 opcode is same as v_mac_f32 in gfx90a, both from gfx9 series. This required a new decoderNameSpace GFX950_DOT. Co-authored-by: Sirish Pande -

[llvm-branch-commits] [llvm] AMDGPU: Add encodings for minimum3/maximum3 f32 for gfx950 (PR #117600)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/117600.diff 5 Files Affected: - (modified) llvm/lib/Target/AMDGPU/AMDGPU.td (+3-1) - (modified) llvm/lib/Target/AMDGPU/VOP3Instructions.

[llvm-branch-commits] [llvm] AMDGPU: Add minimum3/maximum3 pkf16 for gfx950 encodings (PR #117601)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff f1278e9505bb92cbe1d108a8e745352e23dba3ef d6a1de80431f1b8db2da27d5fa66f9d3233962cd --e

[llvm-branch-commits] [llvm] AMDGPU: Add minimum3/maximum3 pkf16 for gfx950 encodings (PR #117601)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/117601.diff 6 Files Affected: - (modified) llvm/lib/Target/AMDGPU/AMDGPU.td (+12-1) - (modified) llvm/lib/Target/AMDGPU/GCNSubtarget.h (

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_f32_[fp|bf]8 of gfx950. (PR #117383)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117383 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{fp8|bf8}_f32 of gfx950. (PR #117382)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117382 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_f32_[fp|bf]8 of gfx950. (PR #117383)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117383 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{fp|bf}8_{f|bf}16 of gfx950. (PR #117384)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117384 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_f32_[fp|bf]8 of gfx950. (PR #117383)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117383 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{f|bf}16_fp4 of gfx950. (PR #117418)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117418 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scale_fp4<->f32 of gfx950. (PR #117417)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117417 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scale_fp4<->f32 of gfx950. (PR #117417)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117417 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{fp|bf}8_{f|bf}16 of gfx950. (PR #117384)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117384 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{f|bf}16_fp4 of gfx950. (PR #117418)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117418 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add MC support for gfx950 V_BITOP3_B32/B16 (PR #117379)

arsenm wrote: ### Merge activity * **Nov 25, 12:19 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117379). https://github.com/llvm/llvm-project/pull/117379

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scale_[f16|f32]_fp8 of gfx950. (PR #117380)

arsenm wrote: ### Merge activity * **Nov 25, 12:19 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117380). https://github.com/llvm/llvm-project/pull/117380

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scale_[f16|f32]_bf8 of gfx950. (PR #117381)

arsenm wrote: ### Merge activity * **Nov 25, 12:19 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117381). https://github.com/llvm/llvm-project/pull/117381

[llvm-branch-commits] [llvm] AMDGPU: Handle vcmpx+permalane gfx950 hazard (PR #117286)

arsenm wrote: ### Merge activity * **Nov 25, 12:19 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117286). https://github.com/llvm/llvm-project/pull/117286

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scale_fp4<->f32 of gfx950. (PR #117417)

arsenm wrote: ### Merge activity * **Nov 25, 12:19 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117417). https://github.com/llvm/llvm-project/pull/117417

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{fp|bf}8_{f|bf}16 of gfx950. (PR #117384)

arsenm wrote: ### Merge activity * **Nov 25, 12:19 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117384). https://github.com/llvm/llvm-project/pull/117384

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{fp8|bf8}_f32 of gfx950. (PR #117382)

arsenm wrote: ### Merge activity * **Nov 25, 12:19 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117382). https://github.com/llvm/llvm-project/pull/117382

[llvm-branch-commits] [llvm] AMDGPU: Handle gfx950 valu write vdst + permlane read hazard (PR #117287)

arsenm wrote: ### Merge activity * **Nov 25, 12:19 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117287). https://github.com/llvm/llvm-project/pull/117287

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_f32_[fp|bf]6 of gfx950 (PR #117590)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/117590 Co-authored-by: Pravin Jagtap >From 5801905fe13b783780dc09cb3ac4c177c92b10d5 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 8 Apr 2024 01:10:37 -0400 Subject: [PATCH] AMDGPU: MC support for v_cvt_scale

[llvm-branch-commits] [clang] [TySan] A Type Sanitizer (Clang) (PR #76260)

@@ -6630,7 +6631,8 @@ CodeGenModule::GetAddrOfConstantStringFromLiteral(const StringLiteral *S, if (Entry) *Entry = GV; - SanitizerMD->reportGlobal(GV, S->getStrTokenLoc(0), ""); + SanitizerMD->reportGlobalToASan(GV, S->getStrTokenLoc(0), ""); + // FIXME: Should we a

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950 (PR #117598)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117598 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [InstCombine] Drop noundef attributes in `foldCttzCtlz` (#116718) (PR #116865)

AreaZR wrote: @nikic can you please add the 19.x milestone tag thing? https://github.com/llvm/llvm-project/pull/116865 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-c

[llvm-branch-commits] [llvm] [NVPTX] Promote v2i8 to v2i16 (#111189) (PR #115081)

Artem-B wrote: Thank you for merging it. I do not think the fix is interesting enough for that. https://github.com/llvm/llvm-project/pull/115081 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/ma

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_pk32_{bf|f}6_{bf|fp}16 for gfx950 (PR #117592)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117592 >From dda287194ac7a9a09cc7de7996d604a112fe38ed Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 8 Apr 2024 04:56:56 -0400 Subject: [PATCH] AMDGPU: Support v_cvt_scalef32_pk32_{bf|f}6_{bf|fp}16 for gfx950

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 of gfx950. (PR #117591)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117591 >From 31eb3b6603f10fcda10bf85ec714907d8095c408 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 8 Apr 2024 01:53:50 -0400 Subject: [PATCH] AMDGPU: MC support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 of g

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_2xpk16_{bf|fp}6_f32 for gfx950. (PR #117595)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117595 >From 3f255ed2fea75838ae1487f75007902d71e26d01 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 8 Apr 2024 08:56:14 -0400 Subject: [PATCH] AMDGPU: Support v_cvt_scalef32_2xpk16_{bf|fp}6_f32 for gfx950. S

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 of gfx950. (PR #117593)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117593 >From af97871bc55ca15ab6eb0e60df53987132b4 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 8 Apr 2024 07:44:32 -0400 Subject: [PATCH] AMDGPU: MC support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 of gfx

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_fp4_{f|bf}16 on gfx950. (PR #117594)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117594 >From 889152eccafc4e1815b13f407588e189d0c76f7f Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Wed, 10 Apr 2024 05:47:54 -0400 Subject: [PATCH] AMDGPU: MC support for v_cvt_scalef32_pk_fp4_{f|bf}16 on gfx950.

[llvm-branch-commits] [llvm] AMDGPU: Legalize fminimum and fmaximum f32 for gfx950 (PR #117634)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu @llvm/pr-subscribers-mc Author: Matt Arsenault (arsenm) Changes Select to minimum3/maximum3. Leave f16/v2f16 for later since it's complicated by only having the vector version. --- Patch is 185.07 KiB, truncated to 20.00 KiB below, full

[llvm-branch-commits] [llvm] AMDGPU: Legalize fminimum and fmaximum f32 for gfx950 (PR #117634)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117634?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] AMDGPU: Legalize fminimum and fmaximum f32 for gfx950 (PR #117634)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117634 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2_f32_bf16 instruction for gfx950 (PR #117597)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117597 >From d63236c5b217249876f4a626aab5a1ba1b205b5d Mon Sep 17 00:00:00 2001 From: Sirish Pande Date: Fri, 10 May 2024 17:33:59 -0500 Subject: [PATCH] AMDGPU: Add support for v_dot2_f32_bf16 instruction for gfx950 v

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_ashr_pk_i8/u8_i32 instructions for gfx950 (PR #117596)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117596 >From 2e0074c4bb6f973aeb201ef52772800b2bb1a810 Mon Sep 17 00:00:00 2001 From: Sirish Pande Date: Tue, 13 Feb 2024 10:54:51 -0600 Subject: [PATCH] AMDGPU: Add support for v_ashr_pk_i8/u8_i32 instructions for gfx9

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950 (PR #117598)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117598 >From 6c72fbf96fda7fdc41218cf59b44d941b7e472a2 Mon Sep 17 00:00:00 2001 From: Sirish Pande Date: Sat, 11 May 2024 11:54:40 -0500 Subject: [PATCH] AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support buffer_atomic_pk_add_bf16 for gfx950 (PR #117599)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117599 >From 35faf696c6d46717bc65a94e130f04777a5c12c8 Mon Sep 17 00:00:00 2001 From: Sirish Pande Date: Thu, 16 May 2024 16:21:42 -0500 Subject: [PATCH] AMDGPU: Support buffer_atomic_pk_add_bf16 for gfx950 Co-authored-

[llvm-branch-commits] [llvm] AMDGPU: Add encodings for minimum3/maximum3 f32 for gfx950 (PR #117600)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117600 >From cadb50405c881405c7a093ab850df5ac6d568e1a Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 22 May 2024 19:36:47 +0200 Subject: [PATCH] AMDGPU: Add encodings for minimum3/maximum3 f32 for gfx950 ---

[llvm-branch-commits] [llvm] AMDGPU: Add minimum3/maximum3 pkf16 for gfx950 encodings (PR #117601)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117601 >From 56e6a6cade89309fe4adae85e5a6c1e31e437d92 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 22 May 2024 19:45:57 +0200 Subject: [PATCH] AMDGPU: Add minimum3/maximum3 pkf16 for gfx950 encodings --- l

[llvm-branch-commits] [llvm] AMDGPU: Legalize fminimum and fmaximum f32 for gfx950 (PR #117634)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117634 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Legalize fminimum and fmaximum f32 for gfx950 (PR #117634)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117634 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Add liverange split instructions into BB Prolog (PR #117544)

https://github.com/cdevadas created https://github.com/llvm/llvm-project/pull/117544 The COPY inserted for liverange split during sgpr-regalloc pipeline currently breaks the BB prolog during the subsequent vgpr-regalloc phase while spilling and/or splitting the vector liveranges. This patch fixe

[llvm-branch-commits] [llvm] [AMDGPU] Add liverange split instructions into BB Prolog (PR #117544)

cdevadas wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117544?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [AMDGPU] Add liverange split instructions into BB Prolog (PR #117544)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Christudasan Devadasan (cdevadas) Changes The COPY inserted for liverange split during sgpr-regalloc pipeline currently breaks the BB prolog during the subsequent vgpr-regalloc phase while spilling and/or splitting the vector liver

[llvm-branch-commits] [llvm] [AMDGPU] Add liverange split instructions into BB Prolog (PR #117544)

https://github.com/cdevadas ready_for_review https://github.com/llvm/llvm-project/pull/117544 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] 02930b8 - [NVPTX] Promote v2i8 to v2i16 (#111189)

Author: Manasij Mukherjee Date: 2024-11-19T14:15:13-08:00 New Revision: 02930b87faeb490505b22f588757a18744248b6f URL: https://github.com/llvm/llvm-project/commit/02930b87faeb490505b22f588757a18744248b6f DIFF: https://github.com/llvm/llvm-project/commit/02930b87faeb490505b22f588757a18744248b6f.d

[llvm-branch-commits] [llvm] [NVPTX] Promote v2i8 to v2i16 (#111189) (PR #115081)

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[llvm-branch-commits] [llvm] [NVPTX] Promote v2i8 to v2i16 (#111189) (PR #115081)

https://github.com/tru closed https://github.com/llvm/llvm-project/pull/115081 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (#116075) (PR #116797)

https://github.com/tru updated https://github.com/llvm/llvm-project/pull/116797 >From ea960400213ad6a619d40536ae8965fca70eac89 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sat, 16 Nov 2024 20:55:33 -0800 Subject: [PATCH 1/2] [Mips] Change vsplat_imm_eq_1 to a ComplexPattern. (#116471) Res

[llvm-branch-commits] [llvm] release/19.x: [SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (#116075) (PR #116797)

https://github.com/tru closed https://github.com/llvm/llvm-project/pull/116797 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] ea96040 - [Mips] Change vsplat_imm_eq_1 to a ComplexPattern. (#116471)

Author: Craig Topper Date: 2024-11-25T09:36:42+01:00 New Revision: ea960400213ad6a619d40536ae8965fca70eac89 URL: https://github.com/llvm/llvm-project/commit/ea960400213ad6a619d40536ae8965fca70eac89 DIFF: https://github.com/llvm/llvm-project/commit/ea960400213ad6a619d40536ae8965fca70eac89.diff

[llvm-branch-commits] [llvm] release/19.x: [InstCombine] Handle constant GEP expr in `SimplifyDemandedUseBits` (#116794) (PR #116814)

https://github.com/tru closed https://github.com/llvm/llvm-project/pull/116814 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [ConstraintElim] Bail out on non-dedicated exits when adding exiting conditions (#116627) (PR #117137)

https://github.com/tru updated https://github.com/llvm/llvm-project/pull/117137 >From 7e2da7d262380d5ebaf25dbadd7ad2440f6ce21f Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Mon, 18 Nov 2024 23:41:04 +0800 Subject: [PATCH] [ConstraintElim] Bail out on non-dedicated exits when adding exiting

[llvm-branch-commits] [llvm] release/19.x: [SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (#116075) (PR #116797)

github-actions[bot] wrote: @dtcxzyw (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. h

[llvm-branch-commits] [llvm] release/19.x: [ConstraintElim] Bail out on non-dedicated exits when adding exiting conditions (#116627) (PR #117137)

https://github.com/tru closed https://github.com/llvm/llvm-project/pull/117137 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [SCEV] Fix sext handling for `getConstantMultiple` (#117093) (PR #117136)

github-actions[bot] wrote: @dtcxzyw (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. h

[llvm-branch-commits] [llvm] release/19.x: [ConstraintElim] Bail out on non-dedicated exits when adding exiting conditions (#116627) (PR #117137)

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[llvm-branch-commits] [llvm] 11be11b - [SCEV] Fix sext handling for `getConstantMultiple` (#117093)

Author: Yingwei Zheng Date: 2024-11-25T09:45:43+01:00 New Revision: 11be11b8773bf63abe2c8da72db3ee7c25af524b URL: https://github.com/llvm/llvm-project/commit/11be11b8773bf63abe2c8da72db3ee7c25af524b DIFF: https://github.com/llvm/llvm-project/commit/11be11b8773bf63abe2c8da72db3ee7c25af524b.diff

[llvm-branch-commits] [llvm] 7e2da7d - [ConstraintElim] Bail out on non-dedicated exits when adding exiting conditions (#116627)

Author: Yingwei Zheng Date: 2024-11-25T09:46:04+01:00 New Revision: 7e2da7d262380d5ebaf25dbadd7ad2440f6ce21f URL: https://github.com/llvm/llvm-project/commit/7e2da7d262380d5ebaf25dbadd7ad2440f6ce21f DIFF: https://github.com/llvm/llvm-project/commit/7e2da7d262380d5ebaf25dbadd7ad2440f6ce21f.diff

[llvm-branch-commits] [llvm] release/19.x: [SCEV] Fix sext handling for `getConstantMultiple` (#117093) (PR #117136)

https://github.com/tru updated https://github.com/llvm/llvm-project/pull/117136 >From 11be11b8773bf63abe2c8da72db3ee7c25af524b Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Thu, 21 Nov 2024 17:23:04 +0800 Subject: [PATCH] [SCEV] Fix sext handling for `getConstantMultiple` (#117093) Counter

[llvm-branch-commits] [lld] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

https://github.com/heiher updated https://github.com/llvm/llvm-project/pull/117105 >From 48578ef7ac2540a124b0aca25f3b56118d48fe08 Mon Sep 17 00:00:00 2001 From: Zhaoxin Yang Date: Mon, 11 Nov 2024 16:46:22 +0800 Subject: [PATCH] [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922

[llvm-branch-commits] [llvm] release/19.x: [SLP]Check that operand of abs does not overflow before making it part of minbitwidth transformation (PR #113146)

tru wrote: Ping on this again. Are you happy with this now @nikic ? https://github.com/llvm/llvm-project/pull/113146 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-com

[llvm-branch-commits] [compiler-rt] release/19.x: [compiler-rt] [test] Remove an unintended grep parameter (PR #116774)

github-actions[bot] wrote: @llvmbot Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our [build bots](https://lab.llvm.org/buildbot/). If there is a problem with a build,

[llvm-branch-commits] [clang] release/19.x: [clang-repl] Improve flags responsible for generating shared wasm binaries (#116735) (PR #116766)

github-actions[bot] wrote: @anutosh491 (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

[llvm-branch-commits] [compiler-rt] release/19.x: [compiler-rt] [test] Remove an unintended grep parameter (PR #116774)

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[llvm-branch-commits] [lld] [lld][Hexagon] Fix R_HEX_B22_PCREL range checks (#115925) (PR #116906)

https://github.com/tru updated https://github.com/llvm/llvm-project/pull/116906 >From e80925b5eb4c824fe97a055d49faa586de16c2b9 Mon Sep 17 00:00:00 2001 From: Alexey Karyakin Date: Tue, 19 Nov 2024 09:27:01 -0600 Subject: [PATCH] [lld][Hexagon] Fix R_HEX_B22_PCREL range checks (#115925) Range ch

[llvm-branch-commits] [lld] [lld][Hexagon] Fix R_HEX_B22_PCREL range checks (#115925) (PR #116906)

https://github.com/tru closed https://github.com/llvm/llvm-project/pull/116906 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [lld] [lld][Hexagon] Fix R_HEX_B22_PCREL range checks (#115925) (PR #116906)

github-actions[bot] wrote: @androm3da (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

[llvm-branch-commits] [llvm] 5bd0474 - [LICM] allow MemoryAccess creation failure (#116813)

Author: DianQK Date: 2024-11-25T09:39:22+01:00 New Revision: 5bd0474d1c45d58e472f25bf8292570ac78b5c15 URL: https://github.com/llvm/llvm-project/commit/5bd0474d1c45d58e472f25bf8292570ac78b5c15 DIFF: https://github.com/llvm/llvm-project/commit/5bd0474d1c45d58e472f25bf8292570ac78b5c15.diff LOG: [

[llvm-branch-commits] [llvm] release/19.x: [LICM] allow MemoryAccess creation failure (#116813) (PR #117082)

https://github.com/tru updated https://github.com/llvm/llvm-project/pull/117082 >From 5bd0474d1c45d58e472f25bf8292570ac78b5c15 Mon Sep 17 00:00:00 2001 From: DianQK Date: Wed, 20 Nov 2024 19:52:51 +0800 Subject: [PATCH] [LICM] allow MemoryAccess creation failure (#116813) Fixes #116809. After

[llvm-branch-commits] [llvm] release/19.x: [LICM] allow MemoryAccess creation failure (#116813) (PR #117082)

https://github.com/tru closed https://github.com/llvm/llvm-project/pull/117082 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [lld] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

tru wrote: Can you squash this PR so it's just one commit? https://github.com/llvm/llvm-project/pull/117105 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [llvm] Fix __builtin_object_size interaction between Negative Offset … (#111827) (PR #114786)

tru wrote: @serge-sans-paille what do you think? should this be backported? https://github.com/llvm/llvm-project/pull/114786 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-br

[llvm-branch-commits] [clang] release/19.x: [clang-repl] Improve flags responsible for generating shared wasm binaries (#116735) (PR #116766)

github-actions[bot] wrote: @llvmbot Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our [build bots](https://lab.llvm.org/buildbot/). If there is a problem with a build,

[llvm-branch-commits] [clang] release/19.x: [clang-repl] Improve flags responsible for generating shared wasm binaries (#116735) (PR #116766)

https://github.com/tru updated https://github.com/llvm/llvm-project/pull/116766 >From e032d7ad80f8d185626b39751f672932f92dc033 Mon Sep 17 00:00:00 2001 From: Anutosh Bhat Date: Tue, 19 Nov 2024 13:37:40 +0530 Subject: [PATCH] [clang-repl] Improve flags responsible for generating shared wasm bin

[llvm-branch-commits] [clang] e032d7a - [clang-repl] Improve flags responsible for generating shared wasm binaries (#116735)

Author: Anutosh Bhat Date: 2024-11-25T09:32:38+01:00 New Revision: e032d7ad80f8d185626b39751f672932f92dc033 URL: https://github.com/llvm/llvm-project/commit/e032d7ad80f8d185626b39751f672932f92dc033 DIFF: https://github.com/llvm/llvm-project/commit/e032d7ad80f8d185626b39751f672932f92dc033.diff

[llvm-branch-commits] [clang] release/19.x: [clang-repl] Improve flags responsible for generating shared wasm binaries (#116735) (PR #116766)

https://github.com/tru closed https://github.com/llvm/llvm-project/pull/116766 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [compiler-rt] fb6b195 - [compiler-rt] [test] Remove an unintended grep parameter

Author: Martin Storsjö Date: 2024-11-25T09:34:06+01:00 New Revision: fb6b195cae03ba6e5b50870031d710ca6886c5bb URL: https://github.com/llvm/llvm-project/commit/fb6b195cae03ba6e5b50870031d710ca6886c5bb DIFF: https://github.com/llvm/llvm-project/commit/fb6b195cae03ba6e5b50870031d710ca6886c5bb.diff

[llvm-branch-commits] [lld] e80925b - [lld][Hexagon] Fix R_HEX_B22_PCREL range checks (#115925)

Author: Alexey Karyakin Date: 2024-11-25T09:38:39+01:00 New Revision: e80925b5eb4c824fe97a055d49faa586de16c2b9 URL: https://github.com/llvm/llvm-project/commit/e80925b5eb4c824fe97a055d49faa586de16c2b9 DIFF: https://github.com/llvm/llvm-project/commit/e80925b5eb4c824fe97a055d49faa586de16c2b9.dif

[llvm-branch-commits] [llvm] release/19.x: [InstCombine] Handle constant GEP expr in `SimplifyDemandedUseBits` (#116794) (PR #116814)

github-actions[bot] wrote: @llvmbot Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our [build bots](https://lab.llvm.org/buildbot/). If there is a problem with a build,

[llvm-branch-commits] [llvm] release/19.x: [InstCombine] Handle constant GEP expr in `SimplifyDemandedUseBits` (#116794) (PR #116814)

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[llvm-branch-commits] [llvm] [LV] Mask off possibly aliasing vector lanes (PR #100579)

SamTebbs33 wrote: I've rebased this on top of my PR that adds an intrinsic since that's less fragile to match in the backend. So this should now be ready to have a look at. https://github.com/llvm/llvm-project/pull/100579 ___ llvm-branch-commits maili

[llvm-branch-commits] [llvm] release/19.x: [MachineLICM] Don't allow hoisting invariant loads across mem barrier. (#116987) (PR #117154)

https://github.com/tru updated https://github.com/llvm/llvm-project/pull/117154 >From 32cbe24de3f2ecb1c77899ff27bfe70bb033ecde Mon Sep 17 00:00:00 2001 From: Florian Hahn Date: Wed, 20 Nov 2024 15:10:19 + Subject: [PATCH 1/2] [MachineLICM] Add test case showing load hoisted across memory ba

[llvm-branch-commits] [llvm] release/19.x: [MachineLICM] Don't allow hoisting invariant loads across mem barrier. (#116987) (PR #117154)

https://github.com/tru closed https://github.com/llvm/llvm-project/pull/117154 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] 32cbe24 - [MachineLICM] Add test case showing load hoisted across memory barrier.

Author: Florian Hahn Date: 2024-11-25T11:16:39+01:00 New Revision: 32cbe24de3f2ecb1c77899ff27bfe70bb033ecde URL: https://github.com/llvm/llvm-project/commit/32cbe24de3f2ecb1c77899ff27bfe70bb033ecde DIFF: https://github.com/llvm/llvm-project/commit/32cbe24de3f2ecb1c77899ff27bfe70bb033ecde.diff

[llvm-branch-commits] [llvm] 086d8e6 - [MachineLICM] Don't allow hoisting invariant loads across mem barrier. (#116987)

Author: Florian Hahn Date: 2024-11-25T11:16:39+01:00 New Revision: 086d8e6bb5daf8de43880ba90258c49e0fabf2c9 URL: https://github.com/llvm/llvm-project/commit/086d8e6bb5daf8de43880ba90258c49e0fabf2c9 DIFF: https://github.com/llvm/llvm-project/commit/086d8e6bb5daf8de43880ba90258c49e0fabf2c9.diff

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