https://github.com/tru updated https://github.com/llvm/llvm-project/pull/117154
>From 32cbe24de3f2ecb1c77899ff27bfe70bb033ecde Mon Sep 17 00:00:00 2001
From: Florian Hahn <f...@fhahn.com>
Date: Wed, 20 Nov 2024 15:10:19 +0000
Subject: [PATCH 1/2] [MachineLICM] Add test case showing load hoisted across
memory barrier.
(cherry picked from commit a9b3ec154d7ab2d0896ac5c9f1e9a1266a37be80)
---
.../AArch64/machine-licm-hoist-load.ll | 29 +++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
b/llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
index e8dafd5e8fbabe..932a5af264a000 100644
--- a/llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
+++ b/llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
@@ -497,6 +497,35 @@ for.exit: ; preds =
%for.body
ret i64 %spec.select
}
+@a = external local_unnamed_addr global i32, align 4
+
+; FIXME: Load hoisted out of the loop across memory barriers.
+define i32 @load_between_memory_barriers() {
+; CHECK-LABEL: load_between_memory_barriers:
+; CHECK: // %bb.0:
+; CHECK-NEXT: adrp x8, :got:a
+; CHECK-NEXT: ldr x8, [x8, :got_lo12:a]
+; CHECK-NEXT: ldr w0, [x8]
+; CHECK-NEXT: .LBB8_1: // %loop
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: //MEMBARRIER
+; CHECK-NEXT: //MEMBARRIER
+; CHECK-NEXT: cbz w0, .LBB8_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ret
+ br label %loop
+
+loop:
+ fence syncscope("singlethread") acq_rel
+ %l = load i32, ptr @a, align 4
+ fence syncscope("singlethread") acq_rel
+ %c = icmp eq i32 %l, 0
+ br i1 %c, label %loop, label %exit
+
+exit:
+ ret i32 %l
+}
+
declare i32 @bcmp(ptr, ptr, i64)
declare i32 @memcmp(ptr, ptr, i64)
declare void @func()
>From 086d8e6bb5daf8de43880ba90258c49e0fabf2c9 Mon Sep 17 00:00:00 2001
From: Florian Hahn <f...@fhahn.com>
Date: Thu, 21 Nov 2024 10:25:04 +0000
Subject: [PATCH 2/2] [MachineLICM] Don't allow hoisting invariant loads across
mem barrier. (#116987)
The improvements in 63917e1 / #70796 do not check for memory
barriers/unmodelled sideeffects, which means we may incorrectly hoist
loads across memory barriers.
Fix this by checking any machine instruction in the loop is a load-fold
barrier.
PR: https://github.com/llvm/llvm-project/pull/116987
(cherry picked from commit ef102b4a6333a304e36dc623d5381257a7ef1ed6)
---
llvm/lib/CodeGen/MachineLICM.cpp | 2 +-
llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll | 4 ++--
llvm/test/CodeGen/Mips/lcb5.ll | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index f24ab187ef4005..21a02a6f094784 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -1474,7 +1474,7 @@ void MachineLICMBase::InitializeLoadsHoistableLoops() {
if (!AllowedToHoistLoads[Loop])
continue;
for (auto &MI : *MBB) {
- if (!MI.mayStore() && !MI.isCall() &&
+ if (!MI.isLoadFoldBarrier() && !MI.mayStore() && !MI.isCall() &&
!(MI.mayLoad() && MI.hasOrderedMemoryRef()))
continue;
for (MachineLoop *L = Loop; L != nullptr; L = L->getParentLoop())
diff --git a/llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
b/llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
index 932a5af264a000..17f8263560430d 100644
--- a/llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
+++ b/llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
@@ -499,16 +499,16 @@ for.exit: ; preds =
%for.body
@a = external local_unnamed_addr global i32, align 4
-; FIXME: Load hoisted out of the loop across memory barriers.
+; Make sure the load is not hoisted out of the loop across memory barriers.
define i32 @load_between_memory_barriers() {
; CHECK-LABEL: load_between_memory_barriers:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, :got:a
; CHECK-NEXT: ldr x8, [x8, :got_lo12:a]
-; CHECK-NEXT: ldr w0, [x8]
; CHECK-NEXT: .LBB8_1: // %loop
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: //MEMBARRIER
+; CHECK-NEXT: ldr w0, [x8]
; CHECK-NEXT: //MEMBARRIER
; CHECK-NEXT: cbz w0, .LBB8_1
; CHECK-NEXT: // %bb.2: // %exit
diff --git a/llvm/test/CodeGen/Mips/lcb5.ll b/llvm/test/CodeGen/Mips/lcb5.ll
index f320f6fc5660ce..bb059f1ee8453e 100644
--- a/llvm/test/CodeGen/Mips/lcb5.ll
+++ b/llvm/test/CodeGen/Mips/lcb5.ll
@@ -186,7 +186,7 @@ if.end: ; preds =
%if.then, %entry
}
; ci: .ent z3
-; ci: bteqz $BB6_3
+; ci: bteqz $BB6_2
; ci: .end z3
; Function Attrs: nounwind optsize
@@ -210,7 +210,7 @@ if.end: ; preds =
%if.then, %entry
; ci: .ent z4
; ci: btnez $BB7_1 # 16 bit inst
-; ci: jal $BB7_3 # branch
+; ci: jal $BB7_2 # branch
; ci: nop
; ci: $BB7_1:
; ci: .p2align 2
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