[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-23 Thread Petar Avramovic via llvm-branch-commits
https://github.com/petar-avramovic edited https://github.com/llvm/llvm-project/pull/112863 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-21 Thread Matt Arsenault via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-21 Thread Petar Avramovic via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-21 Thread Petar Avramovic via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-21 Thread Petar Avramovic via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Thorsten Schütt via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Thorsten Schütt via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Thorsten Schütt via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Thorsten Schütt via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Thorsten Schütt via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { ---

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Thorsten Schütt via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Thorsten Schütt via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Thorsten Schütt via llvm-branch-commits
https://github.com/tschuett edited https://github.com/llvm/llvm-project/pull/112863 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -69,3 +72,38 @@ AMDGPU::getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg, return std::pair(Reg, 0); } + +IntrinsicLaneMaskAnalyzer::IntrinsicLaneMaskAnalyzer(MachineFunction &MF) +: MRI(MF.getRegInfo()) { + initLaneMaskIntrinsics(MF); +} + +bool Intr

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -69,3 +72,38 @@ AMDGPU::getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg, return std::pair(Reg, 0); } + +IntrinsicLaneMaskAnalyzer::IntrinsicLaneMaskAnalyzer(MachineFunction &MF) +: MRI(MF.getRegInfo()) { + initLaneMaskIntrinsics(MF); +} + +bool Intr

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/112863 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-19 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm commented: Don't forget about AGPRs https://github.com/llvm/llvm-project/pull/112863 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-18 Thread Diana Picus via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-18 Thread Diana Picus via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-18 Thread Diana Picus via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-18 Thread Diana Picus via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-18 Thread Diana Picus via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-18 Thread Diana Picus via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-18 Thread Diana Picus via llvm-branch-commits
@@ -26,6 +28,26 @@ std::pair getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg, GISelKnownBits *KnownBits = nullptr, bool CheckNUW = false); + +// Currently finds S32/S64 lane masks that can be declared as diver

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RBSelect (PR #112863)

2024-10-18 Thread Diana Picus via llvm-branch-commits
@@ -63,4 +70,189 @@ char &llvm::AMDGPURBSelectID = AMDGPURBSelect::ID; FunctionPass *llvm::createAMDGPURBSelectPass() { return new AMDGPURBSelect(); } -bool AMDGPURBSelect::runOnMachineFunction(MachineFunction &MF) { return true; } +bool shouldRBSelect(MachineInstr &MI) { +