[llvm-branch-commits] [llvm] [RISCV][NFC] refactor CFI emitting (PR #114227)

2024-10-30 Thread Sam Elliott via llvm-branch-commits
@@ -27,6 +27,102 @@ using namespace llvm; +static unsigned getCaleeSavedRVVNumRegs(const Register &BaseReg) { lenary wrote: Typo ```suggestion static unsigned getCalleeSavedRVVNumRegs(const Register &BaseReg) { ``` https://github.com/llvm/llvm-project/pull

[llvm-branch-commits] [llvm] [RISCV][NFC] refactor CFI emitting (PR #114227)

2024-10-30 Thread Sam Elliott via llvm-branch-commits
https://github.com/lenary edited https://github.com/llvm/llvm-project/pull/114227 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [RISCV][NFC] refactor CFI emitting (PR #114227)

2024-10-30 Thread Sam Elliott via llvm-branch-commits
@@ -27,6 +27,102 @@ using namespace llvm; +static unsigned getCaleeSavedRVVNumRegs(const Register &BaseReg) { + return RISCV::VRRegClass.contains(BaseReg) ? 1 + : RISCV::VRM2RegClass.contains(BaseReg) ? 2 + : RISCV::VRM4RegClass.contains(BaseReg) ? 4 +

[llvm-branch-commits] [llvm] [RISCV][NFC] refactor CFI emitting (PR #114227)

2024-10-30 Thread Sam Elliott via llvm-branch-commits
https://github.com/lenary commented: This cleanup is going in a nice direction, I think. A few suggestions/questions below. https://github.com/llvm/llvm-project/pull/114227 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https:

[llvm-branch-commits] [llvm] [RISCV][NFC] refactor CFI emitting (PR #114227)

2024-10-30 Thread Sam Elliott via llvm-branch-commits
@@ -27,6 +27,102 @@ using namespace llvm; +static unsigned getCaleeSavedRVVNumRegs(const Register &BaseReg) { + return RISCV::VRRegClass.contains(BaseReg) ? 1 + : RISCV::VRM2RegClass.contains(BaseReg) ? 2 + : RISCV::VRM4RegClass.contains(BaseReg) ? 4 +

[llvm-branch-commits] [llvm] [RISCV][NFC] refactor CFI emitting (PR #114227)

2024-10-30 Thread Sam Elliott via llvm-branch-commits
@@ -1737,39 +1776,14 @@ void RISCVFrameLowering::emitCalleeSavedRVVPrologCFI( for (auto &CS : RVVCSI) { // Insert the spill to the stack frame. int FI = CS.getFrameIdx(); lenary wrote: Is there a reason you didn't replace this loop with a call to `em

[llvm-branch-commits] [llvm] [RISCV][NFC] refactor CFI emitting (PR #114227)

2024-10-30 Thread Sam Elliott via llvm-branch-commits
@@ -27,6 +27,102 @@ using namespace llvm; +static unsigned getCaleeSavedRVVNumRegs(const Register &BaseReg) { + return RISCV::VRRegClass.contains(BaseReg) ? 1 + : RISCV::VRM2RegClass.contains(BaseReg) ? 2 + : RISCV::VRM4RegClass.contains(BaseReg) ? 4 +

[llvm-branch-commits] [llvm] [RISCV][NFC] refactor CFI emitting (PR #114227)

2024-10-30 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-risc-v Author: None (dlav-sc) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/114227.diff 2 Files Affected: - (modified) llvm/lib/Target/RISCV/RISCVFrameLowering.cpp (+94-98) - (modified) llvm/lib/Target/RISCV/RISCVFrameLow

[llvm-branch-commits] [llvm] [RISCV][NFC] refactor CFI emitting (PR #114227)

2024-10-30 Thread via llvm-branch-commits
https://github.com/dlav-sc created https://github.com/llvm/llvm-project/pull/114227 None >From 825bc966611bb9a5e737f2ed65b524766998c261 Mon Sep 17 00:00:00 2001 From: Daniil Avdeev Date: Wed, 30 Oct 2024 13:24:21 + Subject: [PATCH] [RISCV][NFC] refactor CFI emitting --- llvm/lib/Target/R