================ @@ -27,6 +27,102 @@ using namespace llvm; +static unsigned getCaleeSavedRVVNumRegs(const Register &BaseReg) { + return RISCV::VRRegClass.contains(BaseReg) ? 1 + : RISCV::VRM2RegClass.contains(BaseReg) ? 2 + : RISCV::VRM4RegClass.contains(BaseReg) ? 4 + : 8; +} + +static MCRegister getRVVBaseRegister(const RISCVRegisterInfo &TRI, + const Register &Reg) { + MCRegister BaseReg = TRI.getSubReg(Reg, RISCV::sub_vrm1_0); + // If it's not a grouped vector register, it doesn't have subregister, so + // the base register is just itself. + if (BaseReg == RISCV::NoRegister) + BaseReg = Reg; + return BaseReg; +} + +namespace { + +struct CFIRestoreRegisterEmitter { + CFIRestoreRegisterEmitter(MachineFunction &, const RISCVSubtarget &) {}; + + void emit(MachineFunction &MF, MachineBasicBlock &MBB, + MachineBasicBlock::iterator MBBI, const RISCVRegisterInfo &RI, + const RISCVInstrInfo &TII, const DebugLoc &DL, + const CalleeSavedInfo &CS) const { + Register Reg = CS.getReg(); + unsigned CFIIndex = MF.addFrameInst( + MCCFIInstruction::createRestore(nullptr, RI.getDwarfRegNum(Reg, true))); + BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION)) + .addCFIIndex(CFIIndex) + .setMIFlag(MachineInstr::FrameDestroy); + } +}; + +class CFIStoreRegisterEmitter { ---------------- lenary wrote:
```suggestion class CFISaveRegisterEmitter { ``` I think it would be clearer to use "Save" as the opposite of "Restore", rather than "Store" vs "Restore". https://github.com/llvm/llvm-project/pull/114227 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits