https://github.com/Pierre-vh closed
https://github.com/llvm/llvm-project/pull/131310
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https://github.com/llvm/llvm-project/pull/131853
>From 11518ee84c9442934cd85ca99567a7f3fc3ba827 Mon Sep 17 00:00:00 2001
From: cor3ntin
Date: Tue, 18 Mar 2025 16:45:37 +0100
Subject: [PATCH 1/2] [Clang][Backport] Demote mixed enumeration arithmetic
error to
https://github.com/pcc created https://github.com/llvm/llvm-project/pull/132291
The existing version check can lead to test failures on some distribution
packages of gdb where not all components of the version number are
integers, such as Fedora where gdb.VERSION can be something like
"15.2-4.fc4
@@ -80,6 +80,21 @@ enum class RuleTy {
ForVectorization,
};
+/// Store the information about if corresponding direction vector was negated
sjoerdmeijer wrote:
Before I keep reading the rest of this patch, just wanted to share this first
question that I had
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/134482
>From bc8dda56bcfadc6d7312b53313159a978d71f4fb Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Fri, 4 Apr 2025 22:10:52 -0700
Subject: [PATCH] Remove unnecessary code
Created using spr 1.3.6-beta.1
---
...
https://github.com/pcc created https://github.com/llvm/llvm-project/pull/134482
Tested on aarch64 Linux and x86_64 Linux.
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https://github.com/kasuga-fj updated
https://github.com/llvm/llvm-project/pull/133667
>From bd84ddc9e4dc645e965b2a6dc535a3023e0d7e45 Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Thu, 27 Mar 2025 09:52:16 +
Subject: [PATCH] [LoopInterchange] Fix the vectorizable check for a loop
In t
llvmbot wrote:
@llvm/pr-subscribers-lldb
Author: None (llvmbot)
Changes
Backport 50ae1c7
Requested by: @ziyao233
---
Full diff: https://github.com/llvm/llvm-project/pull/134479.diff
1 Files Affected:
- (modified)
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch6
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/134479
Backport 50ae1c7
Requested by: @ziyao233
>From e5ea8aee19a9f3b82bed91c6c947965ed613741e Mon Sep 17 00:00:00 2001
From: Tiezhu Yang
Date: Fri, 7 Feb 2025 11:18:40 +0800
Subject: [PATCH] [LLDB][LoongArch] Fix bu
llvmbot wrote:
@SixWeining What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/134479
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@@ -304,6 +304,36 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
}
}
+ MCPhysReg getSafelyMaterializedAddressReg(const MCInst &Inst) const override
{
+switch (Inst.getOpcode()) {
+case AArch64::ADR:
+case AArch64::ADRP:
kbeyls wrote
mtrofin wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/134468?utm_source=stack-comment-downstack-mergeability-warning";
ritter-x2a wrote:
> I think if we add something called "inbounds" to SelectionDAG, it will
> inevitably get misused for other purposes, though.
Wouldn't we have any problems that would introduce already with inbounds GEPs
in the IR? Assuming we introduce ISD::PTRADD and only give inbounds a m
https://github.com/mtrofin created
https://github.com/llvm/llvm-project/pull/134468
None
>From e935ffab268301aa1b23f41facd9f800c8842a96 Mon Sep 17 00:00:00 2001
From: Mircea Trofin
Date: Fri, 4 Apr 2025 13:18:32 -0700
Subject: [PATCH] [ctxprof] Use `isInSpecializedModule` as criteria for using
redstar wrote:
I refactored the code in the suggested way. Some notes:
- I section to emit the code/data is either the ED or the PR. The other
sections are linked via the `Parent` pointer. `MCGOFFStreamer::changeSection()`
makes sure that all sections are registered in the correct order.
- I u
https://github.com/kasuga-fj updated
https://github.com/llvm/llvm-project/pull/133672
>From 692e4de4f84281f8c2bc5f7278f8066929df3cd6 Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Thu, 27 Mar 2025 10:45:26 +
Subject: [PATCH] [LoopInterchange] Improve profitability check for
vectorizat
Author: Sirraide
Date: 2025-04-02T08:28:09+02:00
New Revision: 12372457f6284197ba610616c3fdd4ddea937d5c
URL:
https://github.com/llvm/llvm-project/commit/12372457f6284197ba610616c3fdd4ddea937d5c
DIFF:
https://github.com/llvm/llvm-project/commit/12372457f6284197ba610616c3fdd4ddea937d5c.diff
LOG:
https://github.com/ldionne approved this pull request.
Now that we have a better understanding that this is a workaround for an issue,
how to reproduce the issue, etc, I am comfortable with cherry-picking this to
LLVM 20. I don't think this is necessarily the workaround we'll want to keep
fore
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/134435
Backport a97f73405f8e074263a0ed2dd2b8c87c014f46d9
Requested by: @ldionne
>From 98cff83467d2e63d6805cb4d138a785865a45e34 Mon Sep 17 00:00:00 2001
From: Louis Dionne
Date: Fri, 4 Apr 2025 14:56:26 -0400
Subject:
zwuis wrote:
I tested this branch locally. It fixes #43179, #68670 and #92757.
https://github.com/llvm/llvm-project/pull/133610
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https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/131862
>From bd22087405bdf669eca230dcf0656dd14b290083 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Mon, 17 Mar 2025 06:51:16 -0400
Subject: [PATCH] [SDAG] Introduce inbounds flag for pointer arithmetic
This p
@@ -545,9 +545,27 @@ void baremetal::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
}
- if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nostartfiles,
- options::OPT_r
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/134035
>From c6252c5dc0d1326a139c73a75b2a7892d0670ad0 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 2 Apr 2025 11:45:24 +0700
Subject: [PATCH 1/4] llvm-reduce: Change function return types if function is
not
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/132540
>From c975f5b73958d2aeadf82c0a7b736e713d8798ae Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Thu, 20 Mar 2025 20:15:07 +0300
Subject: [PATCH 1/2] [BOLT] Gadget scanner: Detect address materializati
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/133308
>From 46d771d97cd832f8f3c37b3bc580a22b6341a29e Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Thu, 27 Mar 2025 21:06:55 +0300
Subject: [PATCH] [BOLT] Make DataflowAnalysis::getStateBefore() const (N
@@ -13343,28 +13344,25 @@ class Sema final : public SemaBase {
/// The current index into pack expansion arguments that will be
/// used for substitution of parameter packs.
///
- /// The pack expansion index will be -1 to indicate that parameter packs
+ /// The pack ex
llvmbot wrote:
@llvm/pr-subscribers-backend-powerpc
Author: None (llvmbot)
Changes
Backport 9356091a98c24718572f99b51553838ed664b67a
Requested by: @nikic
---
Full diff: https://github.com/llvm/llvm-project/pull/134052.diff
2 Files Affected:
- (modified) llvm/lib/CodeGen/GlobalMerge.cp
tstellar wrote:
> LGTM.
>
> Note: test/CodeGen is probably not the best place for such tests.
> `test/MC/CSKY/relocation-specifier.s` contains a nice example and tests
> multiple relocations at the same time.
Will this be fixed in the main branch?
https://github.com/llvm/llvm-project/pull/13
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quic-garvgupt wrote:
Gentle Ping!
https://github.com/llvm/llvm-project/pull/121831
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https://github.com/quic-garvgupt edited
https://github.com/llvm/llvm-project/pull/134442
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@@ -534,8 +554,14 @@ void baremetal::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
CmdArgs.push_back("-Bstatic");
- if (TC.getTriple().isRISCV() && Args.hasArg(options::OPT_mno_relax))
-CmdArgs.push_back("--no-relax");
+ if (Triple.isRISCV()) {
+if (A
@@ -336,6 +336,26 @@ BareMetal::OrderedMultilibs
BareMetal::getOrderedMultilibs() const {
return llvm::reverse(Default);
}
+ToolChain::CXXStdlibType BareMetal::GetDefaultCXXStdlibType() const {
+ if (getTriple().isRISCV() && GCCInstallation.isValid())
+return ToolChain
@@ -336,6 +336,26 @@ BareMetal::OrderedMultilibs
BareMetal::getOrderedMultilibs() const {
return llvm::reverse(Default);
}
+ToolChain::CXXStdlibType BareMetal::GetDefaultCXXStdlibType() const {
+ if (getTriple().isRISCV() && GCCInstallation.isValid())
+return ToolChain
llvmbot wrote:
@llvm/pr-subscribers-clang-driver
Author: Garvit Gupta (quic-garvgupt)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/134442.diff
2 Files Affected:
- (modified) clang/lib/Driver/ToolChains/BareMetal.cpp (+8-5)
- (modified) clang/test/Driver/baremetal.
https://github.com/quic-garvgupt edited
https://github.com/llvm/llvm-project/pull/134442
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quic-garvgupt wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/134442?utm_source=stack-comment-downstack-mergeability-war
https://github.com/quic-garvgupt created
https://github.com/llvm/llvm-project/pull/134442
Change-Id: I5f3e958fe2e6032c2f8bf2206f3c7b381f799ef9
>From bf9ad08ad50f72438ade1a85dc27f32d00fe10de Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Fri, 4 Apr 2025 12:51:19 -0700
Subject: [PATCH] [RISCV
https://github.com/quic-garvgupt edited
https://github.com/llvm/llvm-project/pull/121831
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https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/121831
>From bf9ad08ad50f72438ade1a85dc27f32d00fe10de Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Fri, 4 Apr 2025 12:51:19 -0700
Subject: [PATCH 1/2] [RISCV][Driver] Add riscv emulation mode to linker job o
@@ -899,4 +899,5 @@ void test_set_fpenv(unsigned long env) {
// CHECK-DAG: [[$GRID_RANGE]] = !{i32 1, i32 0}
// CHECK-DAG: [[$WS_RANGE]] = !{i16 1, i16 1025}
-// CHECK-DAG: attributes #[[$NOUNWIND_READONLY]] = { convergent mustprogress
nocallback nofree nounwind willreturn me
Author: Snehasish Kumar
Date: 2025-04-02T22:08:33-07:00
New Revision: eec5039bb4f01dd3067fce475ff8bf65297ed4ba
URL:
https://github.com/llvm/llvm-project/commit/eec5039bb4f01dd3067fce475ff8bf65297ed4ba
DIFF:
https://github.com/llvm/llvm-project/commit/eec5039bb4f01dd3067fce475ff8bf65297ed4ba.dif
https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/121830
>From fff97c90a573aa915662288ef57e13ba901037ba Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 24 Mar 2025 04:58:57 -0700
Subject: [PATCH] [Driver] Add support for crtbegin.o, crtend.o and libgloss
https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/132808
>From 51c930864b9b6042b3ce4f480a06ca007f9932b2 Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 24 Mar 2025 07:04:59 -0700
Subject: [PATCH] [Driver] Forward sysroot from Driver to linker in BareMetal
https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/121831
>From 5f0ff967b3df20e43049701db6d2fddf6842c3d7 Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 6 Jan 2025 10:05:08 -0800
Subject: [PATCH] [RISCV] Integrate RISCV target in baremetal toolchain object
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Petar Avramovic (petar-avramovic)
Changes
Uniform S1:
Truncs to uniform S1 and AnyExts from S1 are left as is as they are meant
to be combined away. Uniform S1 ZExt and SExt are lowered using select.
Divergent S1:
Trunc of VGPR to
https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/132807
>From 547b57a0f4df485b9c5d14b20354659fd48eb919 Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 24 Mar 2025 06:49:09 -0700
Subject: [PATCH] [Driver] Add option to force udnefined symbols during linki
https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/132806
>From f93fc60cd7bddaa16c44c569ef89030ef451f7b6 Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 24 Mar 2025 06:17:42 -0700
Subject: [PATCH] [Driver] Fix link order of BareMetal toolchain object
The
https://github.com/llvmbot milestoned
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llvmbot wrote:
@labath What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/134072
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https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/133422
>From 2bd8ae1562c25fbd2273d19db59e320292595786 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Fri, 28 Mar 2025 18:01:39 +0700
Subject: [PATCH] llvm-reduce: Fix using call metadata in operands-to-args
---
.
@@ -489,22 +489,61 @@ RegBankLegalizeRules::RegBankLegalizeRules(const
GCNSubtarget &_ST,
.Uni(B32, {{SgprB32}, {Sgpr32AExtBoolInReg, SgprB32, SgprB32}});
addRulesForGOpcs({G_ANYEXT})
+ .Any({{UniS16, S1}, {{None}, {None}}}) // should be combined away
.Any
Author: dpalermo
Date: 2025-04-01T22:15:57-05:00
New Revision: 8392666bb92c87127db2ecbb85523bd64bfabcd7
URL:
https://github.com/llvm/llvm-project/commit/8392666bb92c87127db2ecbb85523bd64bfabcd7
DIFF:
https://github.com/llvm/llvm-project/commit/8392666bb92c87127db2ecbb85523bd64bfabcd7.diff
LOG:
https://github.com/inbelic closed
https://github.com/llvm/llvm-project/pull/125131
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https://github.com/skatrak approved this pull request.
Thank you Kareem, LGTM!
https://github.com/llvm/llvm-project/pull/127634
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https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/133627
>From 3e646d940a2fece2624de27e223639cd2546b694 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 24 Mar 2025 14:33:36 +0700
Subject: [PATCH] llvm-reduce: Reduce with early return of arguments
Extend the i
@@ -1336,6 +1311,59 @@ static void addPreloadKernArgHint(Function &F,
TargetMachine &TM) {
}
}
+static void checkWavesPerEU(Module &M, TargetMachine &TM) {
+ for (Function &F : M) {
+const GCNSubtarget &ST = TM.getSubtarget(F);
+
+auto FlatWgrpSizeAttr =
+A
llvmbot wrote:
@llvm/pr-subscribers-libcxx
Author: None (llvmbot)
Changes
Backport a97f73405f8e074263a0ed2dd2b8c87c014f46d9
Requested by: @ldionne
---
Full diff: https://github.com/llvm/llvm-project/pull/134435.diff
1 Files Affected:
- (modified) libcxx/include/__configuration/availab
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/133854
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Author: Alex Bradbury
Date: 2025-04-03T13:12:30+01:00
New Revision: 63bf5d531c46cbc9c1571debf285fc51463f007d
URL:
https://github.com/llvm/llvm-project/commit/63bf5d531c46cbc9c1571debf285fc51463f007d
DIFF:
https://github.com/llvm/llvm-project/commit/63bf5d531c46cbc9c1571debf285fc51463f007d.diff
@@ -5026,10 +5026,24 @@ calculateRegisterUsage(VPlan &Plan,
ArrayRef VFs,
// even in the scalar case.
RegUsage[ClassID] += 1;
} else {
+// The output from scaled phis and scaled reductions actually have
+// fewer lanes
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/133421
>From f7605bad9a66743461e4ab1e00123615f3fadfa8 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Fri, 28 Mar 2025 18:00:05 +0700
Subject: [PATCH] llvm-reduce: Fix losing fast math flags in operands-to-args
---
https://github.com/llvmbot milestoned
https://github.com/llvm/llvm-project/pull/134435
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https://github.com/ldionne updated
https://github.com/llvm/llvm-project/pull/134406
>From abb3af9e0f26cae7583efe2591fe870da7b87fa7 Mon Sep 17 00:00:00 2001
From: Louis Dionne
Date: Fri, 4 Apr 2025 11:48:46 -0400
Subject: [PATCH] [libc++] Guard additional headers with
_LIBCPP_HAS_LOCALIZATION (
@@ -5026,10 +5026,23 @@ calculateRegisterUsage(VPlan &Plan,
ArrayRef VFs,
// even in the scalar case.
RegUsage[ClassID] += 1;
} else {
+// The output from scaled phis and scaled reductions actually have
+// fewer lanes
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/133842
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kasuga-fj wrote:
Depends on #133664 (Sorry for inconvenience, I tried using
[Graphite](https://app.graphite.dev/), but it didn't work fine due to my
network problem).
https://github.com/llvm/llvm-project/pull/133665
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https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/133421
>From 1ef46ecbad539c23e95a02dd5f0a8f9f28b5865d Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Fri, 28 Mar 2025 18:00:05 +0700
Subject: [PATCH] llvm-reduce: Fix losing fast math flags in operands-to-args
---
@@ -0,0 +1,115 @@
+#include
+
+#define XXH_INLINE_ALL
+#define XXH_NO_STDLIB
+#define XXH_memcpy __builtin_memcpy
+#define XXH_memset __builtin_memset
+#define XXH_memcmp __builtin_memcmp
+#include "../xxhash.h"
+
+// EmuPAC implements runtime emulation of PAC instructions. If th
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https://github.com/petar-avramovic updated
https://github.com/llvm/llvm-project/pull/132385
>From 9f92e94f7171f9e04405dee69b0f69ea80fbeb2f Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Fri, 21 Mar 2025 13:12:11 +0100
Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for bit s
@@ -635,6 +635,13 @@ class CGDebugInfo {
llvm::DILocation *CreateTrapFailureMessageFor(llvm::DebugLoc TrapLocation,
StringRef Category,
StringRef FailureMsg);
+ /// Create a debug
https://github.com/boomanaiden154 created
https://github.com/llvm/llvm-project/pull/132642
This patch migrates the CI over to the new compute_projects.py script
for calculating what projects need to be tested based on a change to
LLVM.
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https://github.com/llvm/llvm-project/pull/132997
Backport 481a55a3d9645a6bc1540d326319b78ad8ed8db1
Requested by: @wrotki
>From e2c95b17d56f210927b9ec695126ae0d264c93e7 Mon Sep 17 00:00:00 2001
From: davidtrevelyan
Date: Thu, 13 Mar 2025 10:18:25 +
Subjec
erichkeane wrote:
> @erichkeane What do you think about merging this PR to the release branch?
I'm on the fence. It IS a regression that we should fix, and the new version
is significantly better of an implementation than we already have, but the risk
of further regression is non-zero (and on
llvmbot wrote:
@llvm/pr-subscribers-mc
Author: Kai Nacke (redstar)
Changes
The GOFF format uses symbol definitions to represent sections and symbols.
Introducing a section can require up to 3 symbol definitions. However, most of
these details are not needed by the AsmPrinter. To mapped f
https://github.com/mtrofin updated
https://github.com/llvm/llvm-project/pull/133146
>From 5579f73a4ad3d8205608eecde962257077578685 Mon Sep 17 00:00:00 2001
From: Mircea Trofin
Date: Wed, 26 Mar 2025 10:10:43 -0700
Subject: [PATCH] [ctxprof][nfc] Move 2 implementation functions up in
`CtxInstrP
https://github.com/matthias-springer edited
https://github.com/llvm/llvm-project/pull/131876
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https://github.com/ritter-x2a ready_for_review
https://github.com/llvm/llvm-project/pull/132353
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Author: Shoreshen
Date: 2025-04-01T16:24:54+08:00
New Revision: 0d0bb63b43da23bc625139c096bc2ebe8be28fbf
URL:
https://github.com/llvm/llvm-project/commit/0d0bb63b43da23bc625139c096bc2ebe8be28fbf
DIFF:
https://github.com/llvm/llvm-project/commit/0d0bb63b43da23bc625139c096bc2ebe8be28fbf.diff
LOG
@@ -0,0 +1,115 @@
+#include
+
+#define XXH_INLINE_ALL
+#define XXH_NO_STDLIB
+#define XXH_memcpy __builtin_memcpy
+#define XXH_memset __builtin_memset
+#define XXH_memcmp __builtin_memcmp
+#include "../xxhash.h"
+
+// EmuPAC implements runtime emulation of PAC instructions. If th
https://github.com/petar-avramovic created
https://github.com/llvm/llvm-project/pull/132382
Uniform S1 is lowered to S32.
Divergent S1 is selected as VCC(S1) instruction select will select
SALU instruction based on wavesize (S32 or S64).
S16 are selected as is. There are register classes for vgp
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/131862
>From bd22087405bdf669eca230dcf0656dd14b290083 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Mon, 17 Mar 2025 06:51:16 -0400
Subject: [PATCH] [SDAG] Introduce inbounds flag for pointer arithmetic
This p
@@ -2031,17 +2033,19 @@ class VPReductionPHIRecipe : public VPHeaderPHIRecipe,
/// scalar value.
class VPPartialReductionRecipe : public VPSingleDefRecipe {
unsigned Opcode;
+ unsigned ScaleFactor;
SamTebbs33 wrote:
Done.
https://github.com/llvm/llvm-proje
https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/132808
>From c5f98ad8993db4dc1386e393f8218f7e44cf9bb5 Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 24 Mar 2025 07:04:59 -0700
Subject: [PATCH] [Driver] Forward sysroot from Driver to linker in BareMetal
https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/132806
>From d74ec9a3ef550fba3f7dc9c7734c9d5bb096c288 Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 24 Mar 2025 06:17:42 -0700
Subject: [PATCH] [Driver] Fix link order of BareMetal toolchain object
The
https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/132807
>From bfba89a42967789abe53863e9dbbce84332e1596 Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 24 Mar 2025 06:49:09 -0700
Subject: [PATCH] [Driver] Add option to force udnefined symbols during linki
https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/121830
>From 7013325dc42da6df36cfeaa40e88d86592055d5a Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 24 Mar 2025 04:58:57 -0700
Subject: [PATCH] [Driver] Add support for crtbegin.o, crtend.o and libgloss
llvmbot wrote:
@llvm/pr-subscribers-mlir
Author: Matthias Springer (matthias-springer)
Changes
Check the memory space before lowering allocation ops, instead of starting the
lowering and then rolling back the pattern when the memory space was found to
be incompatible with LLVM.
Note: Th
https://github.com/matthias-springer created
https://github.com/llvm/llvm-project/pull/134427
Check the memory space before lowering allocation ops, instead of starting the
lowering and then rolling back the pattern when the memory space was found to
be incompatible with LLVM.
Note: This is i
https://github.com/carlosgalvezp updated
https://github.com/llvm/llvm-project/pull/134215
>From d868cc50a9aa0884a360c20179a8a921417d867c Mon Sep 17 00:00:00 2001
From: Carlos Galvez
Date: Thu, 3 Apr 2025 09:28:34 +0200
Subject: [PATCH] [clang-tidy] Fix broken HeaderFilterRegex when read from
c
redstar wrote:
> Thinking a bit more about this, it looks to me that we should treat SD/ED/PR
> on the one hand differently from LD (and ER) on the other. The former
> identify a range of address space and may hold contents of those ranges in
> the form of text records; the latter identify a s
https://github.com/frederick-vs-ja approved this pull request.
https://github.com/llvm/llvm-project/pull/134313
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https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/134295
Backport 2d1517d
Requested by: @Artem-B
>From b55d12882f761ecbefe488c7357b7ff55a2bd56e Mon Sep 17 00:00:00 2001
From: Austin Schuh
Date: Wed, 26 Mar 2025 13:54:58 -0700
Subject: [PATCH] cuda clang: Fix argumen
https://github.com/SamTebbs33 edited
https://github.com/llvm/llvm-project/pull/133090
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@@ -19,7 +19,7 @@
; CHECK:.quad L#PPA2-CELQSTRT * A(PPA2-CELQSTRT)
; CHECK: L#PPA1_void_test_0:
; CHECK:.long L#PPA2-L#PPA1_void_test_0 * Offset to PPA2
-; CHECK:.section"B_IDRL"
+; CHECK:.section".idrl"
MaskRay
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/133461
>From 5a549c4cdc7d452e0579608f51adeb67eff5efe7 Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Wed, 19 Mar 2025 18:58:32 +0300
Subject: [PATCH 1/4] [BOLT] Gadget scanner: analyze functions without CF
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