Author: David Spickett
Date: 2023-10-25T08:27:27Z
New Revision: 8d80a452b841a211e0f3bce01a01c9a015d287f3
URL:
https://github.com/llvm/llvm-project/commit/8d80a452b841a211e0f3bce01a01c9a015d287f3
DIFF:
https://github.com/llvm/llvm-project/commit/8d80a452b841a211e0f3bce01a01c9a015d287f3.diff
LOG
Author: David Spickett
Date: 2023-10-25T08:40:17Z
New Revision: 1d10369f534a1d8e83c847a2be86a252078f653c
URL:
https://github.com/llvm/llvm-project/commit/1d10369f534a1d8e83c847a2be86a252078f653c
DIFF:
https://github.com/llvm/llvm-project/commit/1d10369f534a1d8e83c847a2be86a252078f653c.diff
LOG
https://github.com/DavidSpickett closed
https://github.com/llvm/llvm-project/pull/69689
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https://github.com/llvm/llvm-project/pull/68094
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https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/69951
>From 5c8b9538e1e5646f19d5bb40ab19afaf2c68e804 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Mon, 9 Oct 2023 10:33:08 +0100
Subject: [PATCH 1/6] [lldb][lldb-server] Enable sending registerflags as XML
@@ -9,10 +9,16 @@
#ifndef LLDB_TARGET_REGISTERFLAGS_H
#define LLDB_TARGET_REGISTERFLAGS_H
-#include "lldb/Utility/Log.h"
+#include
+#include
+#include
+#include
DavidSpickett wrote:
string and vector are needed, presumably because RegisterFlags is a leaf
@@ -9,10 +9,16 @@
#ifndef LLDB_TARGET_REGISTERFLAGS_H
#define LLDB_TARGET_REGISTERFLAGS_H
-#include "lldb/Utility/Log.h"
+#include
DavidSpickett wrote:
Moved the assert into the cpp file and removed the include in the header.
https://github.com/llvm/llvm-pr
DavidSpickett wrote:
I'd really like to get Arm checks going again, so I'm going to land this today
and see how the bot does. Of course I'll revert if there's any sign of
instability on the BSD side.
https://github.com/llvm/llvm-project/pull/69932
__
https://github.com/DavidSpickett closed
https://github.com/llvm/llvm-project/pull/69932
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Author: David Spickett
Date: 2023-10-25T11:19:37+01:00
New Revision: 0c2501beeb372252826aab71da7691d17bc2
URL:
https://github.com/llvm/llvm-project/commit/0c2501beeb372252826aab71da7691d17bc2
DIFF:
https://github.com/llvm/llvm-project/commit/0c2501beeb372252826aab71da7691d17bc2.diff
https://github.com/DavidSpickett created
https://github.com/llvm/llvm-project/pull/70205
SME2 is documented as part of the main SME supplement:
https://developer.arm.com/documentation/ddi0616/latest/
The one change for debug is this new ZT0 register. This register
contains data to be used with
DavidSpickett wrote:
I've pushed this as two commits the first is adding the register, the second
updates tests, for easier review. I intend to squash both once approved.
This does not cover core files, that'll be the follow up PR.
https://github.com/llvm/llvm-project/pull/70205
__
Author: David Spickett
Date: 2023-10-25T13:12:37Z
New Revision: 42c25fddcb1ad7407cd42cae3c15d943708fe8ad
URL:
https://github.com/llvm/llvm-project/commit/42c25fddcb1ad7407cd42cae3c15d943708fe8ad
DIFF:
https://github.com/llvm/llvm-project/commit/42c25fddcb1ad7407cd42cae3c15d943708fe8ad.diff
LOG
https://github.com/DavidSpickett closed
https://github.com/llvm/llvm-project/pull/69951
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https://github.com/DavidSpickett created
https://github.com/llvm/llvm-project/pull/70300
The contents of which are mostly SPSR_EL1 as shown in the Arm manual, with a
few adjustments for things Linux says userspace shouldn't concern itself with.
```
(lldb) register read cpsr
cpsr = 0x800010
@@ -625,6 +662,18 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t &cached_size) {
error = ReadZA();
if (error.Fail())
return error;
+
+// We will only be restoring ZT data if ZA is active. As writing to an
+// inactive ZT enables ZA, which
https://github.com/DavidSpickett created
https://github.com/llvm/llvm-project/pull/70303
For most register sets, if it was enabled this meant you could use it, it was
present in the process. There was no present but turned off state. So "enabled"
made sense.
Then ZA came along (and soon to be
@@ -625,6 +662,18 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t &cached_size) {
error = ReadZA();
if (error.Fail())
return error;
+
+// We will only be restoring ZT data if ZA is active. As writing to an
+// inactive ZT enables ZA, which
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70205
>From 80e01960f247ab9ee06daa59d9c033fda5fc3978 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Tue, 3 Oct 2023 13:24:39 +0100
Subject: [PATCH 1/3] [lldb][AArch64] Add SME2's ZT0 register
SME2 is docume
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70205
>From 80e01960f247ab9ee06daa59d9c033fda5fc3978 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Tue, 3 Oct 2023 13:24:39 +0100
Subject: [PATCH 1/4] [lldb][AArch64] Add SME2's ZT0 register
SME2 is docume
@@ -0,0 +1,23 @@
+UNSUPPORTED: system-windows
+
+# RUN: %clang_host -g %S/Inputs/main.c -o %t
+# RUN: %lldb %t -b -o 'image lookup -r -s ma' | FileCheck %s
DavidSpickett wrote:
I should have brought this up earlier but the way you're coloring the output
doesn't
@@ -0,0 +1,23 @@
+UNSUPPORTED: system-windows
+
+# RUN: %clang_host -g %S/Inputs/main.c -o %t
+# RUN: %lldb %t -b -o 'image lookup -r -s ma' | FileCheck %s
+
+# CHECK: 3 symbols match the regular expression 'ma' in {{.*}}
+# The [[ confuses FileCheck so regex match it.
+# CHECK-NE
@@ -0,0 +1,23 @@
+UNSUPPORTED: system-windows
+
+# RUN: %clang_host -g %S/Inputs/main.c -o %t
+# RUN: %lldb %t -b -o 'image lookup -r -s ma' | FileCheck %s
+
+# CHECK: 3 symbols match the regular expression 'ma' in {{.*}}
+# The [[ confuses FileCheck so regex match it.
+# CHECK-NE
DavidSpickett wrote:
> Can you please confirm weather the test cases good for now and the future
> plan looks okay? ;)
Sounds good but see my comment about substrings vs. regex. If you go and
special case all the characters you're gonna end up reinventing a regex engine,
but you don't need to
DavidSpickett wrote:
We still have a failure on Windows after the follow ups:
```
# .---command stderr
# | Cannot create an instance of the ScriptedProcessInterface!
# | UNREACHABLE executed at
C:\Users\tcwg\david.spickett\llvm-project\lldb\include\lldb/Interpreter/Interfaces/Scripte
DavidSpickett wrote:
Somehow it is getting to:
```
virtual llvm::Expected
CreatePluginObject(llvm::StringRef class_name, ExecutionContext &exe_ctx,
StructuredData::DictionarySP args_sp,
StructuredData::Generic *script_obj = nullptr) {
llvm_unreach
DavidSpickett wrote:
Never mind, this could have been the result of using an incompatible Python
version. I'll get a stacktrace with one I know is used on the bot.
https://github.com/llvm/llvm-project/pull/68052
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Author: David Spickett
Date: 2023-10-26T16:17:14Z
New Revision: 45ccc1666c723e11d7b0148b2ef5c37c7a36e916
URL:
https://github.com/llvm/llvm-project/commit/45ccc1666c723e11d7b0148b2ef5c37c7a36e916
DIFF:
https://github.com/llvm/llvm-project/commit/45ccc1666c723e11d7b0148b2ef5c37c7a36e916.diff
LOG
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70303
>From bbcdfa3bb4844f609efabbb819444bbab02b02f8 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Thu, 26 Oct 2023 08:28:02 +
Subject: [PATCH] [lldb][AArch64][Linux] Reanme IsEnabled to
IsPresent
For
DavidSpickett wrote:
@omjavaid Any objections?
https://github.com/llvm/llvm-project/pull/70303
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https://github.com/llvm/llvm-project/pull/70300
>From 45a9d131ce6c9fb31355519cd810ceff32c05ee7 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Wed, 11 Oct 2023 14:54:07 +0100
Subject: [PATCH 1/3] [lldb][AArch64][Linux] Add field information for the C
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70300
>From 45a9d131ce6c9fb31355519cd810ceff32c05ee7 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Wed, 11 Oct 2023 14:54:07 +0100
Subject: [PATCH 1/4] [lldb][AArch64][Linux] Add field information for the C
Author: David Spickett
Date: 2023-10-27T11:24:03Z
New Revision: 02ef12dd808f19191a4d0a9f511c4e5a5dda59b5
URL:
https://github.com/llvm/llvm-project/commit/02ef12dd808f19191a4d0a9f511c4e5a5dda59b5
DIFF:
https://github.com/llvm/llvm-project/commit/02ef12dd808f19191a4d0a9f511c4e5a5dda59b5.diff
LOG
DavidSpickett wrote:
https://github.com/llvm/llvm-project/commit/02ef12dd808f19191a4d0a9f511c4e5a5dda59b5
fixes the Windows test. If the behaviour seems suspicious to you, I can check
more details of the build but I don't know anything about `Scripted...` so I'll
need you to tell me what to lo
DavidSpickett wrote:
Do you know when `importlib` was added? I wonder if the overlap is enough to
not need a fallback. We appear to advertise a 3.6 or 3.7 minimum in our
documentation, and llvm wants >=3.6
(https://llvm.org/docs/GettingStarted.html#software).
@JDevlieghere will know for sure.
Author: David Spickett
Date: 2023-10-27T15:35:15Z
New Revision: d8003d021b87485836a8f685b0ac6473069c229b
URL:
https://github.com/llvm/llvm-project/commit/d8003d021b87485836a8f685b0ac6473069c229b
DIFF:
https://github.com/llvm/llvm-project/commit/d8003d021b87485836a8f685b0ac6473069c229b.diff
LOG
DavidSpickett wrote:
Unless there are objections this is going in end of today.
https://github.com/llvm/llvm-project/pull/70303
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DavidSpickett wrote:
> Can you please confirm if passing the pointer to CommandInterpreter object in
> PrintRed function to get the use-color options a good idea?
Yes but it can be better :) See my comments.
> Are the test cases good enough and also does the future plan sounds Okay?
I suggest
https://github.com/DavidSpickett closed
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DavidSpickett wrote:
> That results in lldb having to read each register value one at a time while
> at that stop location, which will be a performance problem on non-local debug
> setups.
And given that SVE/SME size can change every time we stop, "this stop" means
"all stops". So yeah I can
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70205
>From da28585bcb47732ee54e8bd8e5b483c797f9f1d8 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Tue, 3 Oct 2023 13:24:39 +0100
Subject: [PATCH 1/4] [lldb][AArch64] Add SME2's ZT0 register
SME2 is docume
DavidSpickett wrote:
Rebased this to include the `IsPresent` change, otherwise it's the same as
before.
https://github.com/llvm/llvm-project/pull/70205
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DavidSpickett wrote:
Ping!
If you are short on time, maybe just look at `LinuxArm64RegisterFlags` which is
the core of the change. The rest is the field information itself.
https://github.com/llvm/llvm-project/pull/70300
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DavidSpickett wrote:
This passed all the tests, and I see a reduction in the packets sent for a
single step.
The value of vg is 8 and svg 4 is 4 in this case.
Before:
```
(lldb) b-remote.async> < 800> read packet:
$T05thread:p56d.56d;name:main.o;threads:56d;thread-pcs:0040056c;00:000
DavidSpickett wrote:
> Invalidate only registers we know can change size.
This one doesn't work because in changing the size of any register in the
context, you invalidate the offsets of the rest. We also cannot be sure that
the scalable registers are in a certain place in that context. Beyond
DavidSpickett wrote:
> Parse the expedited registers once, reconfigure then parse them again. On the
> assumption that no scalable register will ever be in the expedited set.
This works but due to more pessimism in:
https://github.com/llvm/llvm-project/blob/a6dabed3483c60469ff53d51622b22efc4b7
https://github.com/DavidSpickett approved this pull request.
Happy for this to land as is given that it is a strict improvement over the
current state (however weird that is).
https://github.com/llvm/llvm-project/pull/70742
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https://github.com/DavidSpickett approved this pull request.
Assuming I understand correctly that previously, the error was only consumed
when logging was enabled, this LGTM.
https://github.com/llvm/llvm-project/pull/70793
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@@ -1642,9 +1642,22 @@ ThreadSP ProcessGDBRemote::SetThreadStopInfo(
}
ThreadGDBRemote *gdb_thread = static_cast(thread_sp.get());
- RegisterContextSP gdb_reg_ctx_sp(gdb_thread->GetRegisterContext());
+ RegisterContextSP reg_ctx_sp(gdb_thread->GetRegisterContext());
-
DavidSpickett wrote:
I'm gonna merge this so I can do a patch on top of this where we both
understand the starting point. I think I've got to the bottom of the issues my
workarounds were addressing.
https://github.com/llvm/llvm-project/pull/70742
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https://github.com/llvm/llvm-project/pull/70742
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https://github.com/DavidSpickett created
https://github.com/llvm/llvm-project/pull/70914
This removes explicit invalidation of vg and svg that was done in
`GDBRemoteRegisterContext::AArch64Reconfigure`. This was in fact covering up a
bug elsehwere.
Register information says that a write to vg
DavidSpickett wrote:
And test plan here is - it passes all existing SVE/SME testing. When I simply
removed the manual invalidates, a lot of them failed, so we have coverage
already.
https://github.com/llvm/llvm-project/pull/70914
___
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https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70205
>From da28585bcb47732ee54e8bd8e5b483c797f9f1d8 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Tue, 3 Oct 2023 13:24:39 +0100
Subject: [PATCH 1/5] [lldb][AArch64] Add SME2's ZT0 register
SME2 is docume
@@ -580,7 +616,8 @@ enum RegisterSetType : uint32_t {
// Pointer authentication registers are read only, so not included here.
MTE,
TLS,
- SME, // ZA only, SVCR and SVG are pseudo registers.
+ SME, // ZA only , SVCR and SVG are pseudo registers.
DavidS
@@ -624,6 +661,21 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t &cached_size) {
error = ReadZA();
if (error.Fail())
return error;
+
+// We will only be restoring ZT data if ZA is active. As writing to an
+// inactive ZT enables ZA, which
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70205
>From da28585bcb47732ee54e8bd8e5b483c797f9f1d8 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Tue, 3 Oct 2023 13:24:39 +0100
Subject: [PATCH 1/6] [lldb][AArch64] Add SME2's ZT0 register
SME2 is docume
@@ -488,6 +508,12 @@ bool RegisterInfoPOSIX_arm64::IsSMERegZA(unsigned reg)
const {
return reg == m_sme_regnum_collection[2];
}
+bool RegisterInfoPOSIX_arm64::IsSMERegZT(unsigned reg) const {
+ // ZT0 is part of the SME register set only if SME2 is present.
+ return m_sme
https://github.com/DavidSpickett approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/70918
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DavidSpickett wrote:
>I think of old teenage mutant ninja turtles
No ninjas over here, only heroes :)
https://github.com/llvm/llvm-project/pull/70205
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https://github.com/DavidSpickett created
https://github.com/llvm/llvm-project/pull/70934
The ZT0 register is always 64 bytes in size so it is a lot easier to handle
than ZA which is scalable. In addition, reading an inactive ZT0 via ptrace
returns all 0s, unlike ZA which returns no register da
https://github.com/DavidSpickett created
https://github.com/llvm/llvm-project/pull/70935
ZT0 is much like ZA apart from not being scalable, so there's not much new to
cover.
>From 6ee6e1cf98f442e82f1e4aa408ac0a2e30ac6161 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Mon, 9 Oct 2023 09:0
https://github.com/DavidSpickett created
https://github.com/llvm/llvm-project/pull/70950
This removes AArch64 specific code from the GDB* classes.
To do this I've added 2 new methods to Architecture:
* RegisterWriteCausesReconfigure to check if what you are about to do
will trash the register
DavidSpickett wrote:
The first commit here is actually
https://github.com/llvm/llvm-project/pull/70914, so review the second one (or
wait until the first lands and I'll rebase this).
This is to answer @medismailben 's question about why GDB classes had AArch64
specific code in them. They don'
DavidSpickett wrote:
Tested on AArch64 Linux without SVE, and on a Graviton 3 with SVE. Which also
survived repeatedly running the SVE dynamic resize test. Which it should,
nothing is changing here apart from the layout of the source code.
https://github.com/llvm/llvm-project/pull/70950
__
@@ -1642,9 +1642,22 @@ ThreadSP ProcessGDBRemote::SetThreadStopInfo(
}
ThreadGDBRemote *gdb_thread = static_cast(thread_sp.get());
- RegisterContextSP gdb_reg_ctx_sp(gdb_thread->GetRegisterContext());
+ RegisterContextSP reg_ctx_sp(gdb_thread->GetRegisterContext());
-
DavidSpickett wrote:
That's correct. Given how much churn this logic has had, I wanted to keep the
changes clearly separated (for when I inevitably realise it's still not quite
right :) ).
https://github.com/llvm/llvm-project/pull/70914
___
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@@ -762,82 +756,22 @@ uint32_t
GDBRemoteRegisterContext::ConvertRegisterKindToRegisterNumber(
return m_reg_info_sp->ConvertRegisterKindToRegisterNumber(kind, num);
}
-void GDBRemoteRegisterContext::AArch64Reconfigure() {
- assert(m_reg_info_sp);
-
- // Once we start to re
@@ -93,6 +93,10 @@ class DynamicRegisterInfo {
return llvm::iterator_range(m_regs);
}
+ llvm::iterator_range registers_mutable() {
DavidSpickett wrote:
Wouldn't that have to overload on return type? I didn't think that was possible.
https://github.com
@@ -762,82 +756,22 @@ uint32_t
GDBRemoteRegisterContext::ConvertRegisterKindToRegisterNumber(
return m_reg_info_sp->ConvertRegisterKindToRegisterNumber(kind, num);
}
-void GDBRemoteRegisterContext::AArch64Reconfigure() {
- assert(m_reg_info_sp);
-
- // Once we start to re
https://github.com/DavidSpickett closed
https://github.com/llvm/llvm-project/pull/70914
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https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70950
>From 47a48746a8a8f8e37d12a2d38a30dbfa52d5c645 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Wed, 1 Nov 2023 13:41:54 +
Subject: [PATCH] [lldb][AArch64] Move register info reconfigure into
archit
@@ -109,6 +110,24 @@ class Architecture : public PluginInterface {
virtual const MemoryTagManager *GetMemoryTagManager() const {
return nullptr;
}
+
+ // This returns true if a write to the named register should cause lldb to
+ // reconfigure its register information.
@@ -762,82 +756,22 @@ uint32_t
GDBRemoteRegisterContext::ConvertRegisterKindToRegisterNumber(
return m_reg_info_sp->ConvertRegisterKindToRegisterNumber(kind, num);
}
-void GDBRemoteRegisterContext::AArch64Reconfigure() {
- assert(m_reg_info_sp);
-
- // Once we start to re
@@ -93,6 +93,10 @@ class DynamicRegisterInfo {
return llvm::iterator_range(m_regs);
}
+ llvm::iterator_range registers_mutable() {
DavidSpickett wrote:
Still not sure here, I guess you could pass a reference to an iterator to be
set, then overload on
@@ -762,82 +756,22 @@ uint32_t
GDBRemoteRegisterContext::ConvertRegisterKindToRegisterNumber(
return m_reg_info_sp->ConvertRegisterKindToRegisterNumber(kind, num);
}
-void GDBRemoteRegisterContext::AArch64Reconfigure() {
- assert(m_reg_info_sp);
-
- // Once we start to re
@@ -373,14 +374,8 @@ bool GDBRemoteRegisterContext::WriteRegisterBytes(const
RegisterInfo *reg_info,
if (dst == nullptr)
return false;
- // Code below is specific to AArch64 target in SVE or SME state
- // If vector granule (vg) register is being written then thread's
DavidSpickett wrote:
This got rebased to include https://github.com/llvm/llvm-project/pull/70914 so
there is just 1 commit now.
Comments probably got shuffled so feel free to repeat anything I missed.
https://github.com/llvm/llvm-project/pull/70950
_
https://github.com/DavidSpickett commented:
Apparently I didn't submit the last set of review comments sorry about that.
The one about vector is the key one this time.
https://github.com/llvm/llvm-project/pull/69422
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https://github.com/llvm/llvm-project/pull/69422
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@@ -0,0 +1,31 @@
+UNSUPPORTED: system-windows
+
+# RUN: %clang_host -g %S/Inputs/main.c -o %t
DavidSpickett wrote:
If you can, a test where the regular expression matches at the very end of the
name would be a good addition.
This would check the tail end of you
DavidSpickett wrote:
Oh and good work on the updates! (because that feedback is probably hard to see
with all these comments :) )
https://github.com/llvm/llvm-project/pull/69422
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@@ -1,6 +1,7 @@
# RUN: yaml2obj %S/Inputs/symbols.yaml -o %t
# RUN: %lldb %t -b -o "target modules lookup -A -r -s some" | FileCheck %s
-DMODULE=%basename_t.tmp --implicit-check-not ignoreThisFunction
+
DavidSpickett wrote:
Undo the unrelated changes in this
@@ -1506,13 +1514,50 @@ static bool LookupAddressInModule(CommandInterpreter
&interpreter, Stream &strm,
ExecutionContextScope *exe_scope =
interpreter.GetExecutionContext().GetBestExecutionContextScope();
-DumpAddress(exe_scope, so_addr, verbose, all_ranges,
https://github.com/DavidSpickett edited
https://github.com/llvm/llvm-project/pull/69422
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@@ -247,7 +247,17 @@ class Address {
bool Dump(Stream *s, ExecutionContextScope *exe_scope, DumpStyle style,
DumpStyle fallback_style = DumpStyleInvalid,
uint32_t addr_byte_size = UINT32_MAX,
-bool all_ranges = false) const;
+bo
@@ -1506,13 +1514,50 @@ static bool LookupAddressInModule(CommandInterpreter
&interpreter, Stream &strm,
ExecutionContextScope *exe_scope =
interpreter.GetExecutionContext().GetBestExecutionContextScope();
-DumpAddress(exe_scope, so_addr, verbose, all_ranges,
@@ -0,0 +1,31 @@
+UNSUPPORTED: system-windows
+
+# RUN: %clang_host -g %S/Inputs/main.c -o %t
+# RUN: %lldb %t -b -o 'settings set use-color true' -o 'image lookup -r -s ma'
| FileCheck %s --check-prefix CHECK1
+
+# CHECK1: 3 symbols match the regular expression 'ma' in {{.*}}
+#
@@ -0,0 +1,31 @@
+UNSUPPORTED: system-windows
+
+# RUN: %clang_host -g %S/Inputs/main.c -o %t
DavidSpickett wrote:
Also just for sanity checking, add one where you don't match anything at all.
It shouldn't do any matching or even attempt to, so the test would ju
@@ -247,7 +247,17 @@ class Address {
bool Dump(Stream *s, ExecutionContextScope *exe_scope, DumpStyle style,
DumpStyle fallback_style = DumpStyleInvalid,
uint32_t addr_byte_size = UINT32_MAX,
-bool all_ranges = false) const;
+bo
@@ -0,0 +1,31 @@
+UNSUPPORTED: system-windows
+
+# RUN: %clang_host -g %S/Inputs/main.c -o %t
+# RUN: %lldb %t -b -o 'settings set use-color true' -o 'image lookup -r -s ma'
| FileCheck %s --check-prefix CHECK1
+
+# CHECK1: 3 symbols match the regular expression 'ma' in {{.*}}
+#
@@ -339,6 +337,18 @@ bool RegisterContextCorePOSIX_arm64::ReadRegister(const
RegisterInfo *reg_info,
value.SetFromMemoryData(*reg_info, src + sizeof(sve::user_za_header),
reg_info->byte_size, lldb::eByteOrderLittle,
@@ -1506,13 +1514,50 @@ static bool LookupAddressInModule(CommandInterpreter
&interpreter, Stream &strm,
ExecutionContextScope *exe_scope =
interpreter.GetExecutionContext().GetBestExecutionContextScope();
-DumpAddress(exe_scope, so_addr, verbose, all_ranges,
https://github.com/DavidSpickett edited
https://github.com/llvm/llvm-project/pull/70934
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@@ -1506,13 +1514,50 @@ static bool LookupAddressInModule(CommandInterpreter
&interpreter, Stream &strm,
ExecutionContextScope *exe_scope =
interpreter.GetExecutionContext().GetBestExecutionContextScope();
-DumpAddress(exe_scope, so_addr, verbose, all_ranges,
https://github.com/DavidSpickett closed
https://github.com/llvm/llvm-project/pull/70934
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@@ -1506,13 +1514,50 @@ static bool LookupAddressInModule(CommandInterpreter
&interpreter, Stream &strm,
ExecutionContextScope *exe_scope =
interpreter.GetExecutionContext().GetBestExecutionContextScope();
-DumpAddress(exe_scope, so_addr, verbose, all_ranges,
@@ -1506,13 +1514,50 @@ static bool LookupAddressInModule(CommandInterpreter
&interpreter, Stream &strm,
ExecutionContextScope *exe_scope =
interpreter.GetExecutionContext().GetBestExecutionContextScope();
-DumpAddress(exe_scope, so_addr, verbose, all_ranges,
https://github.com/DavidSpickett approved this pull request.
LGTM, thanks!
https://github.com/llvm/llvm-project/pull/71081
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