Author: David Spickett Date: 2023-10-25T13:12:37Z New Revision: 42c25fddcb1ad7407cd42cae3c15d943708fe8ad
URL: https://github.com/llvm/llvm-project/commit/42c25fddcb1ad7407cd42cae3c15d943708fe8ad DIFF: https://github.com/llvm/llvm-project/commit/42c25fddcb1ad7407cd42cae3c15d943708fe8ad.diff LOG: [lldb][docs][AArch64] Update example in SME docs This output has now changed because I moved the za register into the main SME register set. Added: Modified: lldb/docs/use/aarch64-linux.rst Removed: ################################################################################ diff --git a/lldb/docs/use/aarch64-linux.rst b/lldb/docs/use/aarch64-linux.rst index 707087a9bd72ea2..fcd0d1b805bf7df 100644 --- a/lldb/docs/use/aarch64-linux.rst +++ b/lldb/docs/use/aarch64-linux.rst @@ -146,12 +146,10 @@ as ``vg`` is showing the streaming mode vector length:: tpidr = 0x0000fffff7ff4320 tpidr2 = 0x1122334455667788 - Scalable Matrix Array Storage Registers: - za = {0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 <...> } - Scalable Matrix Extension Registers: svg = 0x0000000000000002 svcr = 0x0000000000000003 + za = {0x00 <...> 0x00} Changing the Streaming Vector Length .................................... _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
