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Previously if a register had fields we would always print them after the
value if the register was asked for by
DavidSpickett updated this revision to Diff 515271.
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Use the getter for the format value instead of adding a WasSet to the group
class.
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DavidSpickett added a comment.
One alternative was to come up with a list of formats where printing fields
afterwards makes sense. Hex makes sense, instruction does not. However it would
be hard to judge and it doesn't solve the main issue where you want to see what
you asked for without extras
DavidSpickett resigned from this revision.
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This is probably an obvious change, but I have no experience with this area so
I don't feel comfortable approving.
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dispayed -> displayed
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I don't know enough to approve, Omair is the expert here.
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DavidSpickett added a comment.
> None of this should change behavior on linux, but if folks from the linux
> world have a comment or reaction to this change, I would be interested to
> hear opinions. I haven't done much testing beyond the one test corefile, and
> I still need to work out how th
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This register is used as the pointer to the current thread
local stora
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The Scalable Matrix Extension (SME) does not req
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Strictly you could just use `--sve`, but it's nice to have an explicit option.
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DavidSpickett added a comment.
If you wanted to indent the long strings to the same level as the function's
code you could use
https://docs.python.org/3/library/textwrap.html#textwrap.dedent (but it's fine
as is).
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DavidSpickett updated this revision to Diff 530880.
DavidSpickett added a comment.
Correct size getter in read method. This just happened to work because the MTE
set also contains one register.
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This revision is now accepted and ready to land.
I'm curious how you would end up with a signed PC value, but given this is
unwind it could be a value from a previous frame that was signed when stored to
the stack.
LGTM.
Rep
DavidSpickett accepted this revision.
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This revision is now accepted and ready to land.
LGTM. Sinking the whole `if abi` dance into these methods will clean up a lot.
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This adds a new command that will show all the information lldb
knows about a register.
(lldb) register info
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This will be used by the "register info" command to show
the layout of register contents. For example if we have
DavidSpickett added a comment.
I'm aware we likely have 10s of adhoc table printing functions across llvm and
I'm surprised someone hasn't unified them yet. Which is to say, today I am not
that person though I would like to collect a list of places that could benefit
from it.
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This teaches DumpRegisterInfo to generate a table from the register
flags type. It just calls a method on Regist
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Comment at: lldb/source/Core/DumpRegisterInfo.cpp:84
+
+void lldb_private::DoDumpRegisterInfo(
+Stream &strm, const char *name, const char *alt_name, uint32_t byte_size,
--
DavidSpickett added a comment.
I think "info" is a fairly safe name for this command. I thought about
"register help" but then you could do "help register help" and while that's
amusing it's also pretty silly.
You might think at a glance "info" does something like check the register's
value fo
DavidSpickett added a comment.
This is the major use case for the command. With these diagrams matching the
architecture manual (mostly) you can use them to work out what mask/shift you
need. You'll be able to print a register, see that the field isn't the right
value, then "register info" and
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This revision is now accepted and ready to land.
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LGTM, thanks!
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DavidSpickett added a comment.
TIL what gcore is. One can save a corefile from within lldb too, I assume
you've checked what that does (and with this change, it wouldn't matter either
way).
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Comment at:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp:286
src = (uint8_t *)GetMTEControl() + offset;
+ } else if (IsTLS(reg)) {
+error = ReadTLSTPIDR();
--
DavidSpickett added a comment.
I assume
https://github.com/llvm/llvm-project/commit/244fcecb90fa7a3fb710ca5768d3bae9af5868cc
already fixed this. It fixed the bot and there's no failures currently.
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Sure, what name and email address should go on the commit?
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DavidSpickett updated this revision to Diff 532146.
DavidSpickett added a comment.
This revision is now accepted and ready to land.
Move if up to before SVE registers.
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DavidSpickett updated this revision to Diff 532156.
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Always add the TLS regset mask value. It worked on my QEMU setup because
it also had the other extensions, but an armv8-a machine didn't.
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Also found that clang at -00 will only read tpidr once vs. the gcc I had that
would read it fresh each time. I can't rely on either of those to happen, so
will change the test to use assembly to directly read and writ
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Done, thanks for the contribution!
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DavidSpickett updated this revision to Diff 532589.
DavidSpickett added a comment.
This revision is now accepted and ready to land.
Change test so that we're reading with assembly and writing with lldb and
vice versa. Instead of trying to get clever and actually move the thread
storage about.
R
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DavidSpickett marked 2 inline comments as done.
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Sorry I missed the comments before landing, I've addressed those in
https://github.com/llvm/llvm-project/commit/c7759df03825f63f8334d88c9525d655acfab685.
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While looking at https://github.com/llvm/llvm-project/issues/61955
I noticed that when we send qLaunchGDBServer
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I was about to say I don't have a way to test this but I think I might have now.
Starting a platform, then moving lldb-server causes it to fail on Linux.
Perhaps I can do that in an isolated way in a shell
DavidSpickett updated this revision to Diff 533534.
DavidSpickett added a comment.
Added a test from Python, which avoids a bunch of lit and Linux shell specific
issues.
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DavidSpickett added a comment.
In the bug report the user didn't have a debugserver on the remote, but the
handling is the same for lldb-server or debugserver.
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Previously lldb was using arr
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DavidSpickett added a comment.
This assumes that the usual use case is:
- Make a small vector.
- Resize it to what you need.
- Use the content like an array.
Every case I found matched that but still, it's not the safest API ever. So
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This fixes #62068.
After 8d1de7b34af46a089eb5433c700419ad9b2923ee
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https://github.com/llvm/llvm-project/issues/62068
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DavidSpickett added a comment.
> The sanitized bot on GreenDragon runs on Intel and I assume the "risky'
> changes only apply to arm64 as that's the only architecture that needs to
> scale beyond the default 256? Anyway I haven't seen the leaks issue you've
> mentioned locally so I'm happy to r
DavidSpickett updated this revision to Diff 534580.
DavidSpickett added a comment.
Make a resize in EmulateInstructionARM64::EmulateLDPSTP uncondintional.
Though in this case the register for an ldp/stp could only be an x register
which is 8 bytes, so there would have been enough allocated alread
DavidSpickett updated this revision to Diff 534596.
DavidSpickett added a comment.
Drop {} in one place now that the resize is not conditional. The logic
there also seems faulty, but in other ways I will stay out of for now.
I did attempt another sanitizers build and realised I should have been
s
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DavidSpickett added a comment.
Do you or anyone else have a Mac they can reproduce this on? I don't. I know it
works on Linux so far, unfortunately our Windows bot is down temporarily. I
looked around similar tests and didn't see any skips for Mac.
Sometimes the packet log will tell us more, I
DavidSpickett added inline comments.
Comment at: lldb/source/Commands/CommandObjectPlatform.cpp:1232
+
+assert(launch_info.GetHijackListener());
+
This assert fails on Linux. Is it necessary or should I look into why it's null
here on Linux?
WaitForProc
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Thanks for testing and fixing this.
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DavidSpickett added inline comments.
Comment at: lldb/source/Commands/CommandObjectPlatform.cpp:1232
+
+assert(launch_info.GetHijackListener());
+
DavidSpickett wrote:
> This assert fails on Linux. Is it necessary or should I look into why it's
> null he
DavidSpickett added inline comments.
Comment at:
lldb/test/API/commands/platform/process/launch/TestPlatformProcessLaunch.py:50
+self.runCmd("settings set target.run-args D E")
+self.runCmd("platform process launch --stdout {}".format(outfile))
+self.runC
DavidSpickett added a comment.
Relanded as
https://github.com/llvm/llvm-project/commit/728101f97286c1665814e74686c083a4d5ff208c.
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ping!
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DavidSpickett added a comment.
Some random comments, I'll leave the real review to the VSCode experts.
Comment at: lldb/tools/lldb-vscode/JSONUtils.h:239
+/// useful to ensure the same column provided by the setBreakpoints request
+/// are returned to the IDE as a fallb
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During __do_global_dtors_aux glibc sets a flag that is right
next to t
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Running this on Amazon Ubuntu the final backtrace is:
(lldb) thread
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This test previously ran on QEMU or A64FX both of which can/d
DavidSpickett added a comment.
> I suspect that's what most people using write watchpoints would actually
> want, outside of this issue of false watchpoint hits.
Seems like the sensible route.
The other option is understanding every instruction's behaviour, which is in
theory possible but I wo
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Previously the following would crash:
(lldb) run
Process 25940
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Comment at: lldb/test/API/functionalities/completion/TestCompletion.py:782
self.complete_from_to("register write rbx ", [])
def test_common_completion_target_stophook_ids(sel
DavidSpickett updated this revision to Diff 537021.
DavidSpickett added a comment.
Added register info to the x86 test cases.
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htt
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Changed prior to commit:
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Repositor
DavidSpickett added inline comments.
Comment at:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp:451
Status NativeRegisterContextLinux_arm64::ReadAllRegisterValues(
lldb::DataBufferSP &data_sp) {
omjavaid wrote:
> DavidSpickett wro
DavidSpickett added a comment.
Hopefully in the future we can get some kind of smarter container for this
register data in future but this looks good for now with a few extra comments
for the logic of it. (and so we know where to make changes later)
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DavidSpickett added a comment.
Maybe I can help a little with the error code approach/add on.
lldb communicates to lldb-server using gdb-remote packets, you can enable
logging of these with `log enable gdb-remote packets`. If you're running on the
same machine, lldb will start an lldb-server in
DavidSpickett accepted this revision.
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This revision is now accepted and ready to land.
Apologies, I forgot about this for way too long. I don't think Omair is going
to object anyway so let's get this in.
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Asking for review to double check. Nothing in lldb upstream calls this and I
think that's because we switched to a style where we ask to attach then have a
callback that will tell u
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This revision is now accepted and ready to land.
LGTM with the clang-format warning fixed.
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This revision is now accepted and ready to land.
LGTM
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https://docs.microsoft.com/en-us/cpp/intrinsics/debugbreak?view=msvc-160
confirms the AArch64 breakpoint instruction, were you able to find a source for
the Arm/Thumb one?
Otherwise the logic seems fine. It would be g
DavidSpickett added a comment.
> I don't have a formal source for that one, but compiling a __debugbreak()
> with MSVC produces that opcode. As Windows is thumb-only, we can always do a
> breakpoint with that single opcode (even if the targeted instruction happens
> to be a wide thumb2 instruct
DavidSpickett added a comment.
One thing that I forgot to ask, are there already tests that cover the scenario
the bug reported?
Good chance there are but they only run on x86 due to the available bots. We
(Linaro) are working to get more tests running on WoA bots so this would be
covered even
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This adds an option to the memory region command
to print all regions at once. Like you can do by
starting a
DavidSpickett added a comment.
I've seen commands print that they are an alias automatically:
(lldb) help rbreak
Sets a breakpoint or set of breakpoints in the executable.
Syntax: rbreak
<...>
'rbreak' is an abbreviation for 'breakpoint set -r %1'
Is this not the case for reg
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This adds a specific unwind plan for AArch64 Linux sigreturn frames.
Previously we assumed t
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Comment at: lldb/source/Symbol/AArch64UnwindInfo.cpp:40
+ // [1]
+ // https://github.com/torvalds/linux/blob/master/arch/arm64/kernel/signal.c
+ int32_t offs
DavidSpickett added a reviewer: DavidSpickett.
DavidSpickett added inline comments.
Comment at: lldb/packages/Python/lldbsuite/test/lldbtest.py:1284
compiler = self.getCompilerBinary()
-version_output = system([[compiler, "--version"]])
-for line in versi
DavidSpickett added inline comments.
Comment at: lldb/packages/Python/lldbsuite/test/lldbtest.py:1422
+def runBuildCommands(self, commands):
+for cmd in commands:
+self.trace(shlex.join(cmd))
Is this ever going to have more than one comman
DavidSpickett added a comment.
> Creating a new Platform entry point to provide the unwind plan (or somehow
> refactoring the GetTrapHandlerSymbolNames so that it can also provide an
> unwind plan)
Makes sense, I'll try that.
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DavidSpickett added inline comments.
Comment at: lldb/source/Symbol/AArch64UnwindInfo.cpp:58
+ unwind_plan_sp->SetSourcedFromCompiler(eLazyBoolYes);
+ unwind_plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);
+ unwind_plan_sp->SetUnwindPlanForSignalTrap(eLazyBoolYes);
DavidSpickett updated this revision to Diff 382287.
DavidSpickett added a comment.
Set ValidAtAllInstructions.
Move building unwind plan into PlatformLinux and add a platform method
to lookup unwind plans for signal handlers. I'm still checking architecture
in PlatformLinux but it does move the c
DavidSpickett added inline comments.
Comment at: lldb/source/Plugins/Platform/Linux/PlatformLinux.cpp:258
+ UnwindPlanSP unwind_plan_sp;
+ if (name != "__kernel_rt_sigreturn")
+return unwind_plan_sp;
PlatformLinux lists 3 handlers:
* _sigtramp
* __kernel_rt
DavidSpickett updated this revision to Diff 382354.
DavidSpickett added a comment.
Set SP not FP based on the sigcontext.
Before, the SP of the frame before sigcontext would be incorrect.
(noticed while testing alt signal stacks)
This was already done in the libunwind change but I got them mixed
DavidSpickett updated this revision to Diff 382575.
DavidSpickett added a comment.
Turns out comparing thread.get_thread_frames() doesn't work because
you end up getting references to the same frames. Instead save the info
we want to compare.
One obvious reason this tactic should have failed is t
DavidSpickett added a comment.
> Thanks for doing this. Just a couple of comments inline.
Will respond to these shortly.
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https://reviews.llvm.org/D112069/new/
https://reviews.llvm.org/D112069
__
DavidSpickett updated this revision to Diff 382590.
DavidSpickett added a comment.
Use generic register names and don't set type to DWARF.
Pass triple instead of machine and use isAArch64.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D112069/new/
DavidSpickett updated this revision to Diff 382591.
DavidSpickett added a comment.
Update comment.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D112069/new/
https://reviews.llvm.org/D112069
Files:
lldb/include/lldb/Target/Platform.h
lldb/sourc
DavidSpickett added a comment.
> One way to demonstrate (and test) this would be to have a bit of inline asm,
> which sets all registers to known values, and then raises a signal (SIGILL is
> probably the easiest to raise from asm).
I will give that a go, probably as a separate test case.
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