https://github.com/jayfoad closed
https://github.com/llvm/llvm-project/pull/134092
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jayfoad wrote:
> Please try not to create big PRs that are crossing subproject boundaries,
> you'll have a hard time finding a reviewer will to sign off of a patch that
> Rouches other parts of the project. 10 small/trivial PRs are less work for
> the reviewers than one big one.
Fair enough.
https://github.com/jayfoad created
https://github.com/llvm/llvm-project/pull/134092
None
>From 10ab02a61b5e2ec3f58a12c78e7b3b989a349a8f Mon Sep 17 00:00:00 2001
From: Jay Foad
Date: Wed, 2 Apr 2025 15:35:32 +0100
Subject: [PATCH] Fix typos: paramter, parametr, parametere
---
bolt/utils/bughu
https://github.com/jayfoad closed
https://github.com/llvm/llvm-project/pull/122880
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https://github.com/jayfoad created
https://github.com/llvm/llvm-project/pull/122880
None
>From d9a92edae5d021eed39acbdb22fa195dff78315d Mon Sep 17 00:00:00 2001
From: Jay Foad
Date: Tue, 14 Jan 2025 10:00:41 +
Subject: [PATCH] [llvm-project] Fix typos mutli and mutliple. NFC.
---
.../cla
https://github.com/jayfoad closed
https://github.com/llvm/llvm-project/pull/112899
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https://github.com/jayfoad created
https://github.com/llvm/llvm-project/pull/112899
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>From 3a3b67f30cde766adaede4cc53bec340fbe5d99f Mon Sep 17 00:00:00 2001
From: Jay Foad
Date: Fri, 18 Oct 2024 13:53:51 +0100
Subject: [PATCH] Fix typo "instrinsic"
---
clang/utils/TableGen/RISCVVEmitter.
https://github.com/jayfoad closed
https://github.com/llvm/llvm-project/pull/109656
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https://github.com/jayfoad created
https://github.com/llvm/llvm-project/pull/109656
This will be used in ASTContext::getTypeInfo which needs this
information for all builtin types, not just pointers.
>From 0ef4ea17a711a1ee95080bc1635ae9aa824df596 Mon Sep 17 00:00:00 2001
From: Jay Foad
Date:
https://github.com/jayfoad closed
https://github.com/llvm/llvm-project/pull/95373
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https://github.com/jayfoad created
https://github.com/llvm/llvm-project/pull/95373
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>From 6d326a96d2651f8836b29ff1e3edef022f41549e Mon Sep 17 00:00:00 2001
From: Jay Foad
Date: Thu, 13 Jun 2024 09:46:48 +0100
Subject: [PATCH] [llvm-project] Fix typo "seperate"
---
clang-tools-extra/clang
jayfoad wrote:
AMDGPU changes are fine.
https://github.com/llvm/llvm-project/pull/90391
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https://github.com/jayfoad approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/79104
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@@ -1348,6 +1348,14 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo
&Info,
MachineMemOperand::MOVolatile;
return true;
}
+ case Intrinsic::amdgcn_global_load_tr: {
jayfoad wrote:
This case should also be handled in getAdrMo
jayfoad wrote:
Can you add a GFX12 RUN line to
clang/test/CodeGenOpenCL/builtins-amdgcn-fp8.cl? That will probably require
adding "fp8-conversion-insts" to the GFX12 part of TargetParser.cpp. You can do
this in a separate patch if you want.
https://github.com/llvm/llvm-project/pull/78414
https://github.com/jayfoad closed
https://github.com/llvm/llvm-project/pull/77470
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https://github.com/jayfoad updated
https://github.com/llvm/llvm-project/pull/77470
>From ae231d88c5b5e2e0996edefd45389992f8e97d05 Mon Sep 17 00:00:00 2001
From: Jay Foad
Date: Tue, 9 Jan 2024 13:16:24 +
Subject: [PATCH 1/3] [AMDGPU] Precommit tests for broken combine
Add tests for sign-ext
https://github.com/jayfoad closed
https://github.com/llvm/llvm-project/pull/76149
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jayfoad wrote:
Ping!
https://github.com/llvm/llvm-project/pull/76149
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https://github.com/jayfoad updated
https://github.com/llvm/llvm-project/pull/76149
>From b14a554a15e4de88c9afc428f9c6898090e6eb23 Mon Sep 17 00:00:00 2001
From: Jay Foad
Date: Thu, 21 Dec 2023 12:00:26 +
Subject: [PATCH] [AMDGPU] GFX12 global_atomic_ordered_add_b64 instruction and
intrinsi
jayfoad wrote:
> > How does this work in a case like this?
> > ```
> > call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, ptr
> > addrspace(3) @lds.3, i32 4, i32 0, i32 0, i32 0, i32 0)
> > call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, ptr
> > addrspace(3) %ptr, i32 4, i3
jayfoad wrote:
How does this work in a case like this?
```
call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, ptr addrspace(3)
@lds.3, i32 4, i32 0, i32 0, i32 0, i32 0)
call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, ptr addrspace(3)
%ptr, i32 4, i32 0, i32 0, i32 0, i32 0
@@ -3164,6 +3164,18 @@ def : GCNPat <
(as_i1timm $bound_ctrl))
>;
+class SMPrefetchGetPcPat : GCNPat <
jayfoad wrote:
This pattern also interprets the "address" argument as being an offset from PC,
so it should also be removed from th
@@ -684,6 +684,51 @@ s_rndne_f16 s5, 0xfe0b
s_rndne_f16 s5, 0x3456
// GFX12: encoding: [0xff,0x6e,0x85,0xbe,0x56,0x34,0x00,0x00]
+s_barrier_signal -2
jayfoad wrote:
Missing `s_get_barrier_state` tests in this file?
https://github.com/llvm/llvm-project/pull/7
@@ -0,0 +1,154 @@
+; RUN: llc -march=amdgcn -mcpu=gfx900 < %s | FileCheck %s
--check-prefixeses=GCN,GFX9
+; RUN: llc -march=amdgcn -mcpu=gfx1030 < %s | FileCheck %s
--check-prefixeses=GCN,GFX10
jayfoad wrote:
> --check-prefixeses
That's what happens when you e
https://github.com/jayfoad closed
https://github.com/llvm/llvm-project/pull/74863
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https://github.com/jayfoad updated
https://github.com/llvm/llvm-project/pull/74863
>From e406c734609d3cd1ae436084c42c1c63d8af2795 Mon Sep 17 00:00:00 2001
From: Jay Foad
Date: Fri, 8 Dec 2023 14:08:09 +
Subject: [PATCH 1/2] [GlobalISel] Add G_PREFETCH
---
.../CodeGen/GlobalISel/MachineIRB
@@ -959,6 +967,32 @@ def : GCNPat <
}
} // let OtherPredicates = [HasShaderCyclesRegister]
+def SIMM24bitPtr : ImmLeaf (Imm);}]
+>;
+
+multiclass SMPrefetchPat {
+ def : GCNPat <
+(smrd_prefetch (SMRDImm i64:$sbase, i32:$offset), timm, timm, (i32
cache_type)),
+(!cas
@@ -959,6 +967,32 @@ def : GCNPat <
}
} // let OtherPredicates = [HasShaderCyclesRegister]
+def SIMM24bitPtr : ImmLeaf (Imm);}]
+>;
+
+multiclass SMPrefetchPat {
+ def : GCNPat <
+(smrd_prefetch (SMRDImm i64:$sbase, i32:$offset), timm, timm, (i32
cache_type)),
+(!cas
https://github.com/jayfoad closed
https://github.com/llvm/llvm-project/pull/74616
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https://github.com/jayfoad updated
https://github.com/llvm/llvm-project/pull/74616
>From 69580e5f77514fecf0aabe2a80c98881f9bd7288 Mon Sep 17 00:00:00 2001
From: Jay Foad
Date: Tue, 7 Feb 2023 16:27:27 +
Subject: [PATCH 1/2] [AMDGPU] Add GFX12 encoding for VINTERP instructions
---
.../Disa
https://github.com/jayfoad updated
https://github.com/llvm/llvm-project/pull/74616
>From 69580e5f77514fecf0aabe2a80c98881f9bd7288 Mon Sep 17 00:00:00 2001
From: Jay Foad
Date: Tue, 7 Feb 2023 16:27:27 +
Subject: [PATCH 1/2] [AMDGPU] Add GFX12 encoding for VINTERP instructions
---
.../Disa
jayfoad wrote:
Typo in subject "**Guard** return ..."?
https://github.com/llvm/llvm-project/pull/71989
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https://github.com/jayfoad closed
https://github.com/llvm/llvm-project/pull/70644
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https://github.com/llvm/llvm-project/pull/70644
>From bfc7b2041f5a05105808b0b1ee0427d9c9eb9f4b Mon Sep 17 00:00:00 2001
From: Jay Foad
Date: Mon, 30 Oct 2023 15:23:48 +
Subject: [PATCH 1/4] Precommit test
---
.../AMDGPU/fix-sgpr-copies-nondeterminism.ll
https://github.com/jayfoad closed
https://github.com/llvm/llvm-project/pull/69355
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jayfoad wrote:
I've taken another look at this. The patch does not show any benefit from
running another `SIFoldOperands` pass _after_ `SIShrinkInstructions` per se;
you get exactly the same results (modulo a couple of add instructions that have
their operands commuted differently) if you put
jayfoad wrote:
I've just tested this on 1 graphics shaders and it seems to make no
difference at all. I tried gfx900 and gfx1100. Can anyone else from the
graphics team confirm this?
https://github.com/llvm/llvm-project/pull/67878
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lldb-commit
Author: Jay Foad
Date: 2023-01-23T12:28:06Z
New Revision: 291a7fcf70db4d45c24b559fc867d3499b2e1e04
URL:
https://github.com/llvm/llvm-project/commit/291a7fcf70db4d45c24b559fc867d3499b2e1e04
DIFF:
https://github.com/llvm/llvm-project/commit/291a7fcf70db4d45c24b559fc867d3499b2e1e04.diff
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