================
@@ -959,6 +967,32 @@ def : GCNPat <
}
} // let OtherPredicates = [HasShaderCyclesRegister]
+def SIMM24bitPtr : ImmLeaf <iPTR,
+ [{return isInt<24>(Imm);}]
+>;
+
+multiclass SMPrefetchPat<string type, int cache_type> {
+ def : GCNPat <
+ (smrd_prefetch (SMRDImm i64:$sbase, i32:$offset), timm, timm, (i32
cache_type)),
+ (!cast<SM_Prefetch_Pseudo>("S_PREFETCH_"#type) $sbase, $offset, (i32
SGPR_NULL), (i8 0))
+ >;
+
+ def : GCNPat <
+ (smrd_prefetch (i64 SReg_64:$sbase), timm, timm, (i32 cache_type)),
+ (!cast<SM_Prefetch_Pseudo>("S_PREFETCH_"#type) $sbase, 0, (i32 SGPR_NULL),
(i8 0))
+ >;
+
+ def : GCNPat <
+ (prefetch SIMM24bitPtr:$offset, timm, timm, (i32 cache_type)),
+ (!cast<SM_Prefetch_Pseudo>("S_PREFETCH_"#type#"_PC_REL") (as_i32timm
$offset), (i32 SGPR_NULL), (i8 0))
+ > {
+ let AddedComplexity = 10;
+ }
----------------
jayfoad wrote:
I really don't know. What would the use cases look like? Maybe it could be a
generic intrinsic, if there is consensus that it is useful.
For the existing llvm.prefetch intrinsic, the only useful case I think of for
instruction prefetching is:
```
define @f0() {
call @llvm.prefetch(@f1, ...)
...
call @f1()
}
define @f1() { ... }
```
to prefetch the code at the start of a function you are going to call. We could
codegen that case using the _pc_rel form of the instruction.
https://github.com/llvm/llvm-project/pull/74576
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