[Lldb-commits] [PATCH] D143374: [LLDB][RISCV] Add RVV register infos

2023-04-19 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rGefd64c2f2506: [LLDB][RISCV] Add RVV register infos (authored by Emmmer). Herald added a subscriber: lldb-commits. Changed prior to commit: https://reviews.llvm.org/D143374?vs=495161&id=514857#toc Repos

[Lldb-commits] [PATCH] D143215: Separate Process::GetWatchpointSupportInfo into two methods to get the two separate pieces of information

2023-02-08 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added inline comments. Comment at: lldb/source/Target/Process.cpp:2373 +reported_after = false; + return reported_after; +} DavidSpickett wrote: > DavidSpickett wrote: > > Would this be any clearer with multiple returns? Or one giant return, but > >

[Lldb-commits] [PATCH] D141898: [LLDB][RISCV] Add RVV registers enums

2023-01-29 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Emmmer marked an inline comment as done. Closed by commit rG1d7961fd1a36: [LLDB][RISCV] Add RVV registers enums (authored by Emmmer). Herald added a project: LLDB. Herald added a subscriber: lldb-commits. Repository: rG L

[Lldb-commits] [PATCH] D140961: [LLDB][RISCV] Add RVDC instruction support for EmulateInstructionRISCV

2023-01-13 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Emmmer marked an inline comment as done. Closed by commit rG0ef58c66c6e4: [LLDB][RISCV] Add RVDC instruction support for EmulateInstructionRISCV (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: r

[Lldb-commits] [PATCH] D140092: [NFC][LLDB] Using namespace llvm in EmulateInstructionRISCV

2022-12-15 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. @labath Fixed in rGd850b340a9dd91fdb3c4dddc8328524c721576be Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D140092/new/ https://reviews.llvm.org/D140092 _

[Lldb-commits] [PATCH] D140032: [LLDB][RISCV] Add RVD instruction support for EmulateInstructionRISCV

2022-12-15 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG6493fc4bccd2: [LLDB][RISCV] Add RVD instruction support for EmulateInstructionRISCV (authored by Emmmer). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D14003

[Lldb-commits] [PATCH] D140032: [LLDB][RISCV] Add RVD instruction support for EmulateInstructionRISCV

2022-12-15 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 483166. Emmmer marked an inline comment as done. Emmmer added a comment. address review comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D140032/new/ https://reviews.llvm.org/D140032 Files: lldb/source/Plugins/Instruction/RISCV/EmulateInstruc

[Lldb-commits] [PATCH] D140032: [LLDB][RISCV] Add RVD instruction support for EmulateInstructionRISCV

2022-12-15 Thread Emmmer S via Phabricator via lldb-commits
Emmmer marked an inline comment as done. Emmmer added inline comments. Comment at: lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp:1452 [&](auto &&rs1) { - APFloat apf(APFloat::IEEEsingle(), rs1); +

[Lldb-commits] [PATCH] D140032: [LLDB][RISCV] Add RVD instruction support for EmulateInstructionRISCV

2022-12-15 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 483154. Emmmer added a comment. address review comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D140032/new/ https://reviews.llvm.org/D140032 Files: lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp lldb/source/Plugins/Instr

[Lldb-commits] [PATCH] D140092: [NFC][LLDB] Using namespace llvm in EmulateInstructionRISCV

2022-12-15 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG260ba2f22422: [NFC][LLDB] Using namespace llvm in EmulateInstructionRISCV (authored by Emmmer). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D140092/new/ ht

[Lldb-commits] [PATCH] D140092: [NFC][LLDB] Using namespace llvm in EmulateInstructionRISCV

2022-12-15 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 483142. Emmmer added a comment. rebase main CHANGES SINCE LAST ACTION https://reviews.llvm.org/D140092/new/ https://reviews.llvm.org/D140092 Files: lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp lldb/source/Plugins/Instruction/RISCV

[Lldb-commits] [PATCH] D140092: [NFC] Using namespace llvm in EmulateInstructionRISCV

2022-12-15 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 483117. Emmmer added a comment. Herald added a subscriber: lldb-commits. Updating D140092 : [NFC] Using namespace llvm in EmulateInstructionRISCV Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://rev

[Lldb-commits] [PATCH] D140032: [LLDB][RISCV] Add RVD instruction support for EmulateInstructionRISCV

2022-12-15 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. In D140032#3997459 , @DavidSpickett wrote: >> Are we going to use C++20 or something else? But I see the function >> transform() we need was introduced in C++23. > > Good point, it would be c++20. If you want to look into the sta

[Lldb-commits] [PATCH] D140032: [LLDB][RISCV] Add RVD instruction support for EmulateInstructionRISCV

2022-12-15 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. In D140032#3997384 , @DavidSpickett wrote: > Before I look closely, I see you added namespace llvm. This is fine, neatens > things up but can we get that in its own change? Sure, I will organize these into a separate patch. > A

[Lldb-commits] [PATCH] D140032: [LLDB][RISCV] Add RVD instruction support for EmulateInstructionRISCV

2022-12-14 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 482900. Emmmer added a comment. Herald added a subscriber: lldb-commits. Updating D140032 : [LLDB][RISCV] Add RVD instruction support for EmulateInstructionRISCV Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTI

[Lldb-commits] [PATCH] D139390: [LLDB][RISCV] Add RV32FC instruction support for EmulateInstructionRISCV

2022-12-06 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rGd3628823c96f: [LLDB][RISCV] Add RV32FC instruction support for EmulateInstructionRISCV (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE L

[Lldb-commits] [PATCH] D139294: [LLDB][RISCV] Add RV64F instruction support for EmulateInstructionRISCV

2022-12-05 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG2d7f43f9eaf3: [LLDB][RISCV] Add RV64F instruction support for EmulateInstructionRISCV (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LA

[Lldb-commits] [PATCH] D138447: [LLDB][RISCV] Add RV32F instruction support for EmulateInstructionRISCV

2022-11-23 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG6d4ab6d92179: [LLDB][RISCV] Add RV32F instruction support for EmulateInstructionRISCV (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LA

[Lldb-commits] [PATCH] D137761: [LLDB][RISCV] Allow accessing FPR registers through ABI names

2022-11-17 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG201ed71cfd7e: [LLDB][RISCV] Allow accessing FPR registers through ABI names (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[Lldb-commits] [PATCH] D137508: [LLDB][RISCV] Allow accessing registers through ABI names

2022-11-17 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG4113e98ea785: [LLDB][RISCV] Allow accessing registers through ABI names (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION ht

[Lldb-commits] [PATCH] D136362: [LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV

2022-10-31 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. In D136362#3895385 , @seehearfeel wrote: > ... > This is OK used with gcc/c++ 12. > ... > We can see that "ninja check-lldb" failed due to OOM > used with gcc/c++ 13. Then I guess it is a gcc-specific bug and you could try to rep

[Lldb-commits] [PATCH] D136362: [LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV

2022-10-28 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. I suspect the cause is that g++ tries to instantiate these generic lambdas inside `std::visit`, which consumes N^2 the size memory (or whatever is related?) when there's nested-`std::visit` bool compareInst(const RISCVInst &lhs, const RISCVInst &rhs) { if (lhs.inde

[Lldb-commits] [PATCH] D136362: [LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV

2022-10-27 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. In D136362#3887927 , @seehearfeel wrote: > After commit 05ae747a5353811f93f5814f24d2335e6229d78a > > ("[LLDB][RISCV] Add RV64C instruction support for Emulate

[Lldb-commits] [PATCH] D136674: [LLDB] Fix RISCV build

2022-10-25 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rGc094b1eef08c: [LLDB] Fix RISCV build (authored by Emmmer). Herald added a project: LLDB. Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://

[Lldb-commits] [PATCH] D136362: [LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV

2022-10-25 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG05ae747a5353: [LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LA

[Lldb-commits] [PATCH] D135015: [LLDB][RISCV][NFC] Rewrite instruction in algebraic datatype

2022-10-05 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rGd0dcbb9b026a: [LLDB][RISCV][NFC] Rewrite instruction in algebraic datatype (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[Lldb-commits] [PATCH] D133670: [LLDB][RISCV] Add RVM and RVA instruction support for EmulateInstructionRISCV

2022-09-20 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. In D133670#3804437 , @aprantl wrote: > Hey @Emmmer the unit test is throwing a UBSAN failure, could you please take > a look? > > https://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake-sanitized/lastFailedBuild/testReport/lldb-

[Lldb-commits] [PATCH] D133670: [LLDB][RISCV] Add RVM and RVA instruction support for EmulateInstructionRISCV

2022-09-16 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rGedc1c9f6108a: [LLDB][RISCV] Add RVM and RVA instruction support for EmulateInstructionRISCV (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SI

[Lldb-commits] [PATCH] D132789: [LLDB][RISCV] Add more instruction decode and execute for EmulateInstructionRISCV

2022-09-01 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rGff7b876aa75d: [LLDB][RISCV] Add more instruction decode and execute for… (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION h

[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support

2022-08-26 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a subscriber: labath. Emmmer added a comment. I have to say sorry after reading your update but not giving you feedback. I pulled your patch and found it does not compile, and I have fixed them for you :) In D62732#2306055 , @labath wrote: >

[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support

2022-08-23 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. Currently, `lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp` only handles a few jump instructions, we can refine it further if needed. Comment at: lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp:38 + +enum riscv_dwarf_regnums { + dwar

[Lldb-commits] [PATCH] D132353: [LLDB] Fix: make m_target_arch private

2022-08-22 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG65f6a8c23b53: [LLDB] Fix: make m_target_arch private (authored by Emmmer). Changed prior to commit: https://reviews.llvm.org/D132353?vs=454426&id=454434#toc Repository: rG LLVM Github Monorepo CHANG

[Lldb-commits] [PATCH] D132353: [LLDB] Fix: make m_target_arch private

2022-08-22 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 454426. Emmmer added a comment. Address review comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132353/new/ https://reviews.llvm.org/D132353 Files: lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp lldb/source/Plugins/Pro

[Lldb-commits] [PATCH] D132353: [LLDB] Fix: make m_target_arch private

2022-08-22 Thread Emmmer S via Phabricator via lldb-commits
Emmmer created this revision. Herald added subscribers: atanasyan, jrtc27, nemanjai, emaste. Herald added a project: All. Emmmer edited the summary of this revision. Emmmer added reviewers: JDevlieghere, DavidSpickett. Emmmer added a project: LLDB. Emmmer added subscribers: imkiva, liaolucy. Emmmer

[Lldb-commits] [PATCH] D131759: [LLDB][RISCV] Make software single stepping work

2022-08-16 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG4fc7e9cba24b: [LLDB][RISCV] Make software single stepping work (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://rev

[Lldb-commits] [PATCH] D131946: [LLDB] Handle possible resume thread error

2022-08-16 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG8ed3e75c96d9: [LLDB] Handle possible resume thread error (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.l

[Lldb-commits] [PATCH] D131945: [LLDB] Fix possible nullptr exception

2022-08-16 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG95e2949a5352: [LLDB] Fix possible nullptr exception (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.o

[Lldb-commits] [PATCH] D131667: [LLDB][RISCV] Fix risc-v target build

2022-08-11 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG55e511f9f619: [LLDB][RISCV] Fix risc-v target build (authored by Emmmer). Herald added a project: LLDB. Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST A

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add riscv register definition and read/write

2022-08-11 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. In D130342#3715622 , @thakis wrote: > This breaks building on windows: http://45.33.8.238/win/64255/step_4.txt > > Please take a look and revert for now if it takes a while to fix. Should be fixed after D131667

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add riscv register definition and read/write

2022-08-11 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. In D130342#3715622 , @thakis wrote: > This breaks building on windows: http://45.33.8.238/win/64255/step_4.txt > > Please take a look and revert for now if it takes a while to fix. Yes. This is probably because we don't have a CI

[Lldb-commits] [PATCH] D128250: [LLDB][RISCV]Add initial support for lldb-server.

2022-08-10 Thread Emmmer S via Phabricator via lldb-commits
Emmmer abandoned this revision. Emmmer added a comment. Done in D130342 and D131566 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D128250/new/ https://reviews.llvm.org/D128250

[Lldb-commits] [PATCH] D131566: [LLDB][RISCV] Add riscv software breakpoint trap code

2022-08-10 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG0247b5aaae7a: [LLDB][RISCV] Add riscv software breakpoint trap code (authored by Emmmer). Herald added a subscriber: lldb-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https:

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add riscv register definition and read/write

2022-08-10 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG7bece0f03bf6: [LLDB][RISCV] Add riscv register definition and read/write (authored by Emmmer). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D130342/new/ htt

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add riscv register stuff

2022-08-10 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 451442. Emmmer marked an inline comment as done. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D130342/new/ https://reviews.llvm.org/D130342 Files: lldb/source/Host/common/HostInfoBase.cpp lldb/source/Plugins/Process/Linux/CMakeLists.txt lldb/sou

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add riscv register stuff

2022-08-10 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 451441. Emmmer retitled this revision from "[LLDB][RISCV] Add register stuff and make breakpoint work" to "[LLDB][RISCV] Add riscv register stuff". Emmmer edited the summary of this revision. Emmmer added a comment. Address review comments: - Split the softwa

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add register stuff and make breakpoint work

2022-08-10 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. In D130342#3711534 , @tzb99 wrote: > In D130342#3710299 , @Emmmer wrote: > >> In D130342#3710122 , @tzb99 wrote: >> >>> In D130342#3709772

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add register stuff and make breakpoint work

2022-08-09 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. In D130342#3710122 , @tzb99 wrote: > In D130342#3709772 , @Emmmer wrote: > >> What is implemented: >> >> - Use the same register layout as Linux kernel and mock read/write for `x0` >> regi

[Lldb-commits] [PATCH] D128250: [LLDB][RISCV]Add initial support for lldb-server.

2022-08-09 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. > Cool! There is one thread talking about the RISCV ABI support: > https://reviews.llvm.org/D62732. I tried that ABI in the RISCV file but it > seems like the same issue happened as yours, the breakpoint cannot be > stopped, and the lldb-server cannot show the reasonable

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add register stuff and make breakpoint work

2022-08-09 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 451140. Emmmer retitled this revision from "[LLDB][RISCV] Add Register Info and Context" to "[LLDB][RISCV] Add register stuff and make breakpoint work". Emmmer edited the summary of this revision. Emmmer added a subscriber: tzb99. Emmmer added a comment. What

[Lldb-commits] [PATCH] D128250: [LLDB][RISCV]Add initial support for lldb-server.

2022-08-03 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. > Hello: > > Thank you so much for sharing the patch files. One thing I am still curious > is what the ABISysv file you are using. Would you mind also sharing the > remaining patches added for the lldb-server support? I didn't add any ABISysV code before uploading this p

[Lldb-commits] [PATCH] D130899: [LLDB][RISCV] Add riscv register enums

2022-08-01 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG768e59d959c7: [LLDB][RISCV] Add riscv register enums (authored by Emmmer). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D130899/new/ https://reviews.llvm.or

[Lldb-commits] [PATCH] D130899: [LLDB][RISCV] Add riscv register enums

2022-08-01 Thread Emmmer S via Phabricator via lldb-commits
Emmmer created this revision. Herald added subscribers: sunshaoce, VincentWu, luke957, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, n

[Lldb-commits] [PATCH] D130686: [LLDB][RISCV] Add DWARF Registers

2022-07-29 Thread Emmmer S via Phabricator via lldb-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rGf47355864770: [LLDB][RISCV] Add DWARF Registers (authored by Emmmer). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D130686/new/ https://reviews.llvm.org/D13

[Lldb-commits] [PATCH] D130743: [LLDB][RISCV] Add DWARF Registers

2022-07-28 Thread Emmmer S via Phabricator via lldb-commits
Emmmer created this revision. Herald added subscribers: sunshaoce, VincentWu, luke957, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, n

[Lldb-commits] [PATCH] D130686: [LLDB][RISCV] Add DWARF Registers

2022-07-28 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 448294. Emmmer added a comment. Add missing `Alternate Frame Return Column` CHANGES SINCE LAST ACTION https://reviews.llvm.org/D130686/new/ https://reviews.llvm.org/D130686 Files: lldb/source/Utility/RISCV_DWARF_Registers.h Index: lldb/source/Utility/R

[Lldb-commits] [PATCH] D130686: [LLDB][RISCV] Add DWARF Registers

2022-07-28 Thread Emmmer S via Phabricator via lldb-commits
Emmmer created this revision. Emmmer added reviewers: craig.topper, MaskRay, DavidSpickett, labath. Emmmer added a project: LLDB. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, JDevlieghere, s.egerton, Jim, ben

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add Register Info and Context

2022-07-25 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. In D130342#3676318 , @DavidSpickett wrote: > Please note in the commit title/description that this is adding riscv64 only. > > Does this build if you don't have the rest of the changes from > https://reviews.llvm.org/D128250? Or

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add Register Info and Context

2022-07-25 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 447344. Emmmer added a comment. `case llvm::Triple::riscv64:` in `ArchSpec::CharIsSignedByDefault()` is unnecessary as well. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D130342/new/ https://reviews.llvm.org/D130342 Files: lldb/source/Host/common

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add Register Info and Context

2022-07-25 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 447322. Emmmer added a comment. > Why is this only needed for PECOFF? (maybe it is the only one that lists them > like this) At first, I tracked a bug from `LLDBServerTests` and thought that `GetArchitecture()` returned a wrong match, so I added `case llvm:

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add Register Info and Context

2022-07-24 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 447189. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D130342/new/ https://reviews.llvm.org/D130342 Files: lldb/source/Host/common/HostInfoBase.cpp lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp lldb/source/Plugins/Process/Linux/CMake

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add Register Info and Context

2022-07-22 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 446766. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D130342/new/ https://reviews.llvm.org/D130342 Files: lldb/source/Host/common/HostInfoBase.cpp lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp lldb/source/Plugins/Process/Linux/CMake

[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add Register Info and Context

2022-07-22 Thread Emmmer S via Phabricator via lldb-commits
Emmmer created this revision. Emmmer added reviewers: labath, DavidSpickett, JDevlieghere, jingham. Herald added subscribers: sunshaoce, VincentWu, luke957, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosb

[Lldb-commits] [PATCH] D128250: [LLDB][RISCV]Add initial support for lldb-server.

2022-07-18 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 445699. Emmmer added a comment. This commit updates: - Add the pc register according to the implementation of gdb - Fix register type definition m

[Lldb-commits] [PATCH] D129750: [lldb] Always use APFloat for FP dumping

2022-07-14 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. On the riscv64 platform, LLDBCoreTests passed after applying this patch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D129750/new/ https://reviews.llvm.org/D129750 ___ lldb-commit

[Lldb-commits] [PATCH] D129736: [lldb] Skip a float16 NaN test for RISC-V

2022-07-14 Thread Emmmer S via Phabricator via lldb-commits
Emmmer abandoned this revision. Emmmer added a comment. Superseded by D129750 , which introduced a platform independent way of checking floating point test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D12973

[Lldb-commits] [PATCH] D129736: [lldb] Skip a float16 NaN test for RISC-V

2022-07-14 Thread Emmmer S via Phabricator via lldb-commits
Emmmer created this revision. Emmmer added reviewers: MaskRay, liaolucy, craig.topper, DavidSpickett. Emmmer added projects: LLDB, LLDB test suite on simulator. Herald added subscribers: jsji, sunshaoce, VincentWu, luke957, StephenFan, vkmr, luismarques, sameer.abuasal, JDevlieghere, pengfei, s.eg

[Lldb-commits] [PATCH] D128250: [LLDB][RISCV]Add initial support for lldb-server.

2022-07-12 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 443482. Emmmer added a comment. This patch change: - Add the recognition of architecture riscv64 in `HostInfoBase.cpp` - Add the recognition of architecture riscv64 and riscv32 in `ObjectFilePECOFF.cpp` - Add riscv's `ebreak` command to `Platform.cpp` Now ll

[Lldb-commits] [PATCH] D128250: [LLDB][RISCV]Add initial support for lldb-server.

2022-07-08 Thread Emmmer S via Phabricator via lldb-commits
Emmmer marked 8 inline comments as done. Emmmer added a comment. > Minor thing but if you call this in the constructor it's one less place to = > false all the things. It is a virtual function so I decided not to call it from the constructor. CHANGES SINCE LAST ACTION https://reviews.llvm.or

[Lldb-commits] [PATCH] D128250: [LLDB][RISCV]Add initial support for lldb-server.

2022-07-08 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 442006. Emmmer added a comment. - Format the standard llvm header. - add `RegisterContextPOSIX_riscv64.cpp` and `RegisterContextPOSIX_riscv64.h` - add Floating-Point Register support. > I wouldn't say that the presence of a buildbot is an absolute requirement

[Lldb-commits] [PATCH] D128250: [LLDB][RISCV]Add initial support for lldb-server.

2022-07-08 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. In D128250#3617409 , @liaolucy wrote: > I try to build lldb with the patch, but fail: > > The environment: > > cat /proc/cpuinfo > processor : 0 > hart: 2 > isa : rv64imafdc > mmu

[Lldb-commits] [PATCH] D128250: [LLDB][RISCV]Add initial support for lldb-server.

2022-06-28 Thread Emmmer S via Phabricator via lldb-commits
Emmmer updated this revision to Diff 439955. Emmmer marked an inline comment as done. Emmmer added a comment. This patch change: - add `lldb/source/Plugins/Architecture/RISCV64` - add `lldb/source/Plugins/Architecture/RISCV32` - update `lldb/source/Utility/ArchSpec.cpp` - remove `lldb/source/Plu

[Lldb-commits] [PATCH] D128250: [LLDB][RISCV]Add initial support for lldb-server.

2022-06-28 Thread Emmmer S via Phabricator via lldb-commits
Emmmer marked 2 inline comments as done. Emmmer added inline comments. Comment at: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.h:9 + +#if defined(__riscv) || __riscv_xlen == 64 + DavidSpickett wrote: > Should this be `&&`? I'm assuming t

[Lldb-commits] [PATCH] D128250: [LLDB][RISCV]Add initial support for lldb-server.

2022-06-28 Thread Emmmer S via Phabricator via lldb-commits
Emmmer added a comment. In D128250#3598223 , @DavidSpickett wrote: > I'll give this a more thorough read later just one comment for now. > > In the meantime, what's your plan for testing this config going forward? This > patch would be fine as the first

[Lldb-commits] [PATCH] D128250: [LLDB][RISCV]Add initial support for lldb-server.

2022-06-28 Thread Emmmer S via Phabricator via lldb-commits
Emmmer created this revision. Emmmer added reviewers: DavidSpickett, craig.topper. Emmmer added a project: LLDB. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, JDevlieghere, s.egerton, Jim, benna, psnobl, jocew