Re: [PATCH 2/4] arc: fix type warnings in arc/mm/cache.c

2018-07-24 Thread Randy Dunlap
On 07/24/2018 05:02 PM, Vineet Gupta wrote: > On 07/24/2018 01:46 PM, Randy Dunlap wrote: >> From: Randy Dunlap >> >> ../arch/arc/mm/cache.c: In function 'flush_anon_page': >> ../arch/arc/mm/cache.c:1062:55: warning: passing argument 2 of >> '__flush_dcache_page' makes integer from pointer withou

Re: [PATCH 2/4] arc: fix type warnings in arc/mm/cache.c

2018-07-24 Thread Vineet Gupta
On 07/24/2018 01:46 PM, Randy Dunlap wrote: > From: Randy Dunlap > > ../arch/arc/mm/cache.c: In function 'flush_anon_page': > ../arch/arc/mm/cache.c:1062:55: warning: passing argument 2 of > '__flush_dcache_page' makes integer from pointer without a cast > [-Wint-conversion] > __flush_dcache_p

Re: [PATCH 1/4] arc: fix some build issues in delay.h

2018-07-24 Thread Randy Dunlap
On 07/24/2018 03:04 PM, Vineet Gupta wrote: > On 07/24/2018 01:46 PM, Randy Dunlap wrote: >> From: Randy Dunlap >> >> Fix build errors in arch/arc/'s delay.h: >> - add for loops_per_jiffy >> - add for "u64" >> >> In file included from ../drivers/infiniband/hw/cxgb3/cxio_hal.c:32: >> ../arch/arc/

Re: [PATCH 1/4] arc: fix some build issues in delay.h

2018-07-24 Thread Vineet Gupta
On 07/24/2018 01:46 PM, Randy Dunlap wrote: > From: Randy Dunlap > > Fix build errors in arch/arc/'s delay.h: > - add for loops_per_jiffy > - add for "u64" > > In file included from ../drivers/infiniband/hw/cxgb3/cxio_hal.c:32: > ../arch/arc/include/asm/delay.h: In function '__udelay': > ../arch

[PATCH 1/4] arc: fix some build issues in delay.h

2018-07-24 Thread Randy Dunlap
From: Randy Dunlap Fix build errors in arch/arc/'s delay.h: - add for loops_per_jiffy - add for "u64" In file included from ../drivers/infiniband/hw/cxgb3/cxio_hal.c:32: ../arch/arc/include/asm/delay.h: In function '__udelay': ../arch/arc/include/asm/delay.h:61:12: error: 'u64' undeclared (fir

arc: some allmodconfig fixup patches

2018-07-24 Thread Randy Dunlap
From: Randy Dunlap Hi, Here are a few patches that fix build errors or warnings that I encountered while doing arc "allmodconfig" builds. These patches do not fix all of the build issues. arch/arc/include/asm/delay.h|2 ++ arch/arc/mm/cache.c | 11 ++

[PATCH 3/4] arc: fix some plat-eznps data type errors

2018-07-24 Thread Randy Dunlap
From: Randy Dunlap Add to fix build errors. Both ctop.h and use u32 types and cause many errors. Examples: ../include/soc/nps/common.h:71:4: error: unknown type name 'u32' u32 __reserved:20, cluster:4, core:4, thread:4; ../include/soc/nps/common.h:76:3: error: unknown type name 'u32' u3

[PATCH 4/4] arc: fix mtm.c printk format warning

2018-07-24 Thread Randy Dunlap
From: Randy Dunlap Fix printk format warning in arch/arc/plat-eznps/mtm.c: In file included from ../include/linux/printk.h:7, from ../include/linux/kernel.h:14, from ../include/linux/list.h:9, from ../include/linux/smp.h:12, fro

[PATCH 2/4] arc: fix type warnings in arc/mm/cache.c

2018-07-24 Thread Randy Dunlap
From: Randy Dunlap ../arch/arc/mm/cache.c: In function 'flush_anon_page': ../arch/arc/mm/cache.c:1062:55: warning: passing argument 2 of '__flush_dcache_page' makes integer from pointer without a cast [-Wint-conversion] __flush_dcache_page((phys_addr_t)page_address(page), page_address(page));

[PATCH] ARC: dma [non IOC]: fix arc_dma_sync_single_for_(device|cpu)

2018-07-24 Thread Vineet Gupta
From: Eugeniy Paltsev ARC backend for dma_sync_single_for_(device|cpu) was broken as it was not honoring the @dir argument and simply forcing it based on the call: - arc_dma_sync_single_for_device(dir) assumed DMA_TO_DEVICE (cache wback) - arc_dma_sync_single_for_cpu(dir) assumed DMA_FROM_DEVIC

Re: [PATCH] ARC: fix broken noncoherent cache ops

2018-07-24 Thread Vineet Gupta
On 07/24/2018 07:13 AM, Eugeniy Paltsev wrote: > All DMA devices on ARC haven't worked with SW cache control > since commit a8eb92d02dd7 ("arc: fix arc_dma_{map,unmap}_page") > This happens because we don't check direction argument at all in > new implementation. Fix that. Good find and I presume

[PATCH] ARC: fix broken noncoherent cache ops

2018-07-24 Thread Eugeniy Paltsev
All DMA devices on ARC haven't worked with SW cache control since commit a8eb92d02dd7 ("arc: fix arc_dma_{map,unmap}_page") This happens because we don't check direction argument at all in new implementation. Fix that. Fixies: commit a8eb92d02dd7 ("arc: fix arc_dma_{map,unmap}_page") Signed-off-by

[PATCH RESEND] ARC: Add Ofer Levi as plat-eznps maintainer

2018-07-24 Thread Leon Romanovsky
From: Leon Romanovsky Signed-off-by: Leon Romanovsky --- Resend with proper Vineet's email --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index c79f306a936a..6be664ed0527 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5444,6 +5444,7 @@ F:d

[PATCH 4/4] ARC: IOC: panic if both IOC and ZONE_HIGHMEM enabled

2018-07-24 Thread Eugeniy Paltsev
Signed-off-by: Eugeniy Paltsev --- arch/arc/mm/cache.c | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c index 34935ce38631..e0b3484641c3 100644 --- a/arch/arc/mm/cache.c +++ b/arch/arc/mm/cache.c @@ -1143,6 +1143,19 @@ noinline void __in

[PATCH 3/4] ARC: refactor arch/arc/mm/dma.c

2018-07-24 Thread Eugeniy Paltsev
Refactoring, no functional change intended. Signed-off-by: Eugeniy Paltsev --- arch/arc/mm/dma.c | 28 ++-- 1 file changed, 10 insertions(+), 18 deletions(-) diff --git a/arch/arc/mm/dma.c b/arch/arc/mm/dma.c index b693818cd8e5..46584c7c2858 100644 --- a/arch/arc/mm/dma.

[PATCH 0/4] ARC: allow to use IOC and non-IOC DMA devices simultaneously

2018-07-24 Thread Eugeniy Paltsev
The ARC HS processor provides an IOC port (I/O coherency bus interface) that allows external devices such as DMA devices to access memory through the cache hierarchy, providing coherency between I/O transactions and the complete memory hierarchy. Some recent SoC with ARC HS (like HSDK) allow to se

[PATCH 2/4] ARC: allow to use IOC and non-IOC DMA devices simultaneously

2018-07-24 Thread Eugeniy Paltsev
The ARC HS processor provides an IOC port (I/O coherency bus interface) that allows external devices such as DMA devices to access memory through the cache hierarchy, providing coherency between I/O transactions and the complete memory hierarchy. Some recent SoC with ARC HS (like HSDK) allow to se

[PATCH 1/4] ARC: DTS: mark DMA devices connected through IOC port as dma-coherent

2018-07-24 Thread Eugeniy Paltsev
Mark DMA devices on AXS103 and HSDK boards connected through IOC port as dma-coherent. Signed-off-by: Eugeniy Paltsev --- arch/arc/boot/dts/axc003.dtsi | 26 ++ arch/arc/boot/dts/axc003_idu.dtsi | 26 ++ arch/arc/boot/dts/hsdk.dts| 4 +