On 4/18/2016 12:36 PM, Herbert Xu wrote:
> On Fri, Apr 15, 2016 at 10:02:21PM +0800, Herbert Xu wrote:
>> Jonas Eymann wrote:
>>>
>>> running a current 4.4.6 kernel on a board using a Freescale P1020, I ran
>>> into an oops when calling crypto_alloc_aead using the talitos driver. I
>>> could als
On 4/20/2016 12:58 PM, Herbert Xu wrote:
> On Tue, Apr 19, 2016 at 08:33:46PM +0300, Horia Geantă wrote:
>> Jonas Eymann reports a crash and some failures of AED algorithms
>> with kernel 4.4.6, all easily reproducible with tcrypt.
>>
>> These have to do with the onversion to the new AEAD interface
On 4/20/2016 3:04 PM, Christophe Leroy wrote:
> Today, in Talitos driver crypto alg registration is based on predefined
> templates with a predefined descriptor type and verification against the
> descriptors supported by the HW. This works well for ALG that require a
> unique descriptor. But fo
On 4/22/2016 6:45 PM, Kim Phillips wrote:
> On Thu, 21 Apr 2016 13:31:47 +
> Horia Ioan Geanta Neag wrote:
>
>> On 4/20/2016 3:04 PM, Christophe Leroy wrote:
>>> What's the best way to implement the selection of the proper descriptor
>>> type ?
>&
On 5/5/2016 6:37 PM, Horia Geantă wrote:
> This will allow device drivers to consistently use io{read,write}XX
> also for 64-bit accesses.
>
> Signed-off-by: Horia Geantă
It would be great if PPC maintainers could Ack this patch.
As stated in the cover letter: https://lkml.org/lkml/2016/5/5/340
+Shawn
On 5/5/2016 6:39 PM, Horia Geantă wrote:
> LS1043A has a SEC v5.4 security engine.
> For now don't add rtic or sec_mon subnodes, since these features
> haven't been tested yet.
>
> Signed-off-by: Horia Geantă
Shawn,
IIUC, you are the de facto maintainer of arch/arm64/boot/dts/freescale
On 5/6/2016 4:19 PM, Catalin Vasile wrote:
> caam_jr_enqueue() function returns -EBUSY once there are no more slots
> available in the JR, but it doesn't actually save the current request.
> This breaks the functionality of users that expect that even if there is
> no more space for the request, it
On 5/12/2016 6:06 PM, Tudor Ambarus wrote:
> Add RSA support to caam driver.
>
> Coauthored-by: Yashpal Dutta
>
> Signed-off-by: Tudor Ambarus
> ---
> drivers/crypto/caam/Kconfig| 12 ++
> drivers/crypto/caam/Makefile | 4 +
> drivers/crypto/caam/caampkc.c | 466
> ++
On 5/5/2016 6:34 PM, Horia Geantă wrote:
> v2:
> As suggested by Arnd, patch 1 fixes io{read,write}{16,32}be accessors
> to prevent the case when {read,write}{w,l} are overriden by arch-specific
> ones having barriers, while the BE accessors previously mentioned are not
> (thus behaving differently
On 5/19/2016 3:15 PM, Tudor Ambarus wrote:
> Add RSA support to caam driver.
>
> Coauthored-by: Yashpal Dutta
>
> Signed-off-by: Tudor Ambarus
Reviewed-by: Horia Geantă
Horia
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On 5/19/2016 3:15 PM, Tudor Ambarus wrote:
> Depends on:
> [PATCH v2] crypto: rsa - return raw integers for the ASN.1 parser
>
> Changes in v6:
> - write descriptor PDB fields with inline append
> - move Protocol Data Block (pdb) structures to pdb.h
> - move setting of PDB fields in new functions
On 5/15/2016 1:13 PM, Jeffrey Walton wrote:
> Hi Everyone,
>
> It appears defines like HWCAP_CRC32 fall under the purview of the
> kernel. Confer, http://www.google.com/search?q="HWCAP_CRC32"; (my
> apologies if this is not the case).
>
> We use getauxval(AT_HWCAP) and HWCAP_CRC32 for runtime det
On 6/16/2016 12:04 PM, Arnd Bergmann wrote:
> An endianess fix mistakenly used higher_32_bits() instead of
> upper_32_bits(), and that doesn't exist:
>
> drivers/crypto/caam/desc_constr.h: In function 'append_ptr':
> drivers/crypto/caam/desc_constr.h:84:75: error: implicit declaration of
> functi
On 6/16/2016 4:33 PM, Tudor Ambarus wrote:
> EXTRA_CFLAGS is still supported but its usage is deprecated.
>
> Signed-off-by: Tudor Ambarus
Reviewed-by: Horia Geantă
> ---
> drivers/crypto/caam/Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/crypto/ca
Herbert,
Commits
7021b2e1cddd "esp4: Switch to new AEAD interface"
000ae7b2690e "esp6: Switch to new AEAD interface"
removed the following:
/* Get ivec. This can be wrong, check against another impls. */
iv = esph->enc_data;
from IPsec decryption - esp{4,6}_input(),
so the IV in re
Herbert,
Commits
7021b2e1cddd "esp4: Switch to new AEAD interface"
000ae7b2690e "esp6: Switch to new AEAD interface"
removed the following:
/* Get ivec. This can be wrong, check against another impls. */
iv = esph->enc_data;
from IPsec decryption - esp{4,6}_input(),
so the IV in re
On 8/26/2016 6:33 PM, Horia Geantă wrote:
> For algorithms that implement IV generators before the crypto ops,
> the IV needed for decryption is initially located in req->src
> scatterlist, not in req->iv.
>
> Avoid copying the IV into req->iv by modifying the (givdecrypt)
> descriptors to load it
On 1/12/2016 5:14 PM, Horia Geantă wrote:
> The following patches increase/fix CAAM performance by modifying
> the configuration of MCFGR (Master Configuration Register):
> -1st patch fixes a ~ 5% performance drop on PPC platforms
> -2nd patch improves performance in some use cases, since CAAM DMA
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