struct s5p_hash_reqctx {
> struct s5p_aes_dev *dd;
> @@ -1125,7 +1126,7 @@ static int s5p_hash_copy_sg_lists(struct
> s5p_hash_reqctx *ctx,
> * s5p_hash_prepare_sgs() - prepare sg for processing
> * @ctx: request context
> * @sg: source scatterlist request
> - * @nbytes: number of bytes to process from sg
> + * @new_len: number of bytes to process from sg
> * @final: final flag
> *
> * Check two conditions: (1) if buffers in sg have len aligned data, and (2)
>
Reviewed-by: Kamil Konieczny
Acked-by: Kamil Konieczny
cumentation/devicetree/bindings/crypto/samsung-slimsss.yaml
> @@ -19,7 +19,7 @@ description: |+
> properties:
>compatible:
> items:
> - - const: samsung,exynos5433-slim-ss
> + - const: samsung,exynos5433-slim-sss
>
> reg:
> maxItems: 1
>
Reviewed-by: Kamil Konieczny
Acked-by: Kamil Konieczny
= dev_err_probe(dev, PTR_ERR(pdata->pclk),
> + "failed to find clock %s\n",
> + variant->clk_names[1]);
> goto err_clk;
> }
>
>
Reviewed-by: Kamil Konieczny
Acked-by: Kamil Konieczny
tions(+), 4 deletions(-)
>
> diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
> index 341433fbcc4a..fdcbfd45c884 100644
> --- a/drivers/crypto/s5p-sss.c
> +++ b/drivers/crypto/s5p-sss.c
> @@ -2307,8 +2307,7 @@ static int s5p_aes_probe(struct platform_device *pdev)
> [...]
Acked-by: Kamil Konieczny
g.read = iproc_rng200_read,
> priv->rng.init = iproc_rng200_init,
> priv->rng.cleanup = iproc_rng200_cleanup,
> + priv->rng.quality = 1000,
>
> /* Register driver */
> ret = devm_hwrng_register(dev, &priv->rng);
>
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
p the
> blkcipher code in the near future.
>
> Cc: Krzysztof Kozlowski
> Cc: Vladimir Zapolskiy
> Cc: Kamil Konieczny
> Cc: linux-samsung-...@vger.kernel.org
> Signed-off-by: Ard Biesheuvel
> ---
There are comments for hash functions changed, see below.
With that fixed, you
On 20.08.2019 13:48, Krzysztof Kozlowski wrote:
> On Tue, 20 Aug 2019 at 13:39, Kamil Konieczny
> wrote:
>>
>>
>>
>> On 20.08.2019 12:24, Krzysztof Kozlowski wrote:
>>> On Mon, 19 Aug 2019 at 16:24, Ard Biesheuvel
>>> wrote:
>>&g
ZE). With block size of 1 byte, I understand that
> req->nbytes can be for example 4 bytes which is not AES block
> aligned... If my reasoning is correct, then the CTR mode in s5p-sss is
> not fully working.
As I remember this case there are allocated buffers with len aligned up
gt; .cra_ctxsize= sizeof(struct s5p_aes_ctx),
> .cra_alignmask = 0x0f,
> .cra_type = &crypto_ablkcipher_type,
>
Acked-by: Kamil Konieczny
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
LOCK_SIZE) &&
> ((mode & FLAGS_AES_MODE_MASK) != FLAGS_AES_CTR)) {
> - dev_err(dev->dev, "request size is not exact amount of AES
> blocks\n");
> + dev_dbg(dev->dev, "request size is not exact amount of AES
> blocks\n");
> return -EINVAL;
> }
Acked-by: Kamil Konieczny
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
re's enough work to do to make the software overhead for actually
>> starting and managing that work insignificant. [...]
Hmm, is there any HW which support hash of zero-len message ?
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
se.
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
"
(strcmp) from [] (of_property_match_string+0x58/0xd0)
...
(devm_clk_get) from [] (s5p_aes_probe+0xd4/0x4a0)
(s5p_aes_probe) from [] (platform_drv_probe+0x6c/0xa4)
Fix this by setting array clk_names size to 2.
Fixes: 0918f18c7179 ("crypto: s5p - add AES support for Exynos5433")
Reported-by: Krzysztof K
Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 50
1 file changed, 46 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto
Add DT node for SlimSSS (aka Slim SecuritySubSystem) in Exynos5433 SoC.
The users can use compatibility "samsung,exynos5433-slim-sss".
Signed-off-by: Kamil Konieczny
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm6
Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
SubSystem) IP.
Signed-off-by: Kamil Konieczny
---
.../bindings/crypto/samsung-slimsss.txt | 19 +++
1 file changed, 19 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto
n add that Exynos5433 has both slimSSS and SSS IPs.
Kamil Konieczny (3):
arm64: dts: exynos: add SlimSSS for Exynos5433
dt-bindings: crypto: document Exynos5433 SlimSSS
crypto: s5p: add AES support for Exynos5433
.../bindings/crypto/samsung-slimsss.txt | 19 +++
arch/arm64/boot/
Fix bug "s5p-sss crypto driver doesn't set next AES-CBC IV". While at this,
fix also AES-CTR mode. Tested on Odroid U3 with Eric Biggers branch
"iv-out-testing".
Signed-off-by: Kamil Konieczny
Reported-by: Eric Biggers
---
Changes since v1:
- reworded Subject and commi
cbc(aes)) passed
[6.505000] crypto: alg: self-tests for ctr-aes-s5p (ctr(aes)) passed
and I noticed there are no cbc-aes-generic nor ctr-aes-generic
Did you test them in separate tree ? Why they are not registered in
/proc/crypto ?
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
Fix bug "s5p-sss crypto driver doesn't set next AES-CBC IV". This should
also fix AES-CTR mode. Tested on Odroid U3 with Eric Biggers branch
"iv-out-testing".
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 8
1 file changed, 8 insertions(+)
di
Hi,
On 30.01.2019 17:51, Rob Herring wrote:
> On Thu, Jan 24, 2019 at 04:45:20PM +0100, Kamil Konieczny wrote:
>> Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
>> SubSystem) IP.
>>
>> Reviewed-by: Krzysztof Kozlowski
>&g
Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
SubSystem) IP.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Kamil Konieczny
---
.../devicetree/bindings/crypto/samsung-sss.txt | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a
f
struct samsung_aes_variant
Changes since v1:
- address Krzysztof Kozlowski review: add missing comma in struct
definition, add goto for error code path, correct indentation,
in documentation add that Exynos5433 has both slimSSS and SSS IPs.
Kamil Konieczny (3):
arm64: dts: exynos: add SlimSSS for Exyno
Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 50
1 file changed, 46 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto
On 24.01.2019 15:39, Krzysztof Kozlowski wrote:
> On Thu, 24 Jan 2019 at 15:34, Kamil Konieczny
> wrote:
>>
>>
>>
>> On 24.01.2019 14:37, Corentin Labbe wrote:
>>> On Wed, Jan 23, 2019 at 05:55:33PM +0100, Kamil Konieczny wrote:
>>>> Add AES cryp
On 24.01.2019 14:37, Corentin Labbe wrote:
> On Wed, Jan 23, 2019 at 05:55:33PM +0100, Kamil Konieczny wrote:
>> Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
>>
>> Signed-off-by: Kamil Konieczny
>> ---
>&g
Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 50
1 file changed, 46 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p
Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
SubSystem) IP.
Signed-off-by: Kamil Konieczny
---
.../devicetree/bindings/crypto/samsung-sss.txt | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings
error code path, correct indentation,
in documentation add that Exynos5433 has both slimSSS and SSS IPs.
Kamil Konieczny (3):
arm64: dts: exynos: add SlimSSS for Exynos5433
dt-bindings: crypto: document Exynos5433 SlimSSS
crypto: s5p: add AES support for Exynos5433
.../bindings/crypto/samsung
On 23.01.2019 08:59, Krzysztof Kozlowski wrote:
> On Tue, 22 Jan 2019 at 16:26, Kamil Konieczny
> wrote:
>>
>> Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
>> SubSystem) IP.
>>
>> Signed-off-by: Kamil Konieczny
>> ---
Hi Krzysztof,
On 23.01.2019 08:59, Krzysztof Kozlowski wrote:
> On Tue, 22 Jan 2019 at 16:26, Kamil Konieczny
> wrote:
>>
>> Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
>> SubSystem) IP.
>>
>> Signed-off-by: Kamil Konieczny
>&
Hi Krzysztof,
On 23.01.2019 09:13, Krzysztof Kozlowski wrote:
> On Tue, 22 Jan 2019 at 16:26, Kamil Konieczny
> wrote:
>>
>> Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
>>
>> Signed-off-by: Kamil Konieczny
>> [...]
>>
Add slimSSS node to DT and crypto AES support for Exynos5433. Tested on
Exynos5433 board with crypto run-time self tests and with tcrypt with
command insmod tcrypt.ko mode=500 sec=1
Kamil Konieczny (3):
arm64: dts: exynos: add SlimSSS for Exynos5433
dt-bindings: crypto: document Exynos5433
Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
SubSystem) IP.
Signed-off-by: Kamil Konieczny
---
.../devicetree/bindings/crypto/samsung-sss.txt | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings
Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 50
1 file changed, 46 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p
ontrol;
> unsigned long flags;
> int err;
> - u8 *iv;
> + u8 *iv, *ctr;
>
> + /* This sets bit [13:12] to 00, which selects 128-bit counter */
s/bit/bits/
This this,
Acked-by: Kamil Konieczny
Thanks!
Kamil
off-by: Christoph Manszewski
> Reviewed-by: Krzysztof Kozlowski
Acked-by: Kamil Konieczny
Thanks!
Kamil
toph Manszewski
Acked-by: Kamil Konieczny
Thanks!
Kamil
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
On 17.09.2018 17:09, Christoph Manszewski wrote:
> Fix misalignment of continued argument list.
>
> Signed-off-by: Christoph Manszewski
> Reviewed-by: Krzysztof Kozlowski
Acked-by: Kamil Konieczny
Thanks!
Kamil
> ---
> drivers/crypto/s5p-sss.c | 4 ++--
> 1 file
rd HW with spinlock,
as in exynos hash in s5p-sss.c (or see other drivers).
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
> prefixes has no bearing on its value.
>
> The signature length, however was incorrect, which is a problem for RSA
> implementations that need it to be exactly correct (like AMD CCP).
>
> Signed-off-by: Maciej S. Szmigiero
your e-mail address looks incorrect
[...]
--
B
mind the resource allocation and
> clean-up.
> +No resources related to request objects should remain allocated after a call
--
> +to .init() or .update(), since there might be no chance to free them.
is it for crypto api users or for drivers ?
the creator of request context is re
gt;
> /* Assumes SPU-M messages are in big endian */
> void spum_dump_msg_hdr(u8 *buf, unsigned int buf_len)
> diff --git a/drivers/crypto/bcm/spu.h b/drivers/crypto/bcm/spu.h
> index f252367..71cf6b5 100644
> --- a/drivers/crypto/bcm/spu.h
> +++ b/drivers/crypto/bcm/spu.h
> @@ -111,7 +111,7 @@ enum aead_type {
> AEAD_TYPE_LAST
> };
>
> -extern char *hash_alg_name[HASH_ALG_LAST];
> +extern const char * const hash_alg_name[HASH_ALG_LAST];
>
> struct spu_request_opts {
> bool is_inbound;
>
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
Prevent improper use of req->result field in ahash update, init, export and
import functions in drivers code. A driver should use ahash request context
if it needs to save internal state.
Signed-off-by: Kamil Konieczny
---
version 2:
Change req->digest to req->result, as pointed o
On 06.03.2018 19:04, Tom Lendacky wrote:
> On 3/6/2018 5:45 AM, Kamil Konieczny wrote:
>> Prevent improper use of req->digest field in ahash update, init, export and
>
> Shouldn't that be req->result (here and below)?
Yes, it should, I will send version 2 soon,
thank
Prevent improper use of req->digest field in ahash update, init, export and
import functions in drivers code. A driver should use ahash request context
if it needs to save internal state.
Signed-off-by: Kamil Konieczny
---
include/crypto/hash.h | 11 +++
1 file changed, 7 inserti
On 05.03.2018 18:47, Gary R Hook wrote:
> On 03/05/2018 03:57 AM, Kamil Konieczny wrote:
>>
>>
>> On 02.03.2018 22:11, Gary R Hook wrote:
>>> Commit 466d7b9f6 (cryptodev-2.6) added code to testmgr to populate, for
>>> async hash operations,
>>>
hen drivers try to use req->result
as theirs temporary storage.
The bug comes up in some scenarios when caller reused ahash request
and leaves in req->result undefined value, it can be NULL or container_of(NULL)
or whatever was on stack
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
On 16.02.2018 15:54, Boris Brezillon wrote:
> Adding back all the people that were Cc-ed on the initial email.
>
> On Fri, 16 Feb 2018 15:18:21 +0100
> Kamil Konieczny wrote:
>
>> On 16.02.2018 15:00, Boris Brezillon wrote:
>>> On Fri, 16 Feb 2018 12:21:53 +0
On 15.02.2018 19:32, Marek Vasut wrote:
> On 02/15/2018 07:06 PM, Kamil Konieczny wrote:
>>
>>
>> On 15.02.2018 18:06, Marek Vasut wrote:
>>> On 02/15/2018 06:00 PM, Kamil Konieczny wrote:
>>>>
>>>>
>>>> On 15.02.2018 17:27,
On 15.02.2018 18:06, Marek Vasut wrote:
> On 02/15/2018 06:00 PM, Kamil Konieczny wrote:
>>
>>
>> On 15.02.2018 17:27, Marek Vasut wrote:
>>> On 02/15/2018 04:41 PM, Herbert Xu wrote:
>>>> On Thu, Jan 18, 2018 at 07:33:59PM +0100, Kamil Konieczny wrot
On 15.02.2018 17:27, Marek Vasut wrote:
> On 02/15/2018 04:41 PM, Herbert Xu wrote:
>> On Thu, Jan 18, 2018 at 07:33:59PM +0100, Kamil Konieczny wrote:
>>> First four patches add empty hash export and import functions to each
>>> driver,
>>> with the same b
In AES-ECB mode crypt is done with key only, so any use of IV
can cause kernel Oops. Use IV only in AES-CBC and AES-CTR.
Signed-off-by: Kamil Konieczny
Reported-by: Anand Moon
Reviewed-by: Krzysztof Kozlowski
Tested-by: Anand Moon
Cc: sta...@vger.kernel.org # can be applied after commit
In AES-ECB mode crypt is done with key only, so any use of IV
can cause kernel Oops. Use IV only in AES-CBC and AES-CTR.
Signed-off-by: Kamil Konieczny
Reported-by: Anand Moon
Reviewed-by: Krzysztof Kozlowski
Tested-by: Anand Moon
Cc: sta...@vger.kernel.org
Fixes: 8f9702aad138 ("crypto
On 06.02.2018 17:48, Anand Moon wrote:
> Hi Kamil,
>
> Thanks for providing the fix to this issue.
>
> On 5 February 2018 at 23:10, Kamil Konieczny
> wrote:
>>
>> In AES-ECB mode crypt is done with key only, so any use of IV
>> can cause kernel Oops, as repo
In AES-ECB mode crypt is done with key only, so any use of IV
can cause kernel Oops, as reported by Anand Moon.
Fixed it by using IV only in AES-CBC and AES-CTR.
Signed-off-by: Kamil Konieczny
Reported-by: Anand Moon
---
Tested on Odroid XU4/HC1, kernel 4.15 with following command:
fallocate
On 24.01.2018 15:01, Krzysztof Kozlowski wrote:
> On Wed, Jan 24, 2018 at 2:04 PM, Anand Moon wrote:
>> Hi Kamil Konieczny,
>>
>> I am looking in setup of encrypted sata hard-disk on Odroid XU4/HC1 device.
>> using following encryption method.
>>
>&
On 31.01.2018 06:51, Anand Moon wrote:
> Hi Kamil,
>
> On 30 January 2018 at 21:02, Kamil Konieczny
> wrote:
>> Hi Anand,
>>
>> On 24.01.2018 14:04, Anand Moon wrote:
>>> Hi Kamil Konieczny,
>>>
>>> I am looking in setup of encrypted sat
Hi Anand,
On 24.01.2018 14:04, Anand Moon wrote:
> Hi Kamil Konieczny,
>
> I am looking in setup of encrypted sata hard-disk on Odroid XU4/HC1 device.
> using following encryption method.
>
> aes-cbc-essiv:sha256 128
> aes-cbc-essiv:sha256 256
>
> Here is my
On 19.01.2018 11:08, Marek Vasut wrote:
> On 01/19/2018 10:53 AM, Kamil Konieczny wrote:
>> On 18.01.2018 22:31, Marek Vasut wrote:
>>> On 01/18/2018 07:34 PM, Kamil Konieczny wrote:
>>>> Export and import are mandatory in async hash. As drivers were
>>&
On 18.01.2018 22:31, Marek Vasut wrote:
> On 01/18/2018 07:34 PM, Kamil Konieczny wrote:
>> Export and import are mandatory in async hash. As drivers were
>> rewritten, drop empty wrappers and correct init of ahash transformation.
>
> Are you moving checks from the core
7;
will be enabled.
Signed-off-by: Kamil Konieczny
Acked-by: Linus Walleij
---
drivers/crypto/ux500/hash/hash_core.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/crypto/ux500/hash/hash_core.c
b/drivers/crypto/ux500/hash/hash_core.c
index 9acccad26928..2d0a677bc
7; will be enabled.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/bfin_crc.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/crypto/bfin_crc.c b/drivers/crypto/bfin_crc.c
index a118b9bed669..65a8e07835e8 100644
--- a/drivers/crypto/bfin_crc.c
+++ b/drivers/crypto/
Export and import are mandatory in async hash. As drivers were
rewritten, drop empty wrappers and correct init of ahash transformation.
Signed-off-by: Kamil Konieczny
---
crypto/ahash.c | 18 ++
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/crypto/ahash.c b
7;
will be enabled.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/mxs-dcp.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/crypto/mxs-dcp.c b/drivers/crypto/mxs-dcp.c
index 764be3e6933c..a10c418d4e5c 100644
--- a/drivers/crypto/mxs-dcp.c
+++ b/drivers/crypto
7;
will be enabled.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/n2_core.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/crypto/n2_core.c b/drivers/crypto/n2_core.c
index 662e709812cc..80e9c842aad4 100644
--- a/drivers/crypto/n2_core.c
+++ b/drivers/crypto/n2_core.c
unreleated patches
make commit message more descriptive
Kamil Konieczny (5):
crypto: mxs-dcp: Add empty hash export and import
crypto: n2_core: Add empty hash export and import
crypto: ux500/hash: Add empty export and import
crypto: bfin_crc: Add empty hash export and import
crypto: ahash.c
Please drop this as I will resend it as part of patchset.
On 16.01.2018 17:32, Kamil Konieczny wrote:
> Crypto framework will require async hash export/import, so add empty
> functions to prevent OOPS.
>
> Signed-off-by: Kamil Konieczny
> ---
> drivers/crypto/ux500/has
Please drop this as I will resend it as part of patchset.
On 16.01.2018 17:18, Kamil Konieczny wrote:
> Crypto framework will require async hash export/import, so add empty
> functions to prevent OOPS.
>
> Signed-off-by: Kamil Konieczny
> ---
> drivers/crypto/n2_core.c | 12
Please drop this as I will resend it as part of patchset.
On 16.01.2018 17:16, Kamil Konieczny wrote:
> Crypto framework will require async hash export/import, so add empty
> functions to prevent OOPS.
>
> Signed-off-by: Kamil Konieczny
> ---
> drivers/crypto/mxs-dcp.c | 14 +
On 18.01.2018 11:06, Linus Walleij wrote:
> On Tue, Jan 16, 2018 at 5:32 PM, Kamil Konieczny
> wrote:
>
>> Crypto framework will require async hash export/import, so add empty
>> functions to prevent OOPS.
>>
>> Signed-off-by: Kamil Konieczny
>
> Acke
On 16.01.2018 19:38, Kamil Konieczny wrote:
> Export and import were optional in async hash. As most drivers were
> rewritten, they become mandatory now, so correct init of ahash
> transformation.
>
> Signed-off-by: Kamil Konieczny
Please drop this patch, as there is one more dr
Export and import were optional in async hash. As most drivers were
rewritten, they become mandatory now, so correct init of ahash
transformation.
Signed-off-by: Kamil Konieczny
---
This is resend of previous patch. As Bartlomiej Zolnierkiewicz pointed out,
there are still three crypto drivers
On 16.01.2018 18:28, Fabio Estevam wrote:
> Hi Kamil,
>
> On Tue, Jan 16, 2018 at 2:16 PM, Kamil Konieczny
> wrote:
>> Crypto framework will require async hash export/import, so add empty
>> functions to prevent OOPS.
>
> Which Oops exactly are you getting?
N
On 16.01.2018 17:56, Marek Vasut wrote:
> On 01/16/2018 05:16 PM, Kamil Konieczny wrote:
>> Crypto framework will require async hash export/import, so add empty
>> functions to prevent OOPS.
>
> Shouldn't this be handled on the subsystem level with some
>
Crypto framework will require async hash export/import, so add empty
functions to prevent OOPS.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/ux500/hash/hash_core.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/crypto/ux500/hash/hash_core.c
b/drivers
Crypto framework will require async hash export/import, so add empty
functions to prevent OOPS.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/n2_core.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/crypto/n2_core.c b/drivers/crypto/n2_core.c
index 662e709812cc
Crypto framework will require async hash export/import, so add empty
functions to prevent OOPS.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/mxs-dcp.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/crypto/mxs-dcp.c b/drivers/crypto/mxs-dcp.c
index 764be3e6933c
Async hash operations can use result pointer in final/finup/digest,
but not in init/update/export/import, so test it for misuse.
Signed-off-by: Kamil Konieczny
---
Tested with crypto run-time self test on Odroid-U3 with Exynos 4412 CPU
with insmod s5p-sss.ko
crypto/testmgr.c | 39
Export and import were optional in async hash. As drivers were rewritten,
they become mandatory now, so correct init of ahash transformation.
Signed-off-by: Kamil Konieczny
---
Tested with crypto run-time self test on Odroid-U3 with Exynos 4412 CPU,
with insmod s5p-sss.ko
Please test with other
On 08.01.2018 16:56, Herbert Xu wrote:
> On Mon, Jan 08, 2018 at 02:11:21PM +0100, Kamil Konieczny wrote:
>>
>>
>> On 07.01.2018 00:01, Tobin C. Harding wrote:
>>> SPHINX build emits multiple warnings of kind:
>>>
>>> warning: duplicate secti
-by: Kamil Konieczny
---
Changes:
v2: clarify reasons for co-maintenance.
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index aa71ab52fd76..3f6cadf2e087 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11982,6 +11982,7 @@ F: drivers/media/i2c
Hi Herbert,
On 01.12.2017 11:36, Herbert Xu wrote:
> On Fri, Dec 01, 2017 at 11:18:30AM +0100, Kamil Konieczny wrote:
>>
>> Herbert, is it possible for every init/update that areq->result can be NULL,
>> and only for final/update/digit user set it to actual memory ?
>&g
Hi Antoine,
On 01.12.2017 11:24, Antoine Tenart wrote:
> Hi Kamil,
>
> On Fri, Dec 01, 2017 at 11:18:30AM +0100, Kamil Konieczny wrote:
>> On 01.12.2017 09:11, Antoine Tenart wrote:
>>> - Other drivers are doing this check (grep "if (!req->result)" or
>>
Hi All,
On 01.12.2017 09:11, Antoine Tenart wrote:
> Hi Herbert,
>
> On Fri, Dec 01, 2017 at 11:31:09AM +1100, Herbert Xu wrote:
>> On Thu, Nov 30, 2017 at 10:19:26AM +0100, Kamil Konieczny wrote:
>>>
>>> can the driver get request for final/finup/digest w
On 30.11.2017 13:41, Antoine Tenart wrote:
> On Thu, Nov 30, 2017 at 12:52:42PM +0100, Kamil Konieczny wrote:
>> On 30.11.2017 10:29, Antoine Tenart wrote:
>>> On Thu, Nov 30, 2017 at 10:19:26AM +0100, Kamil Konieczny wrote:
>>>> can the driver get request for fi
Hi Antoine,
On 30.11.2017 10:29, Antoine Tenart wrote:
> Hi Kamil,
>
> On Thu, Nov 30, 2017 at 10:19:26AM +0100, Kamil Konieczny wrote:
>> On 28.11.2017 16:42, Antoine Tenart wrote:
>>> The patch fixes the ahash support by only updating the result buffer
>>> wh
sg_nents_for_len(areq->src, areq->nbytes), DMA_TO_DEVICE);
>
can the driver get request for final/finup/digest with null req->result ?
If yes (?), such checks can be done before any hardware processing, saving time,
for example:
int hash_final(struct ahash_request *areq)
{
Add myself as co-maintainer for Samsung Security SubSystem driver.
Signed-off-by: Kamil Konieczny
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index aa71ab52fd76..3f6cadf2e087 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11982,6 +11982,7 @@ F
On 27.09.2017 11:08, Herbert Xu wrote:
> On Tue, Sep 26, 2017 at 01:09:05PM +0200, Kamil Konieczny wrote:
>>
>> Can import() be called without _any_ init(), for example
>> after reboot of machine ? Is following scenario valid:
>
> Of course it can. import must resto
Zapolskiy
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Kamil Konieczny
---
drivers/crypto/Kconfig | 14 +
drivers/crypto/s5p-sss.c | 1406 +-
2 files changed, 1410 insertions(+), 10 deletions(-)
diff --git a/drivers/crypto/Kconfig b/drivers
Change #define lines to use tabs consistently.
Acked-by: Vladimir Zapolskiy
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 190 +++
1 file changed, 95 insertions(+), 95 deletions(-)
diff --git a
move FLOW_LOG, FLOW_DUMP macros and its uses
- remove #if 0 ... endif
- remove unused function hash_wait and its defines
- fix compiler warning in dev_dbg
- remove some comments
- other minor fixes in comments
Kamil Konieczny (2):
crypto: s5p-sss: Change spaces to tabs
crypto: s5p-sss: Add HASH suppo
Hi Vladimir,
Thank you for review, I will apply almost all of your remarks,
see answers below.
On 22.10.2017 12:18, Vladimir Zapolskiy wrote:
> Hi Kamil,
>
> thank you for updates, I have just a few more comments.
>
> On 10/17/2017 02:28 PM, Kamil Konieczny wrote:
>>
Hi Vladimir,
Thank you for review.
On 22.10.2017 12:18, Vladimir Zapolskiy wrote:
> Hi Kamil,
>
> On 10/17/2017 02:28 PM, Kamil Konieczny wrote:
>> change spaces into tabs in defines
>
> Here a grammatically correct sentence in English is welcome.
What about: &
tcrypt sec=1 mode=N
where N=402, 403, 404 (MD5, SHA1, SHA256).
Modifications in drivers/crypto/Kconfig:
- Add new CRYPTO_DEV_EXYNOS_HASH, depend on !EXYNOS_RNG
and CRYPTO_DEV_S5P
- Select sw algorithms MD5, SHA1 and SHA256 in EXYNOS_HASH
as they are nedded for fallback.
Signed-off-by: Kamil
style fixups in aes, as they should go in separate patch
- remove FLOW_LOG, FLOW_DUMP macros and its uses
- remove #if 0 ... endif
- remove unused function hash_wait and its defines
- fix compiler warning in dev_dbg
- remove some comments
- other minor fixes in comments
Kamil Konieczny (2):
chang
change spaces into tabs in defines
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 190 +++
1 file changed, 95 insertions(+), 95 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index 7ac657f46d15
On 17.10.2017 12:07, Krzysztof Kozlowski wrote:
> On Mon, Oct 16, 2017 at 7:43 PM, Kamil Konieczny
> wrote:
>> Add support for MD5, SHA1, SHA256 hash algorithms for Exynos HW.
>>[...]
>> +#if IS_ENABLED(CONFIG_CRYPTO_DEV_EXYNOS_HASH)
>
> I missed that in v5 becaus
Hi all,
sorry for error in subject line, it should be [PATCH v6 0/2] and so on,
I can resend this if needed ?
On 16.10.2017 19:43, Kamil Konieczny wrote:
> First patch cleans up spaces in defines, second adds HASH support for Exynos.
> Changes:
--
Best regards,
Kamil Konieczny
Samsu
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