Hi folks,
With the enormous help of people in the to and CCed lists I've gotten
the ccree driver to a point I believe it is ready to graduate out of
the staging tree:
- The code base has been reduced by something by 30% and is *much*
more readable and manageable.
- The very few checkpatch warnin
From: Sean Wang
When hw_random device's quality is non-zero, it will automatically fill
the kernel's entropy pool at boot. For the purpose, one conservative
quality value is being picked up as the default value.
Signed-off-by: Sean Wang
---
drivers/char/hw_random/mtk-rng.c | 1 +
1 file chang
In this patch, the infrastructure needed to support multibuffer
encryption implementation is added:
a) Enhance mcryptd daemon to support skcipher requests.
b) Add multi-buffer mcryptd skcipher helper which presents the
top-level algorithm as an skcipher.
b) Update configuration to include mul
This patch introduces the assembly routine to do a by8 AES CBC
encryption in support of the AES CBC multi-buffer implementation.
It encrypts 8 data streams of the same key size simultaneously.
Originally-by: Chandramouli Narayanan
Signed-off-by: Megha Dey
Acked-by: Tim Chen
---
arch/x86/crypt
This patch introduces the multi-buffer job manager which is responsible
for submitting scatter-gather buffers from several AES CBC jobs
to the multi-buffer algorithm. The glue code interfaces with the
underlying algorithm that handles 8 data streams of AES CBC encryption
in parallel. AES key expans
This patch implements in-order scheduler for encrypting multiple buffers
in parallel supporting AES CBC encryption with key sizes of
128, 192 and 256 bits. It uses 8 data lanes by taking advantage of the
SIMD instructions with XMM registers.
The multibuffer manager and scheduler is mostly written
This patch introduces the data structures and prototypes of functions
needed for doing AES CBC encryption using multi-buffer. Included are
the structures of the multi-buffer AES CBC job, job scheduler in C and
data structure defines in x86 assembly code.
Originally-by: Chandramouli Narayanan
Sign
In this patch series, we introduce AES CBC encryption that is parallelized
on x86_64 cpu with XMM registers. The multi-buffer technique encrypt 8
data streams in parallel with SIMD instructions. Decryption is handled as
in the existing AESNI Intel CBC implementation which can already
parallelize de
On Thu, 2017-08-03 at 13:27 +0800, Herbert Xu wrote:
> On Tue, Jul 25, 2017 at 07:09:58PM -0700, Megha Dey wrote:
> >
> > +/* notify the caller of progress ; request still stays in queue */
> > +
> > +static void notify_callback(struct mcryptd_skcipher_request_ctx *rctx,
> > +
Implement the SHA-512 using the new special instructions that have
been introduced as an optional extension in ARMv8.2.
Signed-off-by: Ard Biesheuvel
---
arch/arm64/crypto/Kconfig | 6 ++
arch/arm64/crypto/Makefile | 3 +
arch/arm64/crypto/sha512-ce-core.S | 207
Replace GPL license statement with SPDX GPL-2.0 license identifier and
correct the module license to GPLv2.
The license itself was a generic GPL because of copy-and-paste from old
drivers/char/hw_random/exynos-rng.c driver (on which this was based on).
However the module license indicated GPL-2.0
Replace GPL license statement with SPDX GPL-2.0 license identifier.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 24 ++--
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index 62830a43d95
Remove include files not needed for compilation.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/cc_aead.c| 7 ---
drivers/staging/ccree/cc_buffer_mgr.c | 6 --
drivers/staging/ccree/cc_cipher.c | 4
drivers/staging/ccree/cc_driver.c | 31
The ccree driver source files were using an inconsistent
naming convention stemming from what the company was called
when they were added.
Move to a single consistent naming convention for better
code readability.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/Makefile
Add the missing include of include file with function declarations.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/cc_debugfs.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/staging/ccree/cc_debugfs.c
b/drivers/staging/ccree/cc_debugfs.c
index f927a73..08f8db4 100644
--
On Tue, Jan 09, 2018 at 05:52:06PM +0800, Anson Huang wrote:
> Add i.MX7 SNVS RTC clock.
>
> Signed-off-by: Anson Huang
Acked-by: Dong Aisheng
Regards
Dong Aisheng
The debugfs interface defines stub function if debugfs is not
enabled, which were missing the 'static inline' qualifiers causing
sparse warnings.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/cc_debugfs.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/dri
The dma mask var was defined as dma_addr_t but should be
u64. This showed as a sparse warning when building for 32 bit.
Fix it by changing type to u64 and drop the cast.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/cc_driver.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-
File name consistency renames, include files diet and address
some sparse warnings.
Gilad Ben-Yossef (5):
staging: ccree: use a consistent file naming convention
staging: ccree: remove unneeded includes
staging: ccree: add missing include
staging: ccree: make stub function static inline
According to the i.MX7D Reference Manual,
SNVS block has a clock gate, accessing SNVS block
would need this clock gate to be enabled, add it
into clock tree so that SNVS module driver can
operate this clock gate.
Signed-off-by: Anson Huang
Acked-by: Dong Aisheng
Reviewed-by: Fabio Estevam
---
Best Regards!
Anson Huang
> -Original Message-
> From: Dong Aisheng [mailto:donga...@gmail.com]
> Sent: 2018-01-09 5:44 PM
> To: Anson Huang
> Cc: Horia Geantă ; Aymen Sghaier
> ; herb...@gondor.apana.org.au;
> da...@davemloft.net; robh...@kernel.org; mark.rutl...@arm.com;
> shawn...@k
Add i.MX7 SNVS RTC clock.
Signed-off-by: Anson Huang
---
change since v3:
add optional for clocks in binding doc statement.
Documentation/devicetree/bindings/crypto/fsl-sec4.txt | 17 +
arch/arm/boot/dts/imx7s.dtsi | 2 ++
2 files changed, 19 ins
Best Regards!
Anson Huang
> -Original Message-
> From: Dong Aisheng [mailto:donga...@gmail.com]
> Sent: 2018-01-09 5:47 PM
> To: Anson Huang
> Cc: Horia Geantă ; Aymen Sghaier
> ; herb...@gondor.apana.org.au;
> da...@davemloft.net; robh...@kernel.org; mark.rutl...@arm.com;
> shawn...@k
On 9 January 2018 at 11:47, Ard Biesheuvel wrote:
> On 9 January 2018 at 08:31, Riku Voipio wrote:
>> Hi,
>>
>> Loading omap_rng module on McBin causes hangup (in about 9/10 times).
>> Looking at /proc/interrupts it seems the interrupt starts running like
>> crazy, and after a while the whole sys
On 9 January 2018 at 08:31, Riku Voipio wrote:
> Hi,
>
> Loading omap_rng module on McBin causes hangup (in about 9/10 times).
> Looking at /proc/interrupts it seems the interrupt starts running like
> crazy, and after a while the whole system is unresponsive. This with
> Debian kernel (everything
On Tue, Jan 09, 2018 at 05:20:51PM +0800, Anson Huang wrote:
> Add i.MX7 SNVS RTC clock.
>
> Signed-off-by: Anson Huang
> ---
> changes since v2:
> improve the binding doc statement about clocks.
> Documentation/devicetree/bindings/crypto/fsl-sec4.txt | 15 +++
> arch/arm/boot/
On Tue, Jan 09, 2018 at 05:20:50PM +0800, Anson Huang wrote:
> According to the i.MX7D Reference Manual,
> SNVS block has a clock gate, accessing SNVS block
> would need this clock gate to be enabled, add it
> into clock tree so that SNVS module driver can
> operate this clock gate.
>
> Signed-off
Add i.MX7 SNVS RTC clock.
Signed-off-by: Anson Huang
---
changes since v2:
improve the binding doc statement about clocks.
Documentation/devicetree/bindings/crypto/fsl-sec4.txt | 15 +++
arch/arm/boot/dts/imx7s.dtsi | 2 ++
2 files changed, 17 insert
According to the i.MX7D Reference Manual,
SNVS block has a clock gate, accessing SNVS block
would need this clock gate to be enabled, add it
into clock tree so that SNVS module driver can
operate this clock gate.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx7d.c | 1 +
inclu
On 9 January 2018 at 11:21, Gregory CLEMENT
wrote:
> Hi Riku,
>
> On mar., janv. 09 2018, Riku Voipio wrote:
>
>> Hi,
>>
>> Loading omap_rng module on McBin causes hangup (in about 9/10 times).
>> Looking at /proc/interrupts it seems the interrupt starts running like
>> crazy, and after a while
Best Regards!
Anson Huang
> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: 2018-01-09 5:27 PM
> To: Anson Huang
> Cc: Horia Geantă ; Aymen Sghaier
> ; Herbert Xu ;
> David S. Miller ; Rob Herring ;
> Mark Rutland ; Shawn Guo ;
> Sascha Hauer ; Fabio Esteva
Hi Anson,
On Tue, Jan 9, 2018 at 12:51 AM, Anson Huang wrote:
> + - clocks
> + Usage: required if SNVS LP RTC requires explicit enablement of clocks
> + Value type:
> + Definition: A list of phandle and clock specifier pairs describing
> + the clocks required for enab
Hi Riku,
On mar., janv. 09 2018, Riku Voipio wrote:
> Hi,
>
> Loading omap_rng module on McBin causes hangup (in about 9/10 times).
> Looking at /proc/interrupts it seems the interrupt starts running like
> crazy, and after a while the whole system is unresponsive. This with
> Debian kernel (e
Hi,
Loading omap_rng module on McBin causes hangup (in about 9/10 times).
Looking at /proc/interrupts it seems the interrupt starts running like
crazy, and after a while the whole system is unresponsive. This with
Debian kernel (everything possible as modules) and EFI as bootloader.
The EFI firmwa
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