On Fri, 31 Oct 2014 18:57:33 +0200
Cristian Stoica wrote:
> The error code returned by hardware is four bits wide with an expected
> zero MSB. A hardware error condition where the error code can get between
> 0x8 and 0xf will trigger an out of bound array access on the error
> message table.
If
The error code returned by hardware is four bits wide with an expected
zero MSB. A hardware error condition where the error code can get between
0x8 and 0xf will trigger an out of bound array access on the error
message table.
This patch fixes the invalid array access following such an error and
re
Am Freitag, 31. Oktober 2014, 10:09:52 schrieb Marek Vasut:
Hi Marek,
> On Friday, October 31, 2014 at 08:23:53 AM, Herbert Xu wrote:
> > On Fri, Oct 31, 2014 at 04:01:04AM +0100, Marek Vasut wrote:
> > > I can share the last state of the document I wrote. Currently,
> > > it is not possible for
Add support for one-shot givencrypt algorithms.
Givencrypt algorithms will generate their IV and encrypt data
within the same shared job descriptors.
Current algorithms merged from ablkcipher to givencrypt are:
- AES Cipher Block Chaining (CBC)
- AES Counter Mode (CTR) compliant with RFC3686
Sig
Add support for AES working in Counter Mode
Signed-off-by: Catalin Vasile
---
drivers/crypto/caam/caamalg.c | 40 ++-
drivers/crypto/caam/desc_constr.h | 2 ++
2 files changed, 37 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/caam/caamalg.c b
Add support for Advanced Encryption Standard (AES) in Counter Mode (CTR)
as provided in IPsec implementation standard RFC3686.
ablkcipher shared descriptors now save context registers after job
execution. This is used to load Nonce specific to RFC3686 only at
first execution of shared job descript
Add support for AES Counter Mode (CTR) compliant with RFC3686 to be
used along with authenc algorithms (md5, sha1, sha224, sha256, sha384,
sha512) as one-shot aead algorithms.
Signed-off-by: Catalin Vasile
---
drivers/crypto/caam/caamalg.c | 262 +-
1 file
On Fri, Oct 31, 2014 at 10:57:06AM +0100, Maxime Ripard wrote:
>
> On a 3.18-rc2 kernel:
>
> $ git grep kmap -- crypto/
> crypto/ahash.c: walk->data = kmap(walk->pg);
> crypto/ahash.c: walk->data = kmap_atomic(walk->pg);
> crypto/async_tx/async_memcp
On Fri, Oct 31, 2014 at 04:18:03PM +0800, Herbert Xu wrote:
> On Fri, Oct 31, 2014 at 09:13:23AM +0100, Maxime Ripard wrote:
> >
> > I don't understand here. Why would other drivers *not* being affected?
> >
> > If the scatter list passed by AF_ALG can be in highmem, I guess it's
> > the case for
On Friday, October 31, 2014 at 08:23:53 AM, Herbert Xu wrote:
> On Fri, Oct 31, 2014 at 04:01:04AM +0100, Marek Vasut wrote:
> > I can share the last state of the document I wrote. Currently,
> > it is not possible for me to keep up with my workload and do
> > anything else, so that's all I can do.
On Fri, Oct 31, 2014 at 09:13:23AM +0100, Maxime Ripard wrote:
>
> I don't understand here. Why would other drivers *not* being affected?
>
> If the scatter list passed by AF_ALG can be in highmem, I guess it's
> the case for every driver out there. Almost every kernel code I've
> seen so far make
On Fri, Oct 31, 2014 at 03:20:30PM +0800, Herbert Xu wrote:
> On Thu, Oct 30, 2014 at 06:19:33PM +0100, Maxime Ripard wrote:
> >
> > > With AF_ALG and cryptodev, the SG is in highmem. Verified with some
> > > PageHighMem().
> >
> > Then fix AF_ALG and cryptodev, because all of the other drivers mi
On Fri, Oct 31, 2014 at 04:01:04AM +0100, Marek Vasut wrote:
>
> I can share the last state of the document I wrote. Currently,
> it is not possible for me to keep up with my workload and do
> anything else, so that's all I can do.
Posting your latest revision would be great.
Thanks!
--
Email: H
On Thu, Oct 30, 2014 at 06:19:33PM +0100, Maxime Ripard wrote:
>
> > With AF_ALG and cryptodev, the SG is in highmem. Verified with some
> > PageHighMem().
>
> Then fix AF_ALG and cryptodev, because all of the other drivers might
> be affected.
No it's the driver that needs to be fixed. Of cours
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