Submitting patch for Bug #879725:
http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01459.html
Looking at the performance results running SMS with automatic testing.
This is my last week in Linaro so I would also like to thank you all
for the interesting year -- it was a great experience for me to work
Re-submitted the patch to estimate register pressure in SMS to the
gcc-patches ml after discussing the patch with Richard.
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Continue working on the patch to estimate register pressure on SMS:
Addressing the comments received from Richard and Ayal.
Testing the patch on libav micro benchmarks.
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Addressing the comments received from Richard and Ayal regarding the
patch to estimate register pressure.
Testing the patch on eembc and libav micro benchmarks.
Looking at the regressions seen with SMS.
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Sent the patch which implements register pressure estimation in SMS to
the gcc mailing list as RFC.
I looked at some of the regressions in libav and intend to continue
with that this week.
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Hi,
> Anyway, I think this explains why the non-SMS loop executes more
> quickly than GCC expects, and why the SMS loop is slower than it
> needs to be. It might be worth comparing the two loops with
> -mtune=cortex-a8.
Thanks for the detailed explanation!
I see this regression on cortex-a8 as
Hi,
> Are there any other topics that folks want to bring up ?
There are some issues exposed while testing the register pressure
estimation for SMS that I would to get some feedback on:
As discussed off-line; one thing is related to the note_uses function
which currently does not take element z
Testing the SMS register pressure estimation on libav micro benchmarks
and eembc.
Discussed with Ayal the implementation. He had some ideas to consider
regarding the it.
Looking into the regressions of SMSed kernels in libav which are not
related to register pressure:
Consulting with Ayal regarding
Continue working on the regsiter pressure estimation implementation -
testing the implementation on libav micro benchmarks.
With the patch some SMSed kernels in put-h264-qpel8-hv-lowpass-8,
swscale-rgb24ToY_c mjpegenc benchmarks are identified as having
register pressure.
I'm looking at the kernels
Testing an initial version of the implementation which estimates
register pressure in SMS on libav micro benchmarks.
I see 20% improvements in mjpegenc microbench and 11% on aacsbr-2 with
SMS. However swscale-rgb24ToY_c
still have spills in the final code although it requires maximum 64
VFP_REGS re
Hello,
Continue the implementation of estimating register pressure in SMS.
Discussed with Richard some issue raised while implementing.
Revital
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Implementing estimating register pressure in SMS.
Experimenting with the implementation on libav microbench.
Discussed with Richard some issue raised while implementing.
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Continue working on estimating register pressure with SMS:
- Discussed current approach with Richard which gave useful leads.
- Started to implement this approach.
- Doing experiments on libav microbench.
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Committed to mainline the patch to support instructions with auto-inc
operations in SMS after addressing Ayal's comments. The patch contains
two parts; one of them fixes a bug revealed during bootstrapping with
the patch and SMS flags.
http://gcc.gnu.org/ml/gcc-patches/2011-09/msg01988.html
http://
Debugging the new version of the patch to support
instructions with REG_INC_NOTE in SMS which caused bootstrap failure.
(http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01216.html)
A fix was tested and submitted:
[PATCH, SMS 1/2] Avoid generating redundant reg-moves
http://gcc.gnu.org/ml/gcc-patches/2
* Added testcases to Richard's micro benchmarks taken from libav.
* Discussed with Ayal the new version of the patch to support
instructions with
REG_INC_NOTE in SMS which causes bootstrap failure. I intend to debug
the bootstrap failure in order to find the cause for it.
(http://gcc.gnu.org/ml/gcc
Continue looking at Richard's micro benchmarks taken from libav w.r.t
SMS and experiment with different patches that Richard wrote to
improve code generation.
Submitted SMS related patch for minor misc fixes
http://gcc.gnu.org/ml/gcc-patches/2011-09/msg00551.html
Trying to understand why to new ver
Hello,
> - Is SMS arch-specific, or is this implementation in particular
> ARM-specific?
SMS and the GCC implementation are not arch-specific. In general,
SMS should be beneficial when applied on in-order machines (or
machines with limited OOO capabilities).
>
> - What's the expecte
Hi,
Following our last performance meeting; I started a wiki page which
describes how to use SMS:
https://wiki.linaro.org/WorkingGroups/ToolChain/UsingSMS
Thanks,
Revital
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Continue looking at Richard's micro benchmarks w.r.t SMS.
Examining Ayal's comments to the patch to support instructions with
REG_INC_NOTE in SMS.
(http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01216.html)
Took one day off yestarday (4/9)
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Continue looking at Richard's micro benchmarks w.r.t SMS.
Wrote a new version to the patch to support instructions with
REG_INC_NOTE in SMS.
(http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01216.html)
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Hi,
Thanks again for measuring this.
> mjpegenc
> before: 50 runs take 7.31085s
> after: 50 runs take 3.04492s
> speedup: x2.4
mjpegenc and aacsbr-2 contains simple accumulation without
load/store dependence and thus SMS succeeds to improve them.
aacsbr-1 also contains such accumul
Hi,
>> Yes, I also noticed that. When I tested it only one reg-move was
>> created so the scheduling patch would not effect on it.
>
> FWIW, looking at the results I posted yesterday, the scheduling patch
> did improve the results compared with the non-scheduling patch:
You are right! this was my
Hi,
>> btw, do you also have numbers of how much SMS (hopefully) improves
>> performance on top of the vectorized code?
>
> OK, here's a comparison of:
Thanks. I expected more improvements in aacsbr-2 as I see without the
vectorizer options... will look into that.
>
> mjpegenc is another case whe
Hi Richard,
> The effect on my flawed libav microbenchmarks was much greater
> than I imagined. I used the options:
Yeah, thats indeed looks impressive!
btw, do you also have numbers of how much SMS (hopefully) improves
performance on top of the vectorized code?
Thanks,
Revital
> -mcpu=cor
Hello,
>> Currently SMS fails to bootstrap trunk on ARM machine. this should
>> also be taken into account when considering enabling it by default.
>
> Are there bugs reported on the failures?
Yes, PR49789 is opened for it.
Thanks,
Revital
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Hello,
Following today performance call
(https://wiki.linaro.org/WorkingGroups/ToolChain/Meetings/2011-08-23)
here are some points raised regarding the steps towards enabling SMS by default:
* Benchmarks testing:
-- Running benchmarks as EEMBC and SPEC2006 with SMS enabled is
crucial to expose l
Looked at Richard's micro benchmarks w.r.t SMS.
Addressed Ayal's comments to the patch to support instructions with
REG_INC_NOTE in SMS.
(http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01216.html)
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* libauqntum - running the SMSed version on ARM machine did not show
significant improvement. Discussed it with Richard Sandiford.
Apparently in the SMS phase the instructions are of DI mode due to the
fact the loop contains 64 bit operations while they later been
generated as 32 bit operations. Th
* Committed a set of SMS patches to trunk and gcc-linaro branch.
* Implemented a hack to evaluate the potential of SMS on SPEC2006/libqauntum.
* involved in non linaro issue
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* Looking into SMS patches sent to mainline which expands SMS
functionally to avoid using doloop. The patches resolve the recent
bootstrap failure on mainline.
http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01807.html
* Continue looking into 462.libquantum.
__
- Opened PR49789 to record the bootstrap failure with SMS flags.
- SPEC2006/libquantum: Wrote a hack to apply SMS on the hot loop. Need
to make it more accurate.
- Pinged SMS patches in mainline.
- Looking with Ramana on the effect of the Tree reassociation
improvement patch on bwaves
http://gcc.gn
- Tracked the problematic file which contains the loop that causing
bootstrap failure with SMS flags on ARM machine. It is not caused by
SMS but rather due to doloop optimization which is applied when SMS
flags are set. Now working on locating the exact loop and producing a
testcase to reproduce th
- Continue Spec2006 analysis:
Looking into SMS opportunities in SPEC2006/462.libquantum.
- Looking into recent bootstrap failure with SMS flags on ARM -- it
seems to be related to do-loop optimization.
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- Opened PR49385.
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385
- Committed SMS patch to fix recent bootstrap fail on ARM with SMS flags
http://gcc.gnu.org/ml/gcc-patches/2011-06/msg00960.html
- Committed SMS patch to Fix calculation of row_rest_count
http://gcc.gnu.org/ml/gcc-patches/2011-06
Tracked a bootstrap failure with SMS flags on ARM machine exposed in
recent trunk.
Fixed and tested a patch for that.
Tested another SMS patch following comments received from gcc ml@
(http://gcc.gnu.org/ml/gcc-patches/2011-05/msg02294.html)
Following conversation with Micheal, added SPEC2006 anal
Fixed an SMS patch following comments received in the gcc@ ml.
While testing the fix I discovered another issue-- latest mainline
ICEs with SMS flags while building libgcc on ARM configured with
--with-arch=armv7-a.
This new failure does not seem to be related to the above fix and I'm
now investiga
* Set-up SPEC2006 profile runs on PowerPC with trunk.
* Looked at SPEC2006's 462.libquantum.
* PR745743 - compared different versions mentioned in the PR.
* Wrote a patch to fix another issue related to how SMS handles debug_insn.
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Hello,
* Sent 5 SMS related patches for review upstream.
* Backported two SMS patches from mainline to gcc-linaro and
gcc-linaro/4.6 (fixes for unfreed memory)
Thanks,
Revital
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Hello,
- Attended Linaro@UDS.
- SMS patches to support ARM do-loop pattern got approved in mainline
and merged into gcc-linaro 4.6 and 4.5.
- Sent merge request for two patches in trunk. (SMS_fixes_for_unfreed_memory)
- Implemented an optimization for the stage-count and now testing it.
Thanks,
R
Hello,
[1] Regarding the patch 'Support closing_branch_deps'
http://gcc.gnu.org/ml/gcc-patches/2011-03/msg00350.html
Continued discussions with Ayal Zaks (SMS maintainer) regrading this patch.
(http://gcc.gnu.org/ml/gcc-patches/2011-05/msg00250.html)
I'm now working on simplifying the patch for r
Hello,
- Continued analysing DENbench benchmarks.
- Discussed the SMS patched with Ayal Zaks (SMS maintainer).
- Booked the flights for Budapest summit.
Thanks,
Revital
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Hello,
Submitted the following patches to GCC trunk:
[1] Avoid unfreed memory when SMS fails (committed to trunk GCC) -
http://gcc.gnu.org/ml/gcc-patches/2011-04/msg01204.html
[2] Free sccs field (committed to trunk GCC)-
http://gcc.gnu.org/ml/gcc-patches/2011-04/msg01205.html
[3] New flag to app
Hello,
- Tracking down bugs exposed while testing a patch for SMS to avoid
using -fauto-inc-dec flag and preparing fixes for them.
Also, prepared a fix for PR47013.
- Continue looking into DENbench and updating
https://wiki.linaro.org/Internal/ToolChain/Benchmarks.
Thanks,
Revital
_
Hello,
* Submitted merge requests for SMS patch to gcc-linaro and gcc-linaro/4.6.
* Testing SMS patch which extends the current implementation to
consider loops that contain
instructions with REG_INC_NOTE.
* Filed PRs 48336 48380 for recent fails of trunk on ARM.
* Had a chat with Ramana about the
Hello,
Implemented a patch to apply SMS in the presence of instructions with
REG_INC_NOTE. (this occurs in telecom/autocor thus SMS needs to be run
with -fno-auto-inc-dec
flag to be applied)
Sent a merge request to gcc-linaro for the SMS patches.
Thanks to Andrew Stubbs for his help.
https://code
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