Dear contributor, our automatic CI has detected problems related to your
patch(es). Please find some details below. If you have any questions, please
follow up on linaro-toolchain@lists.linaro.org mailing list, Libera's
#linaro-tcwg channel, or ping your favourite Linaro toolchain developer on
Progress:
* UM-2 [QEMU upstream maintainership]
- sent patches that re-sync our defined set of usermode hwcap bits
and ID register bitmasks with what the Linux kernel currently has
- code review
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- FEAT_HBC: wrote and sent patch for this v
On 9/14/23 17:04, Siddhesh Poyarekar wrote:
>
>
> On 2023-09-14 16:32, ci_not...@linaro.org wrote:
>> Dear contributor, our automatic CI has detected problems related to your
>> patch(es). Please find some details below. If you have any questions,
>> please follow up on linaro-toolchain@lists
Hi All,
As Siddhesh has pointed out, 32-bit ARM has other similar nss/* tests failing
with "original exit status 127". We do not have these failures for 64-bit
AArch64.
There seems to be a problem unrelated to Siddhesh's patch.
Adhemerval, would you please investigate what's causing it? I see
