[VIRT-198 # QEMU: SVE Emulation Support ]
Added sve-max-vq cpu property to adjust the sve vector length
from the qemu command-line, a-la "-cpu max,sve-max-vq=N".
[VIRT-249 # SVE System Mode ]
Reorganized all of the load/store helpers to handle bi-endian,
and pass in TCGMemOpIdx for use by softmm
4 day week.
[TCWG-1424] Investigate profile feedback on codesize
Have now got all the data I need, started the process of tidying up
scripts to analyse whether it is worth posting upstream and what the
best default parameters are.
[Misc]
Track down problem on AArch64 build-bot to a likely code-ge
SVE Support ([VIRT-198])
- posted {PATCH} tcg/aarch64: limit mul_vec size Message-Id:
<20180719154248.29669-1-alex.ben...@linaro.org> : done
- finished preparing [talk for HPC workshop on 26th]
- delivered it Thursday evening, recording will go online in due
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ investigated required work for implementing HCR_EL2.TGE (the "trap
general exceptions" bit); identified what we've already implemented,
wrote patches for the other parts, and sent them out for review
+ sent patch to fix GICv3 emulati