Progress:
* VIRT-65 [QEMU upstream maintainership]
+ investigated required work for implementing HCR_EL2.TGE (the "trap
general exceptions" bit); identified what we've already implemented,
wrote patches for the other parts, and sent them out for review
+ sent patch to fix GICv3 emulation bug where we checked the wrong
HCR_EL2 bit when deciding whether to route IRQs to EL2
+ usual release-cycle related work
* VIRT-164 [improve Cortex-M emulation]
+ sent patch to fix a bug where we could escalate to the wrong HardFault
when AIRCR.BFHFNMINS is set
+ fixed bug where we had miswired the IoTKit timer1 IRQ line
+ fixed bug preventing VM state save/load for the NVIC with Security
extensions enabled
+ fixed "use of uninitialized memory" bug in the TZ-MPC model
+ had another look at the requirements for v8M stack-limit checking
+ implemented missing support for MPS2 FPGAIO up/down counter registers
+ started on a model of the CMSDK "dual-timer" module (as part of
looking at what remaining devices in the MPS2 are easy/worth
modelling so we can close out VIRT-182)
thanks
-- PMM
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