== Series Details ==
Series: Add 6k resolution support for a single CRTC (rev3)
URL : https://patchwork.freedesktop.org/series/139978/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/
> -Original Message-
> From: Roper, Matthew D
> Sent: Friday, 25 October 2024 1.21
> To: Taylor, Clinton A
> Cc: Kahola, Mika ; intel...@lists.freedesktop.org;
> intel-
> g...@lists.freedesktop.org
> Subject: Re: [PATCH v2 07/12] drm/i915/cx0: Remove bus reset after every c10
> transacti
== Series Details ==
Series: drm/i915/color: Debug improvements and intel_display conversion (rev2)
URL : https://patchwork.freedesktop.org/series/140452/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./a
== Series Details ==
Series: drm/i915/color: Debug improvements and intel_display conversion (rev2)
URL : https://patchwork.freedesktop.org/series/140452/
State : warning
== Summary ==
Error: dim checkpatch failed
fb010a54bba5 drm/i915/color: Pimp debugs
0315a7f61cfb drm/i915: Handle intel_pla
> -Original Message-
> From: Ville Syrjälä
> Sent: Friday, October 25, 2024 11:51 AM
> To: Kandpal, Suraj
> Cc: intel...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; Nautiyal,
> Ankit K ; Roper, Matthew D
>
> Subject: Re: [PATCH 1/5] drm/i915/display: Fix the plane max heig
On Fri, Oct 25, 2024 at 11:31:32AM +0530, Suraj Kandpal wrote:
> Fix the plane max height and width limits taking into account the
> joined pipe limits too.
>
> Bspec: 28692, 49199, 68858
> Fixes: 63dc014e37b9 ("drm/i915/dp: Allow big joiner modes in
> intel_dp_mode_valid(), v3.")
> Signed-off-by
> -Original Message-
> From: Intel-gfx On Behalf Of Clint
> Taylor
> Sent: Friday, October 25, 2024 4:01 AM
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Subject: [PATCH v4 03/11] drm/i915/xe3lpd: Add check to see if edp over type c
> is allowed
>
> From: Suraj
C10 phy timeouts occur on xe3lpd if the c10 bus is reset every
transaction. Starting with xe3lpd this is bus reset not necessary
Signed-off-by: Clint Taylor
Reviewed-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
dif
Spec states that PSR max active is same as max pipe active values.
Now that each pipe supports 6k resolution increasing max_h and
max_v for PSR too.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/
On Fri, Oct 25, 2024 at 04:28:18AM +, Murthy, Arun R wrote:
> > > Subject: Re: [PATCH] drm/i915/display: plane property for async
> > > supported modifiers
> > >
> > > On Wed, Oct 16, 2024 at 04:54:09PM +0300, Ville Syrjälä wrote:
> > > > On Wed, Oct 16, 2024 at 04:30:19PM +0300, Ville Syrjälä
We'll be needing a macro based list of platforms for more things in the
future. Start by defining the platform enumerations with it.
v3: Rebase for PTL
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_device.h | 119 +-
1 file change
> -Original Message-
> From: Srikanth V, NagaVenkata
> Sent: Thursday, October 24, 2024 12:41 PM
> To: Garg, Nemesa ; intel-gfx@lists.freedesktop.org
> Cc: Garg, Nemesa
> Subject: RE: [PATCH v4 2/5] drm/i915/display: Compute the scaler filter
> coefficients
>
>
>
> > -Original M
Fix the plane max height and width limits taking into account the
joined pipe limits too.
Bspec: 28692, 49199, 68858
Fixes: 63dc014e37b9 ("drm/i915/dp: Allow big joiner modes in
intel_dp_mode_valid(), v3.")
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_display.c | 19 +
With 6k resolution support for a single crtc being added
bigjoiner will only come into picture when hdisplay > 6144
Signed-off-by: Suraj Kandpal
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/driver
Increase the psr max_h limit to 4096.
Bspec: 69885, 68858
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index
Increase the max source width and height to be able to support 6k
resolution
on a single pipe. The changes for cdclk that accompany this change are
already merged in the code.
Bspec: 68858
Signed-off-by: Arun R Murthy
Signed-off-by: Suraj Kandpal
Suraj Kandpal (5):
drm/i915/display: Fix the p
Misc fixes from v3
This series builds on the previous v2, further enabling new features
for the platform. 1 patch drop at the request of the author.
Clint Taylor (1):
drm/i915/cx0: Remove bus reset after every c10 transaction
Dnyaneshwar Bhadane (3):
drm/i915/ptl: Define IS_PANTHERLAKE macr
From: Ravi Kumar Vodapalli
Spec does not request to disable VRR in the modeset disabling
sequence for DP and HDMI for xe3_lpd.
Bspec: 68848
Signed-off-by: Ravi Kumar Vodapalli
Signed-off-by: Matt Atwood
---
drivers/gpu/drm/i915/display/intel_display.c | 8 +---
1 file changed, 5 insertion
> > Subject: Re: [PATCH] drm/i915/display: plane property for async
> > supported modifiers
> >
> > On Wed, Oct 16, 2024 at 04:54:09PM +0300, Ville Syrjälä wrote:
> > > On Wed, Oct 16, 2024 at 04:30:19PM +0300, Ville Syrjälä wrote:
> > > > On Wed, Oct 16, 2024 at 11:06:26AM +0530, Arun R Murthy wro
There are some unconverted stragglers left in the HDCP API still using
struct drm_i915_private. Convert to struct intel_display.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_driver.c | 7 +++--
drivers/gpu/drm/i915/display/intel_dp.c | 3
> -Original Message-
> From: Ceraolo Spurio, Daniele
> Sent: Thursday, October 24, 2024 9:03 PM
> To: Kandpal, Suraj ; intel...@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K ; Ghimiray, Himal Prasad
>
> Subject: Re: [PATCH] drm/xe/hdcp: Add check to re
== Series Details ==
Series: drm/i915/xe3lpd: ptl display patches (rev3)
URL : https://patchwork.freedesktop.org/series/140196/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Switch to using the new display->platform. members for
platform identification in display code.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bios.c | 40 +--
1 file changed, 15 insertions(+), 25 deletions(-)
diff --git a/driver
On 10/24/2024 9:25 AM, Suraj Kandpal wrote:
DISPLAY_VER >= 30 onwards CRTC can now support 6k resolution.
Increase pipe and plane max width and height to reflect this
Only max width is changed.
increase in resolution.
--v2
-Take care of the subsampling scenario sooner rather than later [Ma
On Wed, Oct 23, 2024 at 02:46:51PM -0700, Clint Taylor wrote:
> From: Suraj Kandpal
>
> We need to disable HDCP Line Rekeying for Xe3 when we are using an HDMI
> encoder.
>
> v2: add additional definition instead of function, commit message typo
> fix and update.
> v3: restore lost conditional f
== Series Details ==
Series: drm/i915/display: bunch of struct intel_display conversions (rev2)
URL : https://patchwork.freedesktop.org/series/140324/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Thu, Oct 24, 2024 at 10:15:11PM +, Taylor, Clinton A wrote:
> On Thu, 2024-10-24 at 12:18 -0700, Matt Roper wrote:
> > On Thu, Oct 24, 2024 at 06:08:46AM +, Kahola, Mika wrote:
> > > > -Original Message-
> > > > From: Intel-gfx On Behalf Of
> > > > Clint
> > > > Taylor
> > > >
On 24-10-2024 23:04, Rodrigo Vivi wrote:
On Thu, Oct 24, 2024 at 10:28:38AM -0400, Gupta, Anshuman wrote:
-Original Message-
From: Nilawar, Badal
Sent: Wednesday, October 23, 2024 9:42 PM
To: Vivi, Rodrigo
Cc: Andi Shyti ; intel-gfx@lists.freedesktop.org;
Gupta, Anshuman ;
chris.
== Series Details ==
Series: drm/i915/xe3lpd: ptl display patches (rev4)
URL : https://patchwork.freedesktop.org/series/140196/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15592 -> Patchwork_140196v4
Summary
---
**
== Series Details ==
Series: drm/i915/xe3lpd: ptl display patches (rev3)
URL : https://patchwork.freedesktop.org/series/140196/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15592 -> Patchwork_140196v3
Summary
---
**
Hi Dave and Simona,
drm-xe-fixes for 6.12-rc5 with commits mostly improving error handling.
The g2h flush helps some LNL we are seeing, but we still have other 2
similar ones - however they didn't make it in time to drm-xe-next to be
properly tested, so I'm leaving for later.
There are 2 conflic
== Series Details ==
Series: drm/i915/xe3lpd: ptl display patches (rev4)
URL : https://patchwork.freedesktop.org/series/140196/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
From: Matt Roper
There are some minor changes to pmdemand handling on Xe3:
- Active scalers are no longer tracked. We can simply skip the readout
and programming of this field.
- Active dbuf slices are no longer tracked. We should skip the readout
and programming of this field and also
== Series Details ==
Series: drm/i915/xe3lpd: ptl display patches (rev3)
URL : https://patchwork.freedesktop.org/series/140196/
State : warning
== Summary ==
Error: dim checkpatch failed
2b6994afd790 drm/i915/xe3lpd: Update pmdemand programming
-:78: ERROR:ELSE_AFTER_BRACE: else should follow
From: Dnyaneshwar Bhadane
When deciding the type of the phy, add PTL support to make
sure the correct path is taken for selection of C10 PHY.
Only port A is connected C10 PHY for Pantherlake.
Bspec: 72571
Signed-off-by: Dnyaneshwar Bhadane
Signed-off-by: Matt Atwood
Signed-off-by: Clint Taylo
From: Mika Kahola
There is a HW issue that arises when there are race conditions
between TCSS entering/exiting TC7 or TC10 states while the
driver is asserting/deasserting TCSS power request. As a
workaround, Display driver will implement a mailbox sequence
to ensure that the TCSS is in TC0 when
From: Suraj Kandpal
We need to disable HDCP Line Rekeying for Xe3 when we are using an HDMI
encoder.
v2: add additional definition instead of function, commit message typo
fix and update.
v3: restore lost conditional from v2.
v4: subject line and subject message updated, fix the if ladder order,
From: Ravi Kumar Vodapalli
>From platforms xe3 Underrun recovery does not exist
v2: improve DISPLAY_VER checking
BSpec: 68849
Signed-off-by: Ravi Kumar Vodapalli
Signed-off-by: Matt Atwood
Signed-off-by: Clint Taylor
Reviewed-by: Sai Teja Pottumuttu
---
drivers/gpu/drm/i915/display/intel_d
From: Dnyaneshwar Bhadane
Common display code requires IS_PANTHERLAKE macro.
Define the macro and set 0 as PTL is no longer support for i915.
Signed-off-by: Dnyaneshwar Bhadane
Signed-off-by: Matt Atwood
Signed-off-by: Clint Taylor
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/i915_drv.h
From: Dnyaneshwar Bhadane
The async flip moved from PLANE_CTL to PLANE_SURF for Xe3_LPD.
Bspec: 69853,69878
Signed-off-by: Dnyaneshwar Bhadane
Signed-off-by: Matt Atwood
Signed-off-by: Clint Taylor
Reviewed-by: Shekhar Chauhan
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 13 +++
C10 phy timeouts occur on xe3lpd if the c10 bus is reset every
transaction. Starting with xe3lpd this is bus reset not necessary
Signed-off-by: Clint Taylor
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/
From: "Heikkila, Juha-pekka"
Xe3 has no more support for x-tile on display.
v2: Include up to display 29 for X-tiled support. (Gustavo)
Signed-off-by: Heikkila, Juha-pekka
Signed-off-by: Matt Atwood
Signed-off-by: Clint Taylor
Reviewed-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/int
From: Ravi Kumar Vodapalli
Spec does not request to disable VRR in the modeset disabling
sequence for DP and HDMI for xe3_lpd.
Bspec: 68848
Signed-off-by: Ravi Kumar Vodapalli
Signed-off-by: Matt Atwood
Signed-off-by: Clint Taylor
---
drivers/gpu/drm/i915/display/intel_display.c | 8 +---
From: Suraj Kandpal
Read PICA register to see if edp over type C is possible and then
add the appropriate tables for it.
--v2
-remove bool from intel_encoder have it in runtime_info [Jani]
-initialize the bool in runtime_info init [Jani]
-dont abbreviate the bool [Jani]
--v3
-Remove useless dis
On Thu, Oct 24, 2024 at 06:34:48PM +0530, Nautiyal, Ankit K wrote:
>
> On 10/24/2024 9:25 AM, Suraj Kandpal wrote:
> > Spec states that PSR max active is same as max pipe active values.
> > Now that each pipe supports 6k resolution increasing max_h and
> > max_v for PSR too.
> >
> > Signed-off-by
On 10/24/2024 9:25 AM, Suraj Kandpal wrote:
Spec states that PSR max active is same as max pipe active values.
Now that each pipe supports 6k resolution increasing max_h and
max_v for PSR too.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 +-
1 file chan
From: "Heikkila, Juha-pekka"
Xe3 has no more support for x-tile on display.
v2: Include up to display 29 for X-tiled support. (Gustavo)
Signed-off-by: Heikkila, Juha-pekka
Signed-off-by: Matt Atwood
Signed-off-by: Clint Taylor
Reviewed-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/int
From: Dnyaneshwar Bhadane
The async flip moved from PLANE_CTL to PLANE_SURF for Xe3_LPD.
Bspec: 69853,69878
Signed-off-by: Dnyaneshwar Bhadane
Signed-off-by: Matt Atwood
Signed-off-by: Clint Taylor
Reviewed-by: Shekhar Chauhan
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 13 +++
From: Ravi Kumar Vodapalli
>From platforms xe3 Underrun recovery does not exist
v2: improve DISPLAY_VER checking
BSpec: 68849
Signed-off-by: Ravi Kumar Vodapalli
Signed-off-by: Matt Atwood
Signed-off-by: Clint Taylor
Reviewed-by: Sai Teja Pottumuttu
---
drivers/gpu/drm/i915/display/intel_d
From: Matt Roper
There are some minor changes to pmdemand handling on Xe3:
- Active scalers are no longer tracked. We can simply skip the readout
and programming of this field.
- Active dbuf slices are no longer tracked. We should skip the readout
and programming of this field and also
From: Suraj Kandpal
We need to disable HDCP Line Rekeying for Xe3 when we are using an HDMI
encoder.
v2: add additional definition instead of function, commit message typo
fix and update.
v3: restore lost conditional from v2.
v4: subject line and subject message updated, fix the if ladder order,
From: Suraj Kandpal
Read PICA register to see if edp over type C is possible and then
add the appropriate tables for it.
--v2
-remove bool from intel_encoder have it in runtime_info [Jani]
-initialize the bool in runtime_info init [Jani]
-dont abbreviate the bool [Jani]
--v3
-Remove useless dis
On Thu, Oct 24, 2024 at 04:09:17PM +0530, Nitin Gote wrote:
> There is ENGINE_TRACE() macro which introduce engine name
> with GEM tracing in i915. So, it will be good to use ENGINE_TRACE()
> over drm_err() drm_device based logging for engine debug log.
Doesn't this just eliminate the logging comp
Add support for defining aliases for subplatform groups, such as HSW/BDW
ULT that covers both ULT and ULX.
ULT is a special case, because we slightly abuse the ULT subplatform
both as a subplatform and group, but with the way this is defined, it
should be fairly clear.
This follows i915 core and
On Thu, Oct 24, 2024 at 05:16:51PM +0530, Nautiyal, Ankit K wrote:
>
> On 10/24/2024 9:25 AM, Suraj Kandpal wrote:
> > DISPLAY_VER >= 30 onwards CRTC can now support 6k resolution.
> > Increase pipe and plane max width and height to reflect this
>
> Only max width is changed.
>
> > increase in r
On Thu, Oct 24, 2024 at 07:52:11PM +0200, Thomas Hellstrom wrote:
> Hi, Dave & Simona,
>
> This week's drm-xe-next PR
>
> Thanks,
> Thomas
>
>
> drm-xe-next-2024-10-24:
> UAPI Changes:
> - Define and parse OA sync properties (Ashutosh)
>
> Driver Changes:
> - Add caller info to xe_gt_reset_asy
On Thu, Oct 24, 2024 at 06:08:46AM +, Kahola, Mika wrote:
> > -Original Message-
> > From: Intel-gfx On Behalf Of Clint
> > Taylor
> > Sent: Thursday, 24 October 2024 0.47
> > To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> > Subject: [PATCH v2 07/12] drm/i915/cx0
Hi, Dave & Simona,
This week's drm-xe-next PR
Thanks,
Thomas
drm-xe-next-2024-10-24:
UAPI Changes:
- Define and parse OA sync properties (Ashutosh)
Driver Changes:
- Add caller info to xe_gt_reset_async (Nirmoy)
- A large forcewake rework / cleanup (Himal)
- A g2h response timeout fix (Badal)
On Fri, Oct 18, 2024 at 05:07:22PM -0400, Alex Deucher wrote:
> On Fri, Oct 18, 2024 at 1:56 PM André Almeida wrote:
> >
> > Em 18/10/2024 12:31, Alex Deucher escreveu:
> > > On Fri, Oct 18, 2024 at 11:23 AM Rodrigo Vivi
> > > wrote:
> > >>
> > >> On Thu, Oct 17, 2024 at 04:16:09PM -0300, André
== Series Details ==
Series: drm/i915/display: bunch of struct intel_display conversions (rev2)
URL : https://patchwork.freedesktop.org/series/140324/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15588 -> Patchwork_140324v2
On Thu, Oct 24, 2024 at 04:27:32PM +0300, Jani Nikula wrote:
> There's nothing in the header that requires the bit or bitfield
> headers. Remove.
>
Reviewed-by: Rodrigo Vivi
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_cx0_phy.h | 2 --
> 1 file changed, 2 deletions
On Thu, Oct 24, 2024 at 04:27:33PM +0300, Jani Nikula wrote:
> struct intel_display will replace struct drm_i915_private as the main
> device pointer for display code. Switch Cx0 PHY code over to it.
>
> v2: Rebase, split out the include cleanups (Rodrigo)
thank you
Reviewed-by: Rodrigo Vivi
>
== Series Details ==
Series: drm/i915/display: convert I915_STATE_WARN() to struct intel_display
(rev2)
URL : https://patchwork.freedesktop.org/series/140444/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15588 -> Patchwork_140444v2
===
struct intel_display will replace struct drm_i915_private as the main
device pointer for display code. Switch HSW IPS code over to it.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/hsw_ips.c | 47 ++
1 file changed, 26 insertions(+
== Series Details ==
Series: drm/i915/gt: Use ENGINE_TRACE for tracing. (rev4)
URL : https://patchwork.freedesktop.org/series/140358/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15588 -> Patchwork_140358v4
Summary
---
== Series Details ==
Series: drm/i915/color: Debug improvements and intel_display conversion
URL : https://patchwork.freedesktop.org/series/140452/
State : warning
== Summary ==
Error: dim checkpatch failed
1236120ab773 drm/i915/color: Pimp debugs
fc8cc987dcb8 drm/i915: Handle intel_plane and
> -Original Message-
> From: Intel-gfx On Behalf Of Clint
> Taylor
> Sent: 24 October 2024 03:17
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Subject: [PATCH v2 11/12] drm/i915/xe3lpd: Skip disabling VRR during
> modeset disable
>
> From: Ravi Kumar Vodapalli
struct intel_display will replace struct drm_i915_private as the main
device pointer for display code. Switch DPIO PHY code over to it.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
.../i915/display/intel_display_power_well.c | 19 ++-
drivers/gpu/drm/i915/display/intel_dpio_phy.c
On Thu, 24 Oct 2024, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Improve the debug prints in intel_color.c a bit, and convert it to
> intel_display while at it.
Series is
Reviewed-by: Jani Nikula
>
> Ville Syrjälä (4):
> drm/i915/color: Pimp debugs
> drm/i915: Handle intel_plane and i
== Series Details ==
Series: drm/i915/display: convert I915_STATE_WARN() to struct intel_display
(rev2)
URL : https://patchwork.freedesktop.org/series/140444/
State : warning
== Summary ==
Error: dim checkpatch failed
920b20070088 drm/i915/display: convert I915_STATE_WARN() to struct intel_di
From: Ville Syrjälä
Allow one to pass intel_plane/intel_plane_state to
to_intel_display(). Works exactly like their crtc
counterparts.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_types.h | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/
From: Ville Syrjälä
Every platforms implements the color .get_config() hook. Just
make it mandatory.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/d
From: Ville Syrjälä
Include the CRTC id+name information in the color management
debug prints to help identify who is at fault. And also specify
which LUT check_lut_size() is unhappy about.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c | 48 ++
From: Ville Syrjälä
Improve the debug prints in intel_color.c a bit, and convert it to
intel_display while at it.
Ville Syrjälä (4):
drm/i915/color: Pimp debugs
drm/i915: Handle intel_plane and intel_plane_state in
to_intel_display()
drm/i915/color: Convert color management code to int
Convert I915_STATE_WARN() to struct intel_display *, and rename to
INTEL_DISPLAY_STATE_WARN(). Do some minor opportunistic struct
drm_i915_private to struct intel_display conversions while at it.
v2: crtc_state may be NULL in intel_connector_verify_state()
Reviewed-by: Ville Syrjälä
Signed-off-b
On Thu, Oct 24, 2024 at 05:30:35PM +0300, Jani Nikula wrote:
> Convert I915_STATE_WARN() to struct intel_display *, and rename to
> INTEL_DISPLAY_STATE_WARN(). Do some minor opportunistic struct
> drm_i915_private to struct intel_display conversions while at it.
>
> Cc: Ville Syrjala
> Signed-off
On 10/22/2024 12:29 AM, Suraj Kandpal wrote:
Add check to remove HDCP2 compatibility from BMG as it does not
have GSC which ends up causing warning when we try to get reference
of GSC FW.
Fixes: 89d030804831 ("drm/xe/hdcp: Fix condition for hdcp gsc cs requirement")
Fixes: 883631771038 ("drm
== Series Details ==
Series: drm/i915/display: platform identification with
display->platform. (rev3)
URL : https://patchwork.freedesktop.org/series/139302/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15588 -> Patchwork_139302v3
=
struct intel_display will replace struct drm_i915_private as the main
device pointer for display code. Switch ICL DSI code over to it.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/icl_dsi.c | 444 ---
drivers/gpu/drm/i915/display/ic
With many of the intel_de_* callers switched over to struct
intel_display, we can remove some of the unnecessary generic wrappers.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_de.h | 46 ++---
1 file changed, 18 insertions(+), 2
struct intel_display will replace struct drm_i915_private as the main
device pointer for display code. Switch DP HDCP code over to it.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 88 ++--
1 file changed, 45 insertions(+
struct intel_display will replace struct drm_i915_private as the main
device pointer for display code. Switch assert_chv_phy_status() and its
callers to it. Main motivation to do just one function is to stop
passing i915 to intel_de_wait(), so its generic wrapper can be removed.
Reviewed-by: Rodri
struct intel_display will replace struct drm_i915_private as the main
device pointer for display code. Switch CRT code over to it.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_crt.c | 209 +-
drivers/gpu/drm/i915/display/intel_
struct intel_display will replace struct drm_i915_private as the main
device pointer for display code. Switch gmbus code over to it.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bios.c | 6 +-
drivers/gpu/drm/i915/display/intel_crt.c |
== Series Details ==
Series: drm/i915/display: platform identification with
display->platform. (rev3)
URL : https://patchwork.freedesktop.org/series/139302/
State : warning
== Summary ==
Error: dim checkpatch failed
613fac167fb2 drm/i915/display: reindent subplatform initialization
49fb0f8401
== Series Details ==
Series: drm/i915/display: platform identification with
display->platform. (rev3)
URL : https://patchwork.freedesktop.org/series/139302/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Quoting Patchwork (2024-10-23 14:02:13-03:00)
>== Series Details ==
>
>Series: drm/i915/xe2lpd: Update C20 HDMI TMDS algorithm to include tx_misc
>(rev2)
>URL : https://patchwork.freedesktop.org/series/140136/
>State : failure
>
>== Summary ==
>
>CI Bug Log - changes from CI_DRM_15586 -> Patchwo
Hi Dave, Sima,
this is the PR for drm-misc-fixes.
Best regards
Thomas
drm-misc-fixes-2024-10-24:
Short summary of fixes pull:
bridge:
- aux: Fix assignment of OF node
- tc358767: Add missing of_node_put() in error path
The following changes since commit 83f000784844cb9d4669ef1a3366479db3197b33:
Switch to using the new display->platform. members for
platform identification in display code.
v2: Split out an unrelated hunk to a separate patch (Rodrigo)
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_vblank.c | 8
1 file changed, 4 ins
Use struct intel_display where possible.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_vblank.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
b/drivers/gpu/drm/i915/display/intel_v
Switch to using the new display->platform. members for
platform identification in display code.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_tv.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/di
Add support for defining aliases for platform groups, such as g4x that
covers both g45 and gm45.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_device.c | 9 +
drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
2 files changed
Add a structure with a bitfield member for each platform and
subplatform, and initialize them in platform and subplatform descs.
The structure also contains a bitmap in a union for easier manipulation
of the bits. This, in turn, requires a bit of trickery with
INTEL_DISPLAY_PLATFORMS() to count th
We'll want to use the subplatforms similar to platforms. Join the
subplatforms next to their corresponding platforms. Update the comment
while at it.
v2: Put the subplatforms next to the platforms
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_devic
Make it easier to change the underlying structures by using a macro
similar to PLATFORM() for initialization.
The subplatform names in debug logs change slightly as they now reflect
the enum rather than manually entered names. For example, RAPTORLAKE_S
rather than RPL-S.
Reviewed-by: Rodrigo Vivi
This will be helpful for follow-up, where the names here become struct
member names.
This does impact debug logs as well, making everything lower case.
v2: Rebase to adapt to PTL
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_device.c | 122 +
The last patch was split to two, otherwise the same as before.
Jani Nikula (16):
drm/i915/display: reindent subplatform initialization
drm/i915/display: use a macro to initialize subplatforms
drm/i915/display: use a macro to define platform enumerations
drm/i915/display: join the platform
> -Original Message-
> From: Intel-gfx On Behalf Of Clint
> Taylor
> Sent: Thursday, 24 October 2024 0.47
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Subject: [PATCH v2 07/12] drm/i915/cx0: Remove bus reset after every c10
> transaction
>
> C10 phy timeouts occ
On Wed, 2024-10-09 at 21:22 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Move the "does this modifier support async flips?" check
> to be handled by the platform specific plane code instead
> of having a big mess in common code.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jouni Höga
On 10/24/2024 9:25 AM, Suraj Kandpal wrote:
With 6k resolution support for a single crtc being added
bigjoiner will only come into picture when hdisplay > 6144
Signed-off-by: Suraj Kandpal
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 5 -
1 file chang
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