Re: [PATCH 2/4] drm/i915/xe3lpd: Increase max_h max_v for PSR

[Nautiyal, Ankit K]

On 10/24/2024 9:25 AM, Suraj Kandpal wrote:
Spec states that PSR max active is same as max pipe active values.
Now that each pipe supports 6k resolution increasing max_h and
max_v for PSR too.

Signed-off-by: Suraj Kandpal <suraj.kand...@intel.com>
---
  drivers/gpu/drm/i915/display/intel_psr.c | 6 +++++-
  1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 3b20325b3f6a..8981a180285e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1451,7 +1451,11 @@ static bool intel_psr2_config_valid(struct intel_dp 
*intel_dp,
                return false;
        }
  
-	if (DISPLAY_VER(display) >= 12) {
+       if (DISPLAY_VER(dev_priv) >= 30) {
+               psr_max_h = 6144;
+               psr_max_v = 4096;

As per Bspec:69885 from XE2LPD+ the max size for PSR2 is pipe active 
size, so psr_max_v should have been 4096 even earlier.

Perhaps need to change even for earlier platform.

Regards,

Ankit

+               max_bpp = 30;
+       } else if (DISPLAY_VER(dev_priv) >= 12) {
                psr_max_h = 5120;
                psr_max_v = 3200;
                max_bpp = 30;