RFC: lra-constraints.c and TARGET_HARD_REGNO_CALL_PART_CLOBBERED question/patch

2018-07-11 Thread Steve Ellcey
look at this patch and tell me if it seems reasonable or not.  It passed bootstrap and I am running tests now. I am just wondering if there is any reason why this target function would need to be called on non-call instructions or if doing so is just an oversight/bug. Steve Ellcey sell

Re: RFC: lra-constraints.c and TARGET_HARD_REGNO_CALL_PART_CLOBBERED question/patch

2018-07-12 Thread Steve Ellcey
ck 'hard_regno_call_part_clobbered' in 'process_bb_lives' (where we know exactly what function is being called) and use that to set 'actual_call_used_reg_set'.  In process_bb_live we know exactly what function we are calling and can check to see if it is a 'normal' function or a SIMD function. Steve Ellcey sell...@cavium.com

RFC: Patch to implement Aarch64 SIMD ABI

2018-07-18 Thread Steve Ellcey
use GCC to generate this code I would appreciate some ideas.  Just doing lots of calculations with lots of intermediate values doesn't seem to be enough. Steve Ellcey sell...@cavium.com [1] https://developer.arm.com/products/software-development-tools/hpc/arm-compiler-for-hpc/vector-function-a

Re: RFC: Patch to implement Aarch64 SIMD ABI

2018-07-19 Thread Steve Ellcey
at is why the second of Wilco's two examples (f2) is wrong.  I am unclear about exactly what is meant by writeback and why we have it and how that and callee_adjust are used.  Any chance someone could help me understand this part of the prologue/epilogue code better?  The comments in aarch64.c

Re: RFC: Patch to implement Aarch64 SIMD ABI

2018-07-20 Thread Steve Ellcey
On Fri, 2018-07-20 at 11:11 +, Wilco Dijkstra wrote: > Steve Ellcey wrote: > > > Yes, I see where I missed this in aarch64_push_regs > > and aarch64_pop_regs.  I think that is why the second of > > Wilco's two examples (f2) is wrong.  I am unclear about > >

Re: RFC: Patch to implement Aarch64 SIMD ABI

2018-07-23 Thread Steve Ellcey
testing but any feedback on what I have so far would be helpful. Steve Ellcey sell...@cavium.com 2018-07-23  Steve Ellcey   * config/aarch64/aarch64.c (aarch64_attribute_table): New array. (aarch64_simd_decl_p): New function. (aarch64_reg_save_mode): New function

[Patch] [Aarch64] PR 86538 - Define __ARM_FEATURE_LSE if LSE is available

2018-07-24 Thread Steve Ellcey
this a useful feature to have in GCC? Steve Ellcey sell...@cavium.com 2018-07-24  Steve Ellcey   PR target/86538 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add define of __ARM_FEATURE_LSE. diff --git a/gcc/config/aarch64/aarch64-c.c b/gcc/config/aarch64

Re: [Patch] [Aarch64] PR 86538 - Define __ARM_FEATURE_LSE if LSE is available

2018-07-24 Thread Steve Ellcey
would affect the call generated in nptl/pthread_spin_lock.c.  That would be useful if we built a lipthread specifically for a platform that had LSE. Steve Ellcey sell...@cavium.com

Re: RFC: Patch to implement Aarch64 SIMD ABI

2018-07-25 Thread Steve Ellcey
ose I could use TARGET_HARD_REGNO_CALL_PART_CLOBBERED but I would have to extend it to include the call instruction as an argument so the the code could determine if the call being made was to a simd or non-simd function. Steve Ellcey sell...@cavium.com 2018-07-25  Steve Ellcey   * config/aa

[Patch][Aarch64] Implement Aarch64 SIMD ABI and aarch64_vector_pcs attribute

2018-07-31 Thread Steve Ellcey
registers will also be saved by the callee. Steve Ellcey sell...@cavium.com [1] https://developer.arm.com/products/software-development-tools/hpc/a rm-compiler-for-hpc/vector-function-abi Compiler ChangeLog: 2018-07-31  Steve Ellcey   * config/aarch64/aarch64-protos.h

[patch, libtool] Top-level libtool.m4 patch for autoconf 2.68

2013-08-20 Thread Steve Ellcey
, is this patch OK to check in to the GCC tree? I will send seperate email to the binutils mailing list though perhaps permission to check it in to the GCC tree is sufficient to put it in binutils as well? Steve Ellcey sell...@mips.com 2013-08-20 Steve Ellcey * libtool.m4

Re: [PATCH] Fix PR57451 (Incorrect debug ranges emitted for -freorder-blocks-and-partition -g)

2013-08-22 Thread Steve Ellcey
have some insight to using next_active_insn vs. next_real_insn vs. next_insn, though it doesn't look like you have changed what is used here. Steve Ellcey sell...@mips.com

Re: [PATCH] Fix PR57451 (Incorrect debug ranges emitted for -freorder-blocks-and-partition -g)

2013-08-23 Thread Steve Ellcey
Teresa This patch fixes the problem for me. Thanks Teresa, Thanks Kaz. Steve Ellcey

Re: [patch, libgfortran, configure] Cross-compile support for libgfortran

2013-09-23 Thread Steve Ellcey
On Mon, 2013-09-23 at 16:26 +0100, Marcus Shawcroft wrote: > On 4 June 2013 20:49, Steve Ellcey wrote: > > This patch allows me to build libgfortran for a cross-compiling toolchain > > using newlib. Currently the checks done by AC_CHECK_FUNCS_ONCE fail with > > my toolchai

Re: RFA: Store the REG_BR_PROB probability directly as an int

2013-09-25 Thread Steve Ellcey
progress... > > Works for me as well. > > Andreas. This patch worked for me as well on MIPS. I did a complete build and test overnight. Steve Ellcey sell...@mips.com

Re: [PATCH] Fix libgfortran cross compile configury w.r.t newlib

2013-09-26 Thread Steve Ellcey
ay the other libraries should consider using this fix. The only reason they don't run into this problem too is that they don't depend on any long double functions or any other functions that are optionally built by newlib. I will test this patch on my targets and make sure it works for me, but I don't see why it would not. Steve Ellcey sell...@mips.com

Re: [PATCH] Fix libgfortran cross compile configury w.r.t newlib

2013-09-27 Thread Steve Ellcey
in/ld: warning: cannot find entry symbol __start; defaulting to 00400098 /tmp/ccdG78PN.o: In function `main': y.c:(.text+0x14): undefined reference to `exit' collect2: error: ld returned 1 exit status ubuntu-sellcey % echo $? 1 Steve Ellcey sell...@mips.com

Re: [PATCH v2] Fix libgfortran cross compile configury w.r.t newlib

2013-10-01 Thread Steve Ellcey
gt; exit() or some such that might reasonably be expected to be present. > > > > For example: > > > > AC_CHECK_FUNC(exit) > > if test "x${with_newlib}" = "xyes" -a "x${ac_cv_func_exit}" = "xno"; then > > > > /Marcus This patch works on my mips-mti-elf target. Steve Ellcey sell...@mips.com

Re: [patch, mips] Patch for new mips triplet - mips-mti-elf

2012-10-01 Thread Steve Ellcey
t; mips*-sde-elf mips*-mti-elf } } " > ... > > We need another set of braces. Tested on mipsisa64-elf and applied. > > Richard Thanks for fixing this, I am not sure why I didn't notice it in my testing. Steve Ellcey sell...@mips.com

[patch, mips, testsuite] Fix test to handle optimizations

2012-10-08 Thread Steve Ellcey
erwrites unintialized data. I changed the code to force the compiler to preserve the other fields of 'c' and that makes it use the insert instruction in both big and little endian modes. Tested on mips-mti-elf. OK to checkin? Steve Ellcey sell...@mips.com 2012-10-08 Steve Ellcey

[patch, mips, testsuite] Fix gcc.target/mips/octeon-bbit-2.c for -Os

2012-10-08 Thread Steve Ellcey
? Steve Ellcey sell...@mips.com 2012-10-08 Steve Ellcey * gcc.target/octeon-bbit-2.c: Skip for -Os optimization level. diff --git a/gcc/testsuite/gcc.target/mips/octeon-bbit-2.c b/gcc/testsuite/gcc.target/mips/octeon-bbit-2.c index 9bd8dce..7d88d68 100644 --- a/gcc/testsuite/gcc.target

Re: [patch, mips, testsuite] Fix gcc.target/mips/octeon-bbit-2.c for -Os

2012-10-08 Thread Steve Ellcey
On Mon, 2012-10-08 at 11:09 -0700, Mike Stump wrote: > On Oct 8, 2012, at 9:21 AM, Steve Ellcey wrote: > > The gcc.target/octeon-bbit-2.c is failing with -Os because that optimization > > level does not do whichever optimization it is that results in a bbit > > instead &

[patch, mips] Modify mips-mti-linux-gnu build

2012-10-30 Thread Steve Ellcey
compiling for mips64* targets, this is also to be consistent with the mips-mti-elf target. Tested with a cross-build and running the GCC testsuite using qemu. OK to checkin? Steve Ellcey sell...@mips.com 2012-10-30 Steve Ellcey * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Change order

Re: [PATCH][i386]Fix PR 57756

2013-10-17 Thread Steve Ellcey
extern struct gcc_options global_options_set;" +print "#define target_flags_explicit global_options_set.x_target_flag s" print "#endif" print "#endif" print "" Steve Ellcey sell...@mips.com

Re: [PATCH][i386]Fix PR 57756

2013-10-17 Thread Steve Ellcey
ild and a testsuite run looked OK too. Steve Ellcey sell...@mips.com

[patch, mips] Fix optimization bug involving nor instruction

2013-10-22 Thread Steve Ellcey
the cost calculation of a nor to be the cost of one operation (plus the cost of getting the operands into registers) instead of the cost of three operations. Tested with no regressions, OK to checkin? Steve Ellcey sell...@mips.com 2013-10-22 Steve Ellcey * config/mips/mips.c

Re: [patch, mips] Fix optimization bug involving nor instruction

2013-10-22 Thread Steve Ellcey
> > Richard OK, but I am curious why you put parenthesis around the right hand side of the total expression. I.e. *total = (); Steve Ellcey

Re: [patch, mips] Fix optimization bug involving nor instruction

2013-10-22 Thread Steve Ellcey
On Tue, 2013-10-22 at 19:12 +0100, Richard Sandiford wrote: > >> Richard > > > > OK, but I am curious why you put parenthesis around the right hand side > > of the total expression. I.e. *total = (); > > That's the "emacs formatting" rule: OK, I have checked in the patch with the parenthes

Re: [PATCH v2] Fix libgfortran cross compile configury w.r.t newlib

2013-10-24 Thread Steve Ellcey
me up with a better solution it should be used for all the libraries and not just for libgfortran. Steve Ellcey sell...@mips.com

[Patch] Fix canadian cross build on systems with no fenv.h

2013-10-30 Thread Steve Ellcey
'AC_LANG_CPLUSPLUS'. Tested with both my canadian cross build and a standard cross build targetting mips-mti-elf. OK for checkin? Steve Ellcey sell...@mips.com 2013-10-30 Steve Ellcey * configure.ac: Add header checks for fenv.h and complex.h. * configure: Regenerate. di

[Patch] Fix type of clock_t in timevar.c

2013-11-01 Thread Steve Ellcey
build and a native x86 linux build. OK to checkin? Steve Ellcey sell...@mips.com 2013-11-01 Steve Ellcey * timevar.c: Fix type of clock_t. diff --git a/gcc/timevar.c b/gcc/timevar.c index 23b7118..b66f94a 100644 --- a/gcc/timevar.c +++ b/gcc/timevar.c @@ -23,7 +23,7 @@ along with GCC

[Patch] configure patch for caddr_t and ssize_t types

2013-11-01 Thread Steve Ellcey
ing a problem in my build because caddr_t was also getting set via a typedef by the mingw compilers. Here is my fix, tested with a canadian cross build and with a native x86 linux build. OK to checkin? 2013-11-01 Steve Ellcey * configure.ac: Add header checks for fenv.h and comp

Re: [Patch] configure patch for caddr_t and ssize_t types

2013-11-01 Thread Steve Ellcey
On Fri, 2013-11-01 at 19:22 +0100, Marek Polacek wrote: > On Fri, Nov 01, 2013 at 11:15:02AM -0700, Steve Ellcey wrote: > > --- a/gcc/system.h > > +++ b/gcc/system.h > > @@ -1060,6 +1060,14 @@ helper_const_non_const_cast (const char *p) > > #define DEBUG_VARIABLE >

Re: [Patch] Fix type of clock_t in timevar.c

2013-11-01 Thread Steve Ellcey
On Fri, 2013-11-01 at 12:43 -0700, Mike Stump wrote: > On Nov 1, 2013, at 10:47 AM, Steve Ellcey wrote: > > While working on a canadian cross build I ran into a problem with the > > type of clock_t. If HAVE_CLOCK_T is not defined > > > timevar.c defines it to be int. I

Re: [Patch] Fix type of clock_t in timevar.c

2013-11-01 Thread Steve Ellcey
On Fri, 2013-11-01 at 13:45 -0700, Mike Stump wrote: > On Nov 1, 2013, at 12:56 PM, Steve Ellcey wrote: > >> You should report a bug to them and have them define clock_t. > > > > They are defining clock_t, but for some reason the GCC configure is not > > seeing it (

[Patch, MIPS] Patch for PR 68400, a mips16 bug

2016-01-26 Thread Steve Ellcey
more complete mips16 addressing check and reject operands that do not meet the more restrictive requirements. I ran the GCC testsuite with no regressions and have included a test case as part of this patch. OK to checkin? Steve Ellcey sell...@imgtec.com 2016-01-26 Steve Ellcey PR

Re: [PATCH] libcpp: use better locations for _Pragma tokens (preprocessor/69126)

2016-01-28 Thread Steve Ellcey
GCC diagnostic ignored "-Wmaybe-uninitialized" *++yyvsp = __gettextlval; #pragma GCC diagnostic pop Steve Ellcey sell...@imgtec.com plural.c: In function '__gettextparse': plural.c:1767:12: error: '__gettextlval.num' may be used uninitialized in this function [-Wer

Re: [PATCH] libcpp: use better locations for _Pragma tokens (preprocessor/69126)

2016-01-28 Thread Steve Ellcey
On Thu, 2016-01-28 at 14:59 -0500, David Malcolm wrote: > On Thu, 2016-01-28 at 14:48 -0500, David Malcolm wrote: > > On Thu, 2016-01-28 at 11:12 -0800, Steve Ellcey wrote: > > > David, > > > > > > This patch has broken the top-of-tree glibc build > >

[Patch, MIPS] Fix PR target/68273, passing args in wrong regs

2016-01-29 Thread Steve Ellcey
where arguments were passed and which now work with this patch. Tested with mips-mti-linux-gnu and no regressions. OK to checkin? Steve Ellcey sell...@imgtec.com 2016-01-29 Steve Ellcey PR target/68273 * config/mips/mips.c (mips_function_arg_boundary): Fix argument

Re: [Patch, MIPS] Fix PR target/68273, passing args in wrong regs

2016-02-01 Thread Steve Ellcey
it would get extended to 4 bytes in mips_function_arg_boundary by: if (alignment < PARM_BOUNDARY) alignment = PARM_BOUNDARY; But it still seemed a bit 'wrong' to me. Maybe something in the front/middle ends should be updating the type to match any argument promotion that is being done? Steve Ellcey sell...@imgtec.com

Re: [Patch, MIPS] Fix PR target/68273, passing args in wrong regs

2016-02-02 Thread Steve Ellcey
Richard, Can you explain why the GCC internals cause us to get SCmode instead of BLKmode for the example with _Complex? I don't understand that. It seems wrong to me and I don't understand where it is coming from. Steve Ellcey sell...@imgtec.com

Re: [Patch, MIPS] Fix PR target/68273, passing args in wrong regs

2016-02-03 Thread Steve Ellcey
are TYPE_ALIGN (type) and TYPE_ALIGN (TYPE_MAIN_VARIANT (type) and if they are different, issue a warning during compilation about a possible incompatibility with older objects. Steve Ellcey sell...@imgtec.com 2016-02-03 Steve Ellcey PR target/68273 * config/mips/mips.c (mips_fu

Re: [Patch, MIPS] Fix PR target/68273, passing args in wrong regs

2016-02-04 Thread Steve Ellcey
; extern void foo (alignedint a); extern void bar (int); int a; alignedint b; int main() { foo(a); bar(b); } Steve Ellcey sell...@imgtec.com

[Patch, MIPS] Patch for PR 68273 (user aligned variable arguments)

2016-02-24 Thread Steve Ellcey
x27;t want to see it (-mno-warn-aligned-args). I did not add an option to make GCC pass arguments in the old manner as I consider that method of passing arguments to be a bug and I don't think we want to have an option to propogate that incorrect behavior. Steve Ellcey sell...@imgtec.com

RE: [Patch, MIPS] Patch for PR 68273 (user aligned variable arguments)

2016-02-24 Thread Steve Ellcey
64-bit types are affected? The explicit test cases do not > cover an under aligned long long case which would be good to cover. Yes, the under alignment of long long's is affected. I have added a new testcase (pr68273-3.c) to check that. Here is a new version of the patch with the invo

Re: [PATCH, ia64] [PR target/52731] internal compiler error: in ia64_st_address_bypass_p, at config/ia64/ia64.c:9357

2013-12-03 Thread Steve Ellcey
On Fri, 2013-11-29 at 15:01 +0300, Kirill Yukhin wrote: > Hello, > On 20 Nov 18:37, Kirill Yukhin wrote: > > Hello, > > Patch in the bottom fixes PR52731. > > Is it ok for trunk? > Ping? > > -- > Thanks, K OK. Steve Ellcey sell...@mips.com

[Patch] Remove references to non-existent tree-flow.h file

2014-01-09 Thread Steve Ellcey
s the references to these now-nonexistent files. OK to checkin? Steve Ellcey sell...@mips.com 2014-01-09 Steve Ellcey * Makefile.in (TREE_FLOW_H): Remove. (TREE_SSA_H): Add files names from tree-flow.h. * doc/tree-ssa.texi (Annotations): Remove reference to tree-f

[Patch, testsuite, mips] Fix test gcc.dg/delay-slot-1.c for MIPS

2014-01-09 Thread Steve Ellcey
The gcc.dg/delay-slot-1.c test is failing for MIPS targets that do not support the 64 bit ABI because it didn't check to see if that support existed before using the -mabi=64 flag. This patch fixes the problem by using the mips64 check. OK to checkin? Steve Ellcey sell...@mips.com 2014-

[Patch] Fix PR plugin/59335, plugins not compiling

2014-01-09 Thread Steve Ellcey
platform issues that are mentioned in the defect. Tested with my switch-shortcut plugin on MIPS. OK to checkin? Steve Ellcey sell...@mips.com 2014-01-09 Steve Ellcey PR plugins/59335 * Makefile.in (PLUGIN_HEADERS): Add gimplify.h, gimple-iterator.h, gimple-ssa.h, fold

[Patch, MIPS] Fix SYSROOT_SUFFIX_SPEC for mips-mti-linux-gnu

2015-07-09 Thread Steve Ellcey
updating MIPS_SYSVERSION_SPEC which is used by SYSROOT_SUFFIX_SPEC. It will only affect the mips-mti-linux-gnu toolchain. Tested with mips-mti-linux-gnu, OK to checkin? Steve Ellcey sell...@imgtec.com 2015-07-09 Steve Ellcey * config/mips/mti-linux.h (MIPS_SYSVERSION_SPEC): Update

Re: [C/C++ PATCH] Implement -Wtautological-compare (PR c++/66555, c/54979)

2015-07-28 Thread Steve Ellcey
value of x->xarg1 is a NaN then the if statement should return TRUE because a NaN never compares equal to anything, even another NaN (check with your local IEEE expert). I believe this method of checking for a NaN is fairly common and I am not sure if GCC should be emitting a warning for i

[Patch, MIPS] MIPS specific optimization for o32 ABI

2015-07-28 Thread Steve Ellcey
n the Mentor GCC toolchain for MIPS for a while and gotten some testing there and I tested it on the top-of-tree GCC sources with no regressions. OK to checkin? Steve Ellcey sell...@imgtec.com 2015-07-28 Steve Ellcey Zoran Jovanovic Catherine Moore Tom de

Re: [Patch, MIPS] MIPS specific optimization for o32 ABI

2015-07-31 Thread Steve Ellcey
On Fri, 2015-07-31 at 00:32 +, Joseph Myers wrote: > New command-line options need documenting in invoke.texi. Good point, thanks for catching that. Here is an updated patch with invoke.texi. There are no other changes to the patch. Steve Ellcey sell...@imgtec.com 2015-07-31 St

Re: [PATCH] PR28901 -Wunused-variable ignores unused const initialised variables

2015-09-15 Thread Steve Ellcey
perfectly reasonable use of static globals and header files that should not be identified as a warning. This warning causes the GLIBC build to fail because GLIBC is compiled with -Wall -Werror. Steve Ellcey sell...@imgtec.com % cat a.h static const int a = 3; static const int b = 5; stat

Re: [PATCH] PR28901 -Wunused-variable ignores unused const initialised variables

2015-09-15 Thread Steve Ellcey
On Tue, 2015-09-15 at 19:10 +0200, Jakub Jelinek wrote: > On Tue, Sep 15, 2015 at 10:02:15AM -0700, Steve Ellcey wrote: > > I am not sure I like this change. It broke the GLIBC build for me on > > MIPS. Basically GLIBC has a header file with initialized static > > cons

Re: [PATCH] PR28901 -Wunused-variable ignores unused const initialised variables

2015-09-21 Thread Steve Ellcey
On Fri, 2015-09-18 at 20:29 -0600, Martin Sebor wrote: > On 09/15/2015 11:20 AM, Steve Ellcey wrote: > > I guess it is not the 'const' I think should be handled special but the > > 'static'. Having unused static variables (const or not) declared in a > >

Re: [PATCH] PR28901 -Wunused-variable ignores unused const initialised variables

2015-09-24 Thread Steve Ellcey
but I still feel it is a bad warning in that it will (sometimes) warn about a coding style that seems perfectly reasonable to me. Steve Ellcey sell...@imgtec.com

RFC: Patch to allow spill slot alignment greater than the stack alignment

2015-10-02 Thread Steve Ellcey
ions. I do get scan failures in the gcc.target/mips section because I am forcing GCC to setup $16 as the 'aligned spill base register' in all routines as a stress test but I do not get any new execution failures. Steve Ellcey sell...@imgtec.com 2015-10-02 Steve Ellcey * config/mips/mi

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

2015-10-05 Thread Steve Ellcey
On Mon, 2015-10-05 at 10:41 +0200, Bernd Schmidt wrote: > On 10/02/2015 10:57 PM, Steve Ellcey wrote: > > I have spent some time trying to do dynamic stack alignment on MIPS and had > > considerable trouble. The problems are mainly due to the dwarf based stack > > unwindi

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

2015-10-05 Thread Steve Ellcey
On Mon, 2015-10-05 at 09:21 -0700, H.J. Lu wrote: > On Mon, Oct 5, 2015 at 9:10 AM, Steve Ellcey wrote: > > There probably is some way to get dynamic stack alignment to work on > > MIPS, but I am not sure I can do it. The only platform that I see that > > uses dynamic stack

RE: [PATCH, MIPS] Frame header optimization for MIPS O32 ABI

2015-10-05 Thread Steve Ellcey
ents are embedded. OK, I have updated the comments based on your input and changed the code to compile with the ToT GCC after revision @227941. Here is the new patch. 2015-10-05 Steve Ellcey * config.gcc (mips*-*-*): Add frame-header-opt.o to extra_objs. * frame-heade

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

2015-10-06 Thread Steve Ellcey
. My other question is about 'set_unexpected' and how that affects the generated unwind info. I noticed that a lot of my failing tests use 'set_unexpected' and I don't know what this function does or how it affects the generated code that would cause these tests in particular to fail. Steve Ellcey sell...@imgtec.com

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

2015-10-06 Thread Steve Ellcey
t other register as my argument pointer (needed after the stack pointer got aligned) and to use it to restore the stack pointer at the end of the function for normal returns. Steve Ellcey sell...@imgtec.com

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

2015-10-06 Thread Steve Ellcey
l code will only align functions that use MSA. Steve Ellcey sell...@imgtec.com

RE: [PATCH, MIPS] Frame header optimization for MIPS O32 ABI

2015-10-06 Thread Steve Ellcey
them so they both allocate 24 bytes without the optimization and 8 bytes with it. Everything should pass now, it passed for me using mips-mti-linux-gnu and mips-mti-elf. Steve Ellcey sell...@imgtec.com 2015-10-06 Steve Ellcey * gcc.target/mips/mips.exp (mips_option_groups): Add -mfra

Re: [PATCH] PR28901 -Wunused-variable ignores unused const initialised variables

2015-10-06 Thread Steve Ellcey
On Thu, 2015-09-24 at 21:24 -0400, Trevor Saunders wrote: > On Thu, Sep 24, 2015 at 06:55:11PM +0200, Bernd Schmidt wrote: > > On 09/24/2015 06:11 PM, Steve Ellcey wrote: > > >At least one of the warnings in glibc is not justified (in my opinion). > > >The header file

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

2015-10-09 Thread Steve Ellcey
ail or me on MIPS and I was wondering if they work for you on x86. g++.dg/cpp0x/lambda/lambda-eh2.C g++.dg/eh/unexpected1.C g++.old-deja/g++.eh/spec2.C g++.old-deja/g++.eh/spec3.C g++.old-deja/g++.mike/eh33.C g++.old-deja/g++.mike/eh50.C g++.old-deja/g++.mike/eh51.C Steve Ellcey sell...@imgtec.com

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

2015-10-09 Thread Steve Ellcey
n't sure if you had run the entire test suite with -mstackrealign or only the tests in g++.dg/torture/stackalign. Steve Ellcey sell...@imgtec.com

[Patch, MIPS] Frame header optimization for MIPS (part 2)

2015-10-16 Thread Steve Ellcey
important cases and we can extend it later if needed. Tested with no regressions using the mips-mti-linux-gnu toolchain. OK to checkin? Steve Ellcey sell...@imgtec.com 2015-10-16 Steve Ellcey * frame-header-opt.c (gate): Check for optimize > 0. (has_inlined_assembly):

[Patch, MIPS] Patch to fix MIPS optimization bug in combine

2015-10-21 Thread Steve Ellcey
that cleared the upper 32 bits of one of the registers and the program fails. My solution was to not allow subregs in the conditional jump instruction. Here is the patch and a test case and I ran the GCC testsuite with no regressions. OK to checkin? Steve Ellcey sell...@imgtec.com 2015-10-

Re: [Patch, MIPS] Frame header optimization for MIPS (part 2)

2015-10-21 Thread Steve Ellcey
can smell a -Wall patch. :-) > > Not really, because -Wall isn't in the business of enforcing a coding style. > > > Bernd Hm, how about a separate warning that wasn't part of -Wall but could still be used by GCC or other products that wanted to enforce a 'no unnecessary

Re: [Patch, MIPS] Patch to fix MIPS optimization bug in combine

2015-10-21 Thread Steve Ellcey
Andrew, Here is the new patch that I am currently testing with your change and incorporating Eric's comment. I included both test cases but renamed yours and put it into gcc.dg/torture. Does the code in combine.c to address Eric's comment look OK to you? Steve Ellcey steve.ell...@

[PATCH] Fix PR rtl-optimization/67736 in combine.c

2015-10-22 Thread Steve Ellcey
it in. I addressed Eric Botcazou comments from the original patch and also included the (updated) test case that Andrew had as well as one I created. OK to checkin? Steve Ellcey sell...@imgtec.com My original patch and the follow up discussion is at: https://gcc.gnu.org/ml/gcc-patches/2015-10

Re: [PATCH] unconditionally compile most of the delay slot code

2015-10-22 Thread Steve Ellcey
*** [s-attrtab] Error 1 make[1]: Leaving directory `/scratch/sellcey/repos/build-bug/obj-mips-mti-linux-gnu/initial_gcc/gcc' make: *** [all-gcc] Error 2 Error: Make command failed, stopping build. Any thoughts on what I should look at? Steve Ellcey sell...@imgtec.com

Re: [PATCH] Fix PR rtl-optimization/67736 in combine.c

2015-10-22 Thread Steve Ellcey
nt64_t into this test so it didn't need any includes, that is why it still worked. But you are right I should be using stdint.h instead of inttypes.h. It looks like most tests have: /* { dg-do run { target { stdint_types } } } */ #include So I will use that in both tests and remove the local definition of uint64_t from pr67736.c. Steve Ellcey sell...@imgtec.com

[Patch] Update email address

2015-10-23 Thread Steve Ellcey
I am checking in this patch to update my email address. The sell...@mips.com address still works but I have been using sell...@imgtec.com recently as that is more 'official'. Steve Ellcey sell...@imgtec.com 2015-10-23 Steve Ellcey * MAINTAINERS: Update email address.

Re: [Patch, MIPS] Frame header optimization for MIPS (part 2)

2015-10-23 Thread Steve Ellcey
Just to follow up on this string, here is a new version of the patch with the extraneous parenthesis removed. Steve Ellcey sell...@imgtec.com 2015-10-23 Steve Ellcey * frame-header-opt.c (gate): Check for optimize > 0. (has_inlined_assembly): New funct

[Patch] Change to argument promotion in fixed conversion library calls

2015-11-06 Thread Steve Ellcey
bly not be done in time for GCC 6.0 anyway. See https://gcc.gnu.org/ml/gcc/2015-10/msg00234.html for more discussion of this change. Is this part of the patch OK to checkin? Tested on mips-mti-linux-gnu. Steve Ellcey sell...@imgtec.com 2015-11-06 Steve Ellcey * optabs.c (expan

Re: [Patch] Change to argument promotion in fixed conversion library calls

2015-11-06 Thread Steve Ellcey
ome other arguments, maybe the library call rtx (fun) and an integer to specify what argument this is (1, 2, 3, ...) if we wanted to try and generalize it even more. Steve Ellcey sell...@imgtec.com

Re: [Patch] Change to argument promotion in fixed conversion library calls

2015-11-09 Thread Steve Ellcey
On Fri, 2015-11-06 at 20:29 +0100, Bernd Schmidt wrote: > On 11/06/2015 08:27 PM, Steve Ellcey wrote: > > > > Are you thinking of a simple function that is called on all targets or a > > target specific function? Maybe a target specific function would be > > safer. >

Re: [Patch] Change to argument promotion in fixed conversion library calls

2015-11-09 Thread Steve Ellcey
On Mon, 2015-11-09 at 21:47 +0100, Bernd Schmidt wrote: > On 11/09/2015 05:59 PM, Steve Ellcey wrote: > > Here is a version with the code moved into a new function. How does > > this look? > > > > 2015-11-09 Steve Ellcey > > > > * optab

[Patch, MIPS] Remove definition of TARGET_PROMOTE_PROTOTYPES

2015-11-10 Thread Steve Ellcey
. ext-2.c now generates an srl instruction instead of a dext instruction but the number of instructions has not changed and I updated the scan checks. Tested on mips-mti-linux-gnu with no unfixed regressions. OK to checkin? Steve Ellcey sell...@imgtec.com 2015-11-10 Steve Ellcey * c

[Patch] Fix bug for frame instructions in annulled delay slots

2015-12-07 Thread Steve Ellcey
to cover all the unnulled delay slot situations. This patch extends the code to not put frame related instructions into annulled delay slots. Tested on MIPS with linux and elf toolchain builds and testsuite runs. OK to checkin? Steve Ellcey sell...@imgtec.com 2015-12-07 Steve Ellcey

Re: [Patch] Fix bug for frame instructions in annulled delay slots

2015-12-07 Thread Steve Ellcey
On Mon, 2015-12-07 at 20:28 +0100, Bernd Schmidt wrote: > On 12/07/2015 07:54 PM, Steve Ellcey wrote: > > if (must_annul) > > - used_annul = 1; > > + { > > + /* Frame related instructions cannot go into annulled delay > > +s

Re: [Patch] Fix bug for frame instructions in annulled delay slots

2015-12-07 Thread Steve Ellcey
On Mon, 2015-12-07 at 20:59 +0100, Bernd Schmidt wrote: > On 12/07/2015 08:43 PM, Steve Ellcey wrote: > > I am not sure about this. There is an earlier if statement in the loop > > that does a 'return' instead of a break (or continue) and there is a > > return in

Re: [Patch] Fix bug for frame instructions in annulled delay slots

2015-12-07 Thread Steve Ellcey
On Mon, 2015-12-07 at 12:30 -0700, Jeff Law wrote: > On 12/07/2015 12:28 PM, Bernd Schmidt wrote: > > On 12/07/2015 07:54 PM, Steve Ellcey wrote: > >> if (must_annul) > >> -used_annul = 1; > >> +{ > >> + /* Frame relat

[RFC] Request for comments on ivopts patch

2015-12-08 Thread Steve Ellcey
hat people thought of this patch: 2015-12-08 Steve Ellcey * tree-ssa-loop-ivopts.c (determine_iv_cost): Remove preference for original ivs. diff --git a/gcc/tree-ssa-loop-ivopts.c b/gcc/tree-ssa-loop-ivopts.c index 98dc451..26daabc 100644 --- a/gcc/tree-ssa-loop-ivopts.c +++ b/gc

[Patch] Fix for MIPS PR target/65604

2015-12-09 Thread Steve Ellcey
division first and then do the zero test while the division is being calculated. Tested with mips1 runs and by inspecting the code that is output. OK to checkin? Steve Ellcey sell...@imgtec.com 2015-12-09 Steve Ellcey PR target/65604 * config/mips/mips.c

Re: [PATCH] PR tree-optimization/90836 Missing popcount pattern matching

2019-10-08 Thread Steve Ellcey
nd > > aarch64-linux-gnu, which took some time. > > > > attached v3. > > OK. > > Thanks, > Richard. Dmitrij, I checked in this patch for you. Steve Ellcey sell...@marvell.com

Re: [Patch][Aarch64] Implement Aarch64 SIMD ABI and aarch64_vector_pcs attribute

2018-08-06 Thread Steve Ellcey
that works but it does.  I copied the aarch64-torture.exp file from one of the other targets and verified that it ran the tests with -O0, -O1, -O2, '-O3 -g', -Os, '-O2 -flto -fno-use-linker- plugin -flto-partition=none', and '-O2 -flto -fuse-linker-plugin -fno- fat-lt

Re: [Patch][Aarch64] Implement Aarch64 SIMD ABI and aarch64_vector_pcs attribute

2018-08-07 Thread Steve Ellcey
deas on where should this check be done, I thought the TARGET_OPTION_VALID_ATTRIBUTE_P hook might be the right place, but that seems to be specific to the 'target' attribute only, not attributes in general. Steve Ellcey sell...@cavium.com

Re: [aarch64}: added variable issue rate feature for falkor

2018-08-15 Thread Steve Ellcey
dispatch is different than issue but I don't think that GCC models both.  For my patch I would probably want to save the previous instruction scheduled so that if it and the current one are both FP/SIMD ops, then that is all we can issue.  I might need to save several instructions,  not just the last one, to get everything correct. Steve Ellcey sell...@cavium.com

Re: [Patch][Aarch64] Implement Aarch64 SIMD ABI and aarch64_vector_pcs attribute

2018-08-20 Thread Steve Ellcey
ne.  Since there are some uses of non consecutive numbers in one of the tests I  decided to leave [01234567] instead of using [0-7].  Here is the  latest version of the patch, there are no semantic changes, just syntactical ones to address the issues that you pointed out. Steve Ellcey sell...@

ToT build problem on Aarch64 after cfg.h change

2018-08-24 Thread Steve Ellcey
type ‘struct function’  : auto_flag (&fun->cfg->edge_flags_allocated) {} It looks like this may be Aarch64 specific build problem since it is  compiling a platform specific file.  Is there just a missing include? Steve Ellcey sell...@cavium.com

Re: Fix MIPS builds

2018-08-27 Thread Steve Ellcey
t; jeff I tried this change in gcc/config/aarch64/aarch64-speculation.cc (changing include of cfg.h to backend.h) and it fixed my build problem. Steve Ellcey

Re: Fix MIPS builds

2018-08-27 Thread Steve Ellcey
On Mon, 2018-08-27 at 10:27 -0600, Jeff Law wrote: > External Email > > On 08/27/2018 09:55 AM, Steve Ellcey wrote: > > > > On Sun, 2018-08-26 at 20:56 -0600, Jeff Law wrote: > > > > > > MIPS builds have been failing to build due to trying to use an >

Re: [Patch][Aarch64] Implement Aarch64 SIMD ABI and aarch64_vector_pcs attribute

2018-08-31 Thread Steve Ellcey
Ping.  Any feedback from the Aarch64 maintainers? Steve Ellcey sell...@cavium.com On Mon, 2018-08-20 at 10:37 -0700, Steve Ellcey wrote: > On Tue, 2018-08-07 at 12:15 -0500, Segher Boessenkool wrote: > > > > > > > > > +/* { dg-final { scan-assemble

Re: [Patch][Aarch64] Implement Aarch64 SIMD ABI and aarch64_vector_pcs attribute

2018-09-04 Thread Steve Ellcey
On Tue, 2018-09-04 at 17:20 +, Wilco Dijkstra wrote: > External Email > > Hi Steve, > > The latest version compiles the examples I used correctly, so it looks fine > from that perspective (but see comments below). However the key point of > the ABI is to enable better code generation when cal

[PATCH][aarch64] Enable ifunc resolver attribute by default

2017-06-12 Thread Steve Ellcey
e enabled and I do not see any reason not to have it enabled by default. Tested with no regressions, OK to check in? Steve Ellcey sell...@cavium.com 2017-06-12 Steve Ellcey * config.gcc (aarch64*-*-linux*): Enable IFUNC by default. diff --git a/gcc/config.gcc b/gcc/config.gcc

Re: [PATCH/AARCH64] Improve aarch64 conditional compare usage

2017-06-16 Thread Steve Ellcey
https://gcc.gnu.org/ml/gcc-patches/2017-05/msg00021.html Ping. Steve Ellcey sell...@cavium.com

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