[PATCH] middle-end: Correct calculation of mul_widen_cost and mul_highpart_cost.

2020-08-09 Thread Roger Sayle
(%rdx,%rdx,4), %eax ... This patch has been tested on x86_64-pc-linux-gnu with a "make bootstrap" and "make -k check" with no new failures. Ok for mainline? 2020-08-09 Roger Sayle gcc/ChangeLog * expmed.c (init_expmed_one_conv): Restore all->reg's

[PATCH] i386: Improve code generation of smin(x,0) with -m32.

2020-08-10 Thread Roger Sayle
t appears to explicitly specify -m32, but as a compile test, it's not unreasonable to check things on x86_64. OK for mainline? 2020-08-10 Roger Sayle gcc/ChangeLog * config/i386/i386-expand.c (ix86_expand_int_movcc): Expand signed MIN_EXPR against zero as "x &l

[PATCH] x86_64: Use peephole2 to eliminate redundant moves.

2020-08-11 Thread Roger Sayle
may help similar cases. Ok for mainline? 2020-08-11 Roger Sayle * config/i386/i386.md (peephole2): Reduce unnecessary register shuffling produced by register allocation. Thanks in advance, Roger -- Roger Sayle NextMove Software Cambridge, UK diff --git a/gcc/config/i386/i38

RE: [PATCH] x86_64: Use peephole2 to eliminate redundant moves.

2020-08-12 Thread Roger Sayle
nux-gnu, and fix the previous test case, but this now triggers 15070 times during stage2 and stage3, and an additional 8926 times during make check. Many thanks for the impressive improvement. Here's the version as committed. 2020-08-12 Roger Sayle Uroš Bizjak gcc/Change

[PATCH] middle-end: Recognize idioms for bswap32 and bswap64 in match.pd.

2020-08-12 Thread Roger Sayle
"make bootstrap" and a "make -k check" with no new failures. Ok for mainline? 2020-08-12 Roger Sayle gcc/ChangeLog * match.pd (((T)bswapX(x)<>C) -> bswapY(x)): New simplifications to recognize __builtin_bswap{32,64}. gcc/testsuite/ChangeLog

[Committed] PR target/96558: Only call ix86_expand_clear with GENERAL_REGS.

2020-08-12 Thread Roger Sayle
h has been tested on x86_64-pc-linux-gnu with a "make bootstrap" and "make -k check" with no new failures, and fixes the new test case. Committed as obvious to fix the immediate regression. An additional patch (for a supplementary fix) is in preparation. 2020-08-12 Roger S

[PATCH] Alternate fix to PR target/96558: Robustify ix86_expand_clear.

2020-08-13 Thread Roger Sayle
mm0, %xmm0 testl %eax, %eax jne .L91 This patch has been tested on x86_64-pc-linux-gnu (without the peephole2 solution) with a make bootstrap and make -k check with no new failures, but allows the recently added testcase to pass. Ok for mainline? 2020-08-19 Roger Sayle gcc

RE: [PATCH] Alternate fix to PR target/96558: Robustify ix86_expand_clear.

2020-08-13 Thread Roger Sayle
Doh! ENOPATCH. -Original Message- From: Roger Sayle Sent: 13 August 2020 09:29 To: 'GCC Patches' Cc: 'Uros Bizjak' Subject: [PATCH] Alternate fix to PR target/96558: Robustify ix86_expand_clear. This patch is an alternate/supplementary fix to the recent regres

RE: [PATCH] middle-end: Recognize idioms for bswap32 and bswap64 in match.pd.

2020-08-15 Thread Roger Sayle
check" with no new failures. Ok for mainline? Thanks in advance, Roger -- -Original Message- From: Marc Glisse Sent: 12 August 2020 10:43 To: Roger Sayle Cc: 'GCC Patches' Subject: Re: [PATCH] middle-end: Recognize idioms for bswap32 and bswap64 in match.pd. On Wed, 12 Au

[PATCH] middle-end: Fix PR middle-end/85811: Introduce tree_expr_maybe_nan_p et al.

2020-08-15 Thread Roger Sayle
ese predicates could perhaps be hooked into the middle-end's SSA chaining and/or VRP machinery, allowing finiteness to propagated around the CFG, much like we currently propagate value ranges. This patch has been tested on x86_64-pc-linux-gnu with a "make bootstrap" and "ma

PINGs

2020-08-15 Thread Roger Sayle
The following patches are still awaiting review (longer than a week or two). gfortran: Improve translation of POPPAR intrinsic https://gcc.gnu.org/pipermail/gcc-patches/2020-June/548055.html PR middle-end/90597: gcc_assert ICE in layout_type https://gcc.gnu.org/pipermail/gcc-patches/2020-June/5

RE: [PATCH] middle-end: Recognize idioms for bswap32 and bswap64 in match.pd.

2020-08-17 Thread Roger Sayle
ts). This revised patch has been tested on x86_64-pc-linux-gnu with a "make bootstrap" and "make -k check" with no new failures, and confirming all four new tests pass. Ok for mainline? 2020-08-17 Roger Sayle Marc Glisse Jakub Jelinek gcc/ChangeLog

[PATCH] x86_64: PR rtl-optimization/92180: class_likely_spilled vs. cant_combine_insn.

2020-08-17 Thread Roger Sayle
ning register-to-register moves are easily cleaned up by the late optimization passes after reload, such as peephole2 and cprop_hardreg. This patch has been tested on x86_64-pc-linux-gnu with a "make bootstrap" and a "make -k check" with no new failures. Ok for mainline? 2020-08-17

[PATCH] hppa: Improve expansion of ashldi3 when !TARGET_64BIT

2020-08-21 Thread Roger Sayle
7;ve had access to a hppa system, so apart from building a cross-compiler and looking at the assembler it generates, this patch is completely untested. I was wondering whether Dave or Jeff (or someone else with access to real hardware) might "spin" this patch for me? 2020-08-21 Roger Say

[PATCH] middle-end: Simplify popcount/parity of bswap/rotate.

2020-08-21 Thread Roger Sayle
Y, PARITYL and PARITYLL forms with either BSWAP32 or BSWAP64, assuming this transformation won't fire if the integral types have different sizes. The following patch has been tested on x86_64-pc-linux-gnu with "make bootstrap" and "make -k check" with no new failures. Ok for

[PATCH] middle-end: PR tree-optimization/21137: STRIP_NOPS avoids missed optimization.

2020-08-21 Thread Roger Sayle
ke -k check" with no new failures. Ok for mainline? 2020-08-21 Roger Sayle gcc/ChangeLog PR tree-optimization/21137 * gcc/fold-const.c (fold_binary_loc) [NE_EXPR/EQ_EXPR]: Call STRIP_NOPS when checking whether to simplify ((x>>C1)&C2) != 0. gcc/testsuite/Cha

[PATCH] hppa: PR middle-end/87256: Improved hppa_rtx_costs avoids synth_mult madness.

2020-08-21 Thread Roger Sayle
thanks in advance to anyone who can bootstrap and regression test this on real hardware. In an ideal world, changes to rtx_costs should be pretty safe, this function can't introduce any bugs, only expose those are already present (but possibly latent) elsewhere in the compiler. Ha. 2020-08-

RE: [PATCH] hppa: Improve expansion of ashldi3 when !TARGET_64BIT

2020-08-22 Thread Roger Sayle
of familiarity with PA-RISC assembly]. Hopefully you should get much better mileage out of the attached revision. Thanks again (and my sincere apologies), Roger -- -Original Message- From: John David Anglin Sent: 21 August 2020 20:00 To: Roger Sayle ; 'GCC Patches' Cc: 'J

RE: [PATCH] hppa: Improve expansion of ashldi3 when !TARGET_64BIT

2020-08-22 Thread Roger Sayle
it. It's a shame there isn't a hppa64 machine on the GCC compile farm. [p.s. I've ordered Gerry Kane's "PA-RISC 2.0 architecture" book from amazon, so I'll hopefully understand more of what I'm talking about when it arrives]. Thanks again. Roger -- -Origin

RE: [PATCH] hppa: Improve expansion of ashldi3 when !TARGET_64BIT

2020-08-22 Thread Roger Sayle
8 rotr4: bve (%r2) shrpd %r26,%r26,4,%r28 I'm guessing this is very similar to what you were thinking (or what I described previously). Many thanks again for trying out these patches/suggestions for me. Best regards, Roger -- -Original Message- From: John David Anglin Sent:

RE: [PATCH] hppa: PR middle-end/87256: Improved hppa_rtx_costs avoids synth_mult madness.

2020-08-26 Thread Roger Sayle
Hi Dave, > This change is also fine. > > The gcc.target/hppa/shadd-2.c test now fails because there are two additional sh1add instructions. > However, the total number of instructions is the same as before. Just to be on the safe side, I took a deeper look into this. We're now generating a sli

RE: [PATCH] hppa: Improve expansion of ashldi3 when !TARGET_64BIT

2020-08-26 Thread Roger Sayle
Message- From: John David Anglin Sent: 26 August 2020 21:34 To: l...@redhat.com; Roger Sayle ; 'GCC Patches' Subject: Re: [PATCH] hppa: Improve expansion of ashldi3 when !TARGET_64BIT On 2020-08-26 4:08 p.m., Jeff Law wrote: > It 3-stages, but trips: > Tests that now fail,

RE: [PATCH] hppa: Improve expansion of ashldi3 when !TARGET_64BIT

2020-08-27 Thread Roger Sayle
>On 2020-08-26 5:23 p.m., Roger Sayle wrote: >> These more accurate target rtx_costs are used by the >> gimple-ssa-strength-reduction.c (via a call to mult_by_coeff_cost) to >> decide whether applying strength reduction would be profitable. This test >> case,

[PATCH] hppa: Improve hppa_rtx_costs for shifts by constants.

2020-08-27 Thread Roger Sayle
ecked that this doesn't reintroduce PR middle-end/87256. I was wondering whether you could please "put this in the queue", and reconfirm that PR middle-end/87256 remains resolved? 2020-08-27 Roger Sayle gcc/ChangeLog * config/pa/pa.c (hppa_rtx_costs) [ASHIFT, ASHIFT

[PATCH] hppa64: Improve hppa_rtx_costs for DImode shifts by constants.

2020-09-07 Thread Roger Sayle
Generating optimal code is a useful pre-requisite. If nothing else, this should reduce the number PA2.0 instructions generated for PR87256's hog.c. Please let me know what you think. 2020-09-07 Roger Sayle gcc/ChangeLog * config/pa/pa.c (hppa_rtx_costs) [ASHIFT, ASH

RE: [PATCH] middle-end: Improve RTL expansion in expand_mul_overflow,

2020-07-10 Thread Roger Sayle
Hi Richard, > On Thu, Jul 09, 2020 at 09:17:46AM +0100, Richard Sandiford wrote: >> > +res = force_reg (mode, res); >> >> In general, this can be dangerous performance-wise on targets where >> subregs are free. If the move survives to the register allocators, >> it increases the risk

[PATCH] middle-end: Remove truly_noop_truncation check from convert.c

2020-07-11 Thread Roger Sayle
, so it may be a while before I can fully confirm this change causes no problems (and potentially fixes a few) on MIPS. Ok for mainline? 2020-07-11 Roger Sayle gcc/ChangeLog * convert.c (convert_to_integer_1): Narrow integer operations even on targets that require explicit

[PATCH] nvptx: Support 16-bit shifts and extendqihi2.

2020-07-11 Thread Roger Sayle
The following patch adds support for 16-bits shifts and for sign extension from 8 bits to 16 bits. This patch has been tested on nvptx-none with no new regressions. Ok for mainline? 2020-07-11 Roger Sayle gcc/ChangeLog * config/nvptx/nvptx.md (extendqihi2): New instruction

[PATCH] x86: Provide expanders for truncdisi2 and friends.

2020-07-11 Thread Roger Sayle
ch is now archived on gcc-patches for future generations. 2020-07-12 Roger Sayle gcc/ChangeLog * config/i386/i386.md (truncdi2, truncsi2, trunchiqi2): New expanders to make the intended representation of scalar integer truncations explicit. Thoughts? Roger -- Roger Sayle Ne

RE: [PATCH] x86: Provide expanders for truncdisi2 and friends.

2020-07-11 Thread Roger Sayle
Doh! With the attachment. -Original Message- From: Roger Sayle Sent: 12 July 2020 00:29 To: 'gcc-patches@gcc.gnu.org' Subject: [PATCH] x86: Provide expanders for truncdisi2 and friends. Even by my standards, this is an odd patch. This adds expanders to i386.md reque

[PATCH] nvptx: Support floating point reciprocal instructions.

2020-07-12 Thread Roger Sayle
on nvptx-none hosted on x86_64-pc-linux-gnu with "make" and "make check" with no new regressions. Ok for mainline? 2020-07-12 Roger Sayle gcc/ChangeLog * config/nvptx/nvptx.md (recip2): New instruction. gcc/testsuite/ChangeLog * gcc.target/nvptx/recip-1.c:

RE: [PATCH] x86: Provide expanders for truncdisi2 and friends.

2020-07-13 Thread Roger Sayle
Hi Richard, > It seems to be improving TARGET_TRULY_NOOP_TRUNCATION documentation might be > useful here. This is an excellent suggestion. How about the following/attached: 2020-07-13 Roger Sayle gcc/ChangeLog: * doc/tm.texi (TARGET_TRULY_NOOP_TRUNCATION): Clarify that t

[PATCH] nvptx: Provide vec_set and vec_extract patterns.

2020-07-15 Thread Roger Sayle
would be worth the effort involved. This patch has been tested on nvptx-none hosted on x86_64-pc-linux-gnu with "make" and "make check" with no new regressions. Ok for mainline? 2020-07-15 Roger Sayle gcc/ChangeLog: * config/nvptx/nvptx.md (nvptx_v

[PATCH] Define TARGET_TRULY_NOOP_TRUNCATION to false.

2020-07-16 Thread Roger Sayle
a cvt.u32.u32). This patch has been tested on nvptx-none hosted on x86_64-pc-linux-gnu with "make" and "make check" with fewer ICEs and no wrong code regressions. Ok for mainline? 2020-07-16 Roger Sayle gcc/ChangeLog * config/nvptx/nvptx.c (nvptx_tru

RE: [PATCH] x86: Provide expanders for truncdisi2 and friends.

2020-07-16 Thread Roger Sayle
arget hook. This patch has been tested with "make bootstrap" and "make -k check" on x86_64-pc-linux-gnu with no regressions. 2020-07-16 Roger Sayle gcc/ChangeLog * function.c (assign_parm_setup_block): Use the macro TRULY_NOOP_TRUNCATION_M

[PATCH] middle-end: Simplify (sign_extend:HI (truncate:QI (ashiftrt:HI X 8)))

2020-07-19 Thread Roger Sayle
cvt.s16.s8 %r37, %r36; to shr.s16 %r37, %r34, 8; This patch has been tested on x86_64-pc-linux-gnu with "make bootstrap" and "make -k check" (just to be safe), and nvptx-none (both with and without my other patches), all with no new regressions. Ok f

[PATCH] middle-end: Fold popcount(x&4) to (x>>2)&1 and friends.

2020-07-20 Thread Roger Sayle
e -k check" with no new failures. If this is approved after (or at the same time) as the patch above, I'm happy to resolve the conflicts and retest before committing. 2020-07-20 Roger Sayle gcc/ChangeLog * match.pd (popcount(x) -> x>>C): New simplification. gc

RE: [PATCH] middle-end: Fold popcount(x&4) to (x>>2)&1 and friends.

2020-07-22 Thread Roger Sayle
ant [lshrdi3 is sometimes cheaper than ashrdi3]. This revised patch has been tested on x86_64-pc-linux-gnu with a "make bootstrap" and "make -k check" with no new failures. Ok for mainline? 2020-07-22 Roger Sayle Richard Biener gcc/ChangeLog * match.p

RE: [PATCH] middle-end: Fold popcount(x&4) to (x>>2)&1 and friends.

2020-07-23 Thread Roger Sayle
On Thu, Jul 23, 2020 at 10:02 Richard Biener wrote: > Likewise for the existing > >+/* popcount(X) == 0 is X == 0, and related (in)equalities. */ (for >+(for popcount (POPCOUNT) > (for cmp (le eq ne gt) > rep (eq eq ne ne) > (simplify > (cmp (popcount @0) integer_zerop) >

[committed] Resolve PR rtl-optimization/96298: XOR doesn't distribute over XOR.

2020-07-23 Thread Roger Sayle
XOR. Possibly a typo. The following "obvious" one line change fixes the breakage. My apologies. 2020-07-23 Roger Sayle PR rtl-optimization/96298 * simplify-rtx.c (simplify_binary_operation_1) [XOR]: Xor doesn't distribute over xor, so (a^b)^(c^b) is not t

[PATCH] New test for PR rtl-optimization/96298.

2020-07-28 Thread Roger Sayle
fails without it on x86_64-pc-linux-gnu. Thoughts? 2020-07-28 Roger Sayle Zdenek Sojka gcc/testsuite/ChangeLog PR rtl-optimization/96298 * gcc.dg/pr96298.c: New test. Thanks in advance. Roger -- Roger Sayle NextMove Software Cambridge, UK pr96298.c.patch Descri

[Committed] middle-end: Parity and popcount folding optimizations.

2020-07-28 Thread Roger Sayle
bout match.pd's BUILT_IN_ iterators; I'll post a follow-up patch to clean-up/make use of this idiom elsewhere in match.pd, as it is much nicer. Cheers, Roger -- -Original Message- From: Richard Biener Sent: 23 July 2020 10:02 To: GCC Patches Cc: Roger Sayle Subject: Re: [P

[PATCH] x86_64: Integer min/max improvements.

2020-07-30 Thread Roger Sayle
ux-gnu with a make bootstrap followed by make -k check with no new regressions. Ok for mainline? 2020-07-30 Roger Sayle * config/i386/i386.md (MAXMIN_IMODE): No longer needed. (3): Support SWI248 and general_operand for second operand, when TARGET_CMOVE.

RE: [PATCH] x86_64: Integer min/max improvements.

2020-07-30 Thread Roger Sayle
o memory, there is no extension (or AND). But perhaps the problem isn't with min/and at all, but about whether function arguments and return values are guaranteed to be extended on input/return, so perhaps this is related to SUBREG_PROMOTED_P and friends? Thoughts? Cheers, Roger > 202

[PATCH] genmatch: Avoid unused parameter warnings in generated code.

2020-08-01 Thread Roger Sayle
tree, tree) { return false; } which has the same signature but no compilation warnings. This patch has been tested on x86_64-pc-linux-gnu with a full "make bootstrap" and "make -k check" with no new failures. Ok for mainline? 2020-08-01 Roger Sayle * gcc/ge

[PATCH] PR rtl-optimization 61494: Preserve x-0.0 with HONOR_SNANS.

2020-08-02 Thread Roger Sayle
64-pc-linux-gnu with a "make bootstrap" and "make -k check" with no new regressions. Ok for mainline? 2020-08-02 Roger Sayle gcc/ChangeLog PR rtl-optimization/61494 * simplify-rtx.c (simplify_binary_operation_1) [MINUS]: Don't simplify x - 0.0 wit

[PATCH] PR rtl-optimization 61494: Preserve x-0.0 with HONOR_SNANS.

2020-08-02 Thread Roger Sayle
64-pc-linux-gnu with a "make bootstrap" and "make -k check" with no new regressions. Ok for mainline? 2020-08-02 Roger Sayle gcc/ChangeLog PR rtl-optimization/61494 * simplify-rtx.c (simplify_binary_operation_1) [MINUS]: Don't simplify x - 0.0 wit

[testsuite] Test case for PR rtl-optimization/60473

2020-08-02 Thread Roger Sayle
that we don't regress again in future. Ok for mainline? 2020-08-02 Roger Sayle gcc/testsuite/ChangeLog PR rtl-optimization/60473 * gcc.target/i386/pr60473.c: New test. Thanks in advance, Roger -- Roger Sayle NextMove Software Cambridge, UK diff --git a/gcc/test

RE: [PATCH] x86_64: Integer min/max improvements.

2020-08-03 Thread Roger Sayle
performance, but it is always smaller. Tested on x86_64-pc-linux-gnu (with the above patch). 2020-08-03 Roger Sayle gcc/testsuite/ChangeLog * gcc.target/i386/minmax-8.c: New test. * gcc.target/i386/minmax-9.c: New test. * gcc.target/i386/minmax-10.c: New test

[PATCH] middle-end: Recognize/canonicalize MULT_HIGHPART_EXPR and expand it.

2020-08-04 Thread Roger Sayle
al target-specific test in the nvptx patch to support "mul.hi.s64" and "mul.hi.u64" that I'm just about to post, but this code is already well exercised during bootstrap by libgcc. Ok for mainline? 2020-08-04 Roger Sayle gcc/ChangeLog * match.pd (((wide)x * (wid

[PATCH] nvptx: Add support for PTX highpart multiplications (e.g. mul.hi.s32)

2020-08-04 Thread Roger Sayle
mainline. I'd considered submitting this patch either without support for the 64bit variants, or without tests for them, but it seemed more reasonable to make both enhancements at the same time. Ok for mainline (once the previous patch has been approved/pushed)? 2020-08-04 Roger Sayle gcc/Ch

RE: [PATCH] x86_64: Integer min/max improvements.

2020-08-06 Thread Roger Sayle
iginal Message- From: Uros Bizjak Sent: 03 August 2020 11:29 To: Roger Sayle Cc: GCC Patches Subject: Re: [PATCH] x86_64: Integer min/max improvements. On Thu, Jul 30, 2020 at 1:23 PM Roger Sayle wrote: > > > This patch tweaks the way that min and max are expanded, so that the >

RE: [PATCH] x86_64: Integer min/max improvements.

2020-08-06 Thread Roger Sayle
Sorry for the inconvenience. I've just added the obligatory /* { dg-do compile { target { ! ia32 } } } */ to this new gcc.target/i386 test to resolve this failure. Please let me know if there's a better fix. 2020-08-06 Roger Sayle gcc/testsuite/ChangeLog * gcc.target/i38

[PATCH] x86: Improve expansion of __builtin_parity

2020-06-06 Thread Roger Sayle
uld be very much appreciated. Many thanks in advance, Roger -- 2020-06-05 Roger Sayle * config/i386/i386.md (paritydi2, paritysi2): Expand reduction via shift and xor to an USPEC PARITY matching a parityhi2_cmp. (paritydi2_cmp, paritysi2_cmp): De

[PATCH] middle-end: Optimize (A&C)^(B&C) to (A^B)&C in simplify_rtx.

2020-06-11 Thread Roger Sayle
I'd very much appreciate it if someone could commit this change for me. 2020-06-11 Roger Sayle * simplify-rtx.c (simplify_binary_operation_1): Simplify (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant). Thanks very much in a

[PATCH] middle-end: Parity folding optimizations.

2020-06-11 Thread Roger Sayle
"make -k check" on x86_64-pc-linux-gnu with no regressions. If approved, I'd very much appreciate it if someone could commit this change for me. 2020-06-12 Roger Sayle * match.pd (popcount(x)&1 -> parity(x)): New simplification. (parity(~

[PATCH] gfortran: Improve translation of POPPAR intrinsic

2020-06-14 Thread Roger Sayle
an) reviewer could commit this change for me. 2020-06-14 Roger Sayle * trans-intrinsic.c (gfc_conv_intrinsic_popcnt_poppar): Translate poppar(kind=16) as parityll(hipart(x)^lopart(x)) instead of parityll(hipart(x))^parityll(lopart(x)). Thanks in advance, Ro

[PATCH take 2] middle-end: Optimize (A&C)^(B&C) to (A^B)&C in simplify_rtx.

2020-06-16 Thread Roger Sayle
disaster recovery plan. This patch has been tested with "make bootstrap" and "make -k check" on x86_64-pc-linux-gnu with no regressions. 2020-06-16 Roger Sayle Richard Sandiford * simplify-rtx.c (simplify_distributive_operation): New function

[PATCH] simplify-rtx: Two easy pieces.

2020-06-19 Thread Roger Sayle
make bootstrap" and "make -k check" on x86_64-pc-linux-gnu with no regressions. 2020-06-19 Roger Sayle * simplify-rtx.c (simplify_unary_operation_1): Simplify (parity (parity x)) as (parity x), i.e. PARITY is idempotent. (simplify_binary_operation_1):

RE: [PATCH] simplify-rtx: Two easy pieces.

2020-06-20 Thread Roger Sayle
Hi Segher, It's great to hear from you again. It's been a while. >On Fri, Jun 19, 2020 at 09:42:54PM +0100, Roger Sayle wrote: >> My recent patch to add scalar integer simplification unit tests to >> simplify_rtx_c_tests identified two "trivial" cor

[committed] middle-end: Optimize (A&C)^(B&C) to (A^B)&C in simplify_rtx (take 3).

2020-06-29 Thread Roger Sayle
version as committed. I've added the (xor (ashiftrt x c) (ashiftrt y c)) case as per your suggestion, which fires 6 times during make -k check on x86_64-pc-linux-gnu. Cheers, Roger -- -Original Message- From: Richard Sandiford Sent: 22 June 2020 20:41 To: Roger Sayle Cc: gcc-patc

[PATCH] nvptx: Fix ICE in nvptx_vector_alignment on gcc.dg/attr-vector_size.c

2020-06-29 Thread Roger Sayle
mpile-time error messages. Tested on --target=nvptx-none, with a "make" and "make check" which results in four fewer unexpected failures and three more expected passes. Ok for mainline? 2020-06-29 Roger Sayle gcc/ChangeLog: * config/nvptx/nvptx.c (nvptx_vector_ali

[PATCH] PR middle-end/90597: gcc_assert ICE in layout_type

2020-06-29 Thread Roger Sayle
ercise the code itself. OK for mainline? Thanks in advance to anyone who can confirm this patch resolves the unexpected failure of gcc.dg/attr-vector_size.c on an affected platform (i.e. a backend that doesn't define TARGET_VECTOR_ALIGNMENT). 2020-06-30 Roger Sayle PR middle-end

[PATCH] nvptx: : Add support for popcount and widening multiply instructions

2020-07-01 Thread Roger Sayle
" and "make -k check" on --build=nvptx-none hosted on x86_64-pc-linux-gnu with no new regressions. 2020-07-01 Roger Sayle gcc/ChangeLog: * config/nvptx/nvptx.md (popcount2): New instructions. (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New ins

RE: [PATCH] nvptx: Fix ICE in nvptx_vector_alignment on gcc.dg/attr-vector_size.c

2020-07-02 Thread Roger Sayle
thanks for pointing out that the nvptx problem is PR target/90932. Roger -- -Original Message- From: Tom de Vries Sent: 02 July 2020 13:09 To: Roger Sayle ; gcc-patches@gcc.gnu.org Subject: Re: [PATCH] nvptx: Fix ICE in nvptx_vector_alignment on gcc.dg/attr-vector_size.c On 6/29/20 7

[PATCH] nvptx: : Add support for popcount and widening multiply instructions

2020-07-03 Thread Roger Sayle
a-b)+c. The hope is that these mnemonics help ptxas generate the low-level hardware's IADD3 instruction. Tested by "make" and "make -k check" on --build=nvptx-none hosted on x86_64-pc-linux-gnu with no new regressions. [PATCH] nvptx: Add support for vadd.add

[PATCH] middle-end: Improve RTL expansion in expand_mul_overflow,

2020-07-06 Thread Roger Sayle
linux-gnu, where SUBREGs are free, this patch generates exactly the same builtin-arith-overflow-1.s as before. This patch has been tested on both x86_64-pc-linux-gnu with "make bootstrap" and nvptx-none with "make", with no new testsuite regressions on either platform.

RE: [PATCH] fold-const: Don't consider NaN non-negative [PR97965]

2020-11-26 Thread Roger Sayle
be consistent. I hope this helps. I'm happy to spin this patch myself but it may take a little while. Hopefully, this is sufficient to point folks in the right (or one possible) direction. Best regards, Roger -- Roger Sayle NextMove Software Limited Cambridge, UK -Original Message-

RE: [PATCH] fold-const: Don't consider NaN non-negative [PR97965]

2020-11-27 Thread Roger Sayle
Hi Jakub, Technically, PR97965 doesn't explicitly mention equality/inequality, but you're right, it makes sense to tackle this missed optimization at the same time as we fix the wrong-code. On Thu, Nov 26, 2020, Jakub Jelinek wrote: >On Thu, Nov 26, 2020 at 01:56:03PM -, Roge

RE: [PATCH] fold-const: Don't consider NaN non-negative [PR97965]

2020-11-27 Thread Roger Sayle
Doh! Wrong patch2.txt file. Sorry. -Original Message- From: Roger Sayle Sent: 27 November 2020 10:52 To: 'Jakub Jelinek' ; 'Joseph S. Myers' Cc: 'Richard Biener' ; 'gcc-patches@gcc.gnu.org' Subject: RE: [PATCH] fold-const: Don't c

[xstormy16 PATCH] Update xstormy16_rtx_costs.

2023-04-22 Thread Roger Sayle
-k check-gcc". Many thanks to Jeff Law for additional testing. Ok for mainline? 2023-04-22 Roger Sayle gcc/ChangeLog * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to provide reasonable values for common arithmetic operations and immediate operands

[xstormy16 PATCH] Improved SImode shifts by two bits.

2023-04-22 Thread Roger Sayle
xstormy16-elf on x86_64-pc-linux-gnu, and confirming that the new test case passes with "make -k check-gcc". Ok for mainline? 2023-04-22 Roger Sayle gcc/ChangeLog * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement SImode shifts by two by performing a single

[xstormy16] Add extendhisi2 and zero_extendhisi2 patterns to stormy16.md

2023-04-22 Thread Roger Sayle
een tested by building a cross-compiler to xstormy16-elf on x86_64-pc-linux-gnu, and confirming that the new test case passes with "make -k check-gcc". Ok for mainline? 2023-04-22 Roger Sayle gcc/ChangeLog * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h

RE: [xstormy16] Add extendhisi2 and zero_extendhisi2 patterns to stormy16.md

2023-04-23 Thread Roger Sayle
On 4/33/23, Jeff Law wrote: > On 4/22/23 14:57, Roger Sayle wrote: > > Whilst there, I also fixed the instruction lengths and formatting of > > the zero_extendqihi2 pattern. Then, mostly for documentation purposes > > as the 'T' constraint isn't yet im

[PATCH] PR rtl-optimization/109476: Use ZERO_EXTEND instead of zeroing a SUBREG.

2023-04-23 Thread Roger Sayle
eff Law for testing this patch on his build farm, which spotted an issue on xstormy16, which should now be fixed by (either of) my recent xstormy16 patches. Ok for mainline? 2023-04-23 Roger Sayle gcc/ChangeLog PR rtl-optimization/109476 * lower-subreg.cc: Include explow.

[Committed] Correct zeroextendqihi2 insn length regression on xstormy16.

2023-04-25 Thread Roger Sayle
2023-04-25 Roger Sayle gcc/ChangeLog * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix length attribute for the first (memory operand) alternative. Roger -- diff --git a/gcc/config/stormy16/stormy16.md b/gcc/config/stormy16/stormy16.md index fd52588..9d92492 100644

[xstormy16 PATCH] Add support for byte and word swapping instructions.

2023-04-25 Thread Roger Sayle
been tested by building a cross-compiler to xstormy16-elf from x86_64-pc-linux-gnu, and confirming the new test cases pass. Ok for mainline? 2024-04-25 Roger Sayle gcc/ChangeLog * config/stormy16/stormy16.md (bswaphi2): New define_insn. (bswapsi2): New define_insn. (s

[PATCH] Synchronize include/ctf.h with upstream binutils/libctf.

2023-04-27 Thread Roger Sayle
he usage of ctf.h in ctfout.cc and dwarf2ctf.cc is compatible with the new version. Ok for mainline? 2023-04-27 Roger Sayle include/ChangeLog * ctf.h: Import latest version from binutils/libctf. Thanks in advance, Roger -- diff --git a/include/ctf.h b/include/ctf.h index b867fc5..

Re: [PATCH] Turn on LRA on all targets

2023-04-29 Thread Roger Sayle
Segher Boessenkool wrote: > I send this patch now so that people can start testing. > > diff --git a/gcc/config/nvptx/nvptx.cc b/gcc/config/nvptx/nvptx.cc > index 89349dae9e62..e32f17377525 100644 > --- a/gcc/config/nvptx/nvptx.cc > +++ b/gcc/config/nvptx/nvptx.cc > @@ -7601,9 +7601,6 @@ nvptx_as

[xstormy16 PATCH] Recognize/support swpn (swap nibbles) instruction.

2023-04-29 Thread Roger Sayle
sed in my next (split out) patch. This patch has been tested by building a cross-compiler to xstormy16-elf from x86_64-pc-linux-gnu and confirming the new test cases pass. Ok for mainline? 2023-04-29 Roger Sayle gcc/ChangeLog * config/stormy16/stormy16.md (any_lshift): N

[xstormy16 PATCH] Efficient HImode rotate left by a single bit.

2023-04-29 Thread Roger Sayle
ons by 8-bits can now be recognized and implemented using swpb. This patch has been tested by building a cross-compiler to xstormy16-elf from x86_64-pc-linux-gnu and confirming the new test cases pass. Ok for mainline? 2023-04-29 Roger Sayle gcc/ChangeLog * config/stormy16/stormy16.md

[Committed] Update xstormy16's neghi2 pattern to not clobber the carry flag.

2023-04-30 Thread Roger Sayle
eduled. Many thanks (again) to Jeff Law for testing/reporting this issue. This patch has been tested by building a cross compiler to xstormy16-elf from x86_64-pc-linux-gnu. Committed as obvious (in hindsight). 2023-04-30 Roger Sayle gcc/ChangeLog * config/stormy16/stormy16.md (neghi2): R

Re: [committed] Convert xstormy16 to LRA

2023-05-01 Thread Roger Sayle
Jeff Law wrote: > This patch converts the xstormy16 patch to LRA. It introduces a code > quality regression in the shiftsi testcase, but it also fixes numerous > aborts/errors. IMHO it's a good tradeoff. I've investigated the shiftsi regression on xstormy16 and the underlying cause appears t

RE: [committed] Convert xstormy16 to LRA

2023-05-02 Thread Roger Sayle
On 02 May 2023 13:40, Paul Koning wrote: > > On May 1, 2023, at 7:37 PM, Roger Sayle > wrote: > > > > ... > > The shiftsi.cc regression on xstormy16 is fixed by adding > > -fno-split-wide-types. > > In fact, if all the regression tests pass, I'd su

RE: [committed] Convert xstormy16 to LRA

2023-05-02 Thread Roger Sayle
On 02 May 2023 14:49, Segher Boessenkool wrote: > On Tue, May 02, 2023 at 02:18:43PM +0100, Roger Sayle wrote: > > On 02 May 2023 13:40, Paul Koning wrote: > > > > On May 1, 2023, at 7:37 PM, Roger Sayle > > > > > > > wrote: > > > > The

[PATCH] Don't call emit_clobber in lower-subreg.cc's resolve_simple_move.

2023-05-06 Thread Roger Sayle
2} with no new failures. OK for mainline? 2023-05-06 Roger Sayle gcc/ChangeLog PR target/43644 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber immediately before moving a multi-word register by parts. gcc/testsuite/ChangeLog

[x86_64 PATCH] Introduce insvti_highpart define_insn_and_split.

2023-05-06 Thread Roger Sayle
failures. Ok for mainline now that we're back in stage 1? 2023-05-06 Roger Sayle gcc/ChangeLog * config/i386/i386.md (any_or_plus): Move definition earlier. (*insvti_highpart_1): New define_insn_and_split to overwrite (insv) the highpart of a TImode r

[PATCH] nvptx: Add suppport for __builtin_nvptx_brev instrinsic.

2023-05-06 Thread Roger Sayle
er. https://docs.nvidia.com/cuda/cuda-math-api/group__CUDA__MATH__INTRINSIC__INT .html This patch has been tested on nvptx-none which make and make -k check with no new failures. Ok for mainline? 2023-05-06 Roger Sayle gcc/ChangeLog * config/nvptx/nvptx.cc (nvptx_expand_brev): Exp

[PATCH] Add RTX codes for BITREVERSE and COPYSIGN.

2023-05-06 Thread Roger Sayle
patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-32} with no new failures. Ok for mainline? 2023-05-06 Roger Sayle gcc/ChangeLog * doc/rtl.texi (bitreverse, copysign): Document new RTX codes. * rtl.def

[libgcc PATCH] Add bit reversal functions __bitrev[qhsd]i2.

2023-05-06 Thread Roger Sayle
r mainline? 2023-05-06 Roger Sayle gcc/ChangeLog * doc/libgcc.texi (__bitrevqi2): Document bit reversal run-time functions; __bitrevqi2, __bitrevhi2, __bitrevsi2 and __bitrevdi2. libgcc/ChangeLog * Makfile.in (lib2funcs): Add __bitrev[qhsd]i2. * libgcc-

[DOC PATCH] Document the VEC_PERM_EXPR tree code (and minor clean-ups).

2023-02-04 Thread Roger Sayle
can decide whether to approve just the new content, or the content+clean-up. Ok for mainline? 2023-02-04 Roger Sayle gcc/ChangeLog * doc/generic.texi : Standardize capitalization of section titles from "Expression trees". : Likewise standardize capitalizatio

RE: [DOC PATCH] Document the VEC_PERM_EXPR tree code (and minor clean-ups).

2023-02-06 Thread Roger Sayle
second(?) Just curious. Roger -- > -Original Message- > From: Richard Sandiford > Sent: 06 February 2023 12:22 > To: Richard Biener > Cc: Roger Sayle ; GCC Patches patc...@gcc.gnu.org> > Subject: Re: [DOC PATCH] Document the VEC_PERM_EXPR tree code (and minor > cle

RE: [PATCH] Canonicalize X&-Y as X*Y in match.pd when Y is [0,1].

2022-05-25 Thread Roger Sayle
> > On May 25, 2022, at 7:34 AM, Richard Biener via Gcc-patches patc...@gcc.gnu.org> wrote: > > > > On Tue, May 24, 2022 at 3:55 PM Roger Sayle > wrote: > >> > >> > >> "For every pessimization, there's an equal and opposite optim

[x86 PATCH] Pre-reload splitter to transform and;cmp into not;test.

2022-05-26 Thread Roger Sayle
--target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-05-26 Roger Sayle gcc/ChangeLog * config/i386/i386.md (*test_not): New define_insn_and_split to split a combined "and;cmp" sequence into "not;test". gcc/testsuite/ChangeLog * gcc.ta

[x86 PING] PR target/70321: Split double word equality/inequality after STV.

2022-05-30 Thread Roger Sayle
become the requested test cases for the fix proposed here: https://gcc.gnu.org/pipermail/gcc-patches/2022-May/595390.html OK for mainline, now we're in stage 1? 2022-05-30 Roger Sayle gcc/ChangeLog PR target/70321 * config/i386/i386-expand.cc (ix86_expand_branch): Don&

[PATCH] PR rtl-optimization/7061: Complex number arguments on x86_64-like ABIs.

2022-05-30 Thread Roger Sayle
has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32}, with no new failures. Ok for mainline? 2020-05-30 Roger Sayle gcc/ChangeLog PR rtl-optimization/7061 * expr.cc (emit_group_stote): For groups that cons

[PATCH] Fold truncations of left shifts in match.pd

2022-05-30 Thread Roger Sayle
=unix{-m32}, with no new failures. Ok for mainline? 2022-05-30 Roger Sayle gcc/ChangeLog * match.pd (convert (lshift @1 INTEGER_CST@2)): Narrow integer left shifts by a constant when the result is truncated, and the shift constant is well-defined for the narrower mode

[x86 PATCH] Allow SCmode and DImode to be tieable on TARGET_64BIT.

2022-05-30 Thread Roger Sayle
64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-05-30 Roger Sayle gcc/ChangeLog * config/i386/i386.cc (ix86_modes_tieable_p): Allow SCmode to be tieable with DImode on TARGET_

[PATCH] Make the default rtx_costs of MULT/DIV variants consistent.

2022-05-30 Thread Roger Sayle
rget_board=unix{-m32}, with no new failures. Ok for mainline? 2022-05-30 Roger Sayle gcc/ChangeLog * rtlanal.cc (rtx_cost) : Treat FMA, SS_MULT, US_MULT, SMUL_HIGHPART and UMUL_HIGHPART as having the same cost as MULT. : Likewise, SS_DIV and US_DIV have the same default

[x86 PATCH] PR rtl-optimization/101617: Use neg/sbb in ix86_expand_int_movcc.

2022-05-30 Thread Roger Sayle
s (in both SImode and DImode) matching the pre-existing define_insns of the same name. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-05-30 Roger Sayle gcc

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