[committed] testsuite: Require gnu-tm support for pr94856.C

2020-05-11 Thread Kito Cheng
changed, 5 insertions(+) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c35e084b366b..7d28875760cf 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2020-05-11 Kito Cheng + + * gcc/testsuite/g++.dg/ipa/pr94856.C: Require fgnu-tm. + 2020

Re: [PATCH v4] Fix alignment for local variable [PR90811]

2020-05-18 Thread Kito Cheng
ping On Tue, Apr 14, 2020 at 2:53 PM Kito Cheng wrote: > - The alignment for local variable was adjust during > estimate_stack_frame_size, >however it seems wrong spot to adjust that, expand phase will adjust > that >but it little too late to some gimple optimization

Re: [PATCH v2 2/2] RISC-V: Handle implied extension for -march parser.

2020-05-18 Thread Kito Cheng
Committed, thanks :) On Wed, May 13, 2020 at 6:37 AM Jim Wilson wrote: > On Sun, Apr 12, 2020 at 7:54 PM Kito Cheng wrote: > > On Sat, Apr 11, 2020 at 1:48 AM Jim Wilson wrote: > > > Do we really need this now? It is a new feature not a bug fix, so it > > > might

[PATCH] testsuite: Match ASCII color code for ubsan's test pattern.

2020-05-19 Thread Kito Cheng
, didn't consider that: (\[^\n\r]*runtime error: passing zero to ctz\\\(\\\), which is not a valid argument\[^\n\r]*(\n|\r\n|\r)){4} - Verified on native X86 and RISC-V qemu full system mode and user mode. ChangeLog gcc/testsuite/ Kito Cheng * c-c++-common/ubsan/builtin-1.c:

Re: [PATCH] testsuite: Match ASCII color code for ubsan's test pattern.

2020-05-19 Thread Kito Cheng
Hi Jakub: > s/Ditoo/Ditto/g Thank for catching that. > I think I'd prefer instead exporting some env var for all the ubsan > tests in ubsan.exp that would disable the colorization. Sounds like it's a better solution, it seems like it can be disable by UBSAN_OPTIONS=color=never, I'll try and send

[PATCH] testsuite: Disable colorization for ubsan test

2020-05-20 Thread Kito Cheng
full system mode and user mode. ChangeLog: gcc/testsuite/ Kito Cheng * ubsan-dg.exp (orig_ubsan_options_saved): New (orig_ubsan_options): Ditto. (ubsan_init): Store UBSAN_OPTIONS and set UBSAN_OPTIONS. (ubsan_finish): Restore UBSAN_OPTIONS. --- gcc/testsuit

Re: [PATCH v4] Fix alignment for local variable [PR90811]

2020-05-20 Thread Kito Cheng
Hi Richard: Tested and committed with fixes, thanks your review :) On Mon, May 18, 2020 at 6:22 PM Richard Biener wrote: > > On Mon, May 18, 2020 at 9:27 AM Kito Cheng wrote: > > > > ping > > > > On Tue, Apr 14, 2020 at 2:53 PM Kito Cheng wrote: > >> &

Re: [PATCH v4] Fix alignment for local variable [PR90811]

2020-05-20 Thread Kito Cheng
Ok, I will check. On Wed, May 20, 2020 at 8:04 PM Richard Biener wrote: > > On Wed, May 20, 2020 at 9:20 AM Kito Cheng wrote: > > > > Hi Richard: > > > > Tested and committed with fixes, thanks your review :) > > And we're now hitting > >

Re: [PATCH v4] Fix alignment for local variable [PR90811]

2020-05-20 Thread Kito Cheng
There is an assertion checking to make sure LOCAL_DECL_ALIGNMENT never shrink alignment, But those two testcase did under x86_64 with -m32, I am not sure if the behavior is expected or not? It should be fixed on target if that behavior is not expected. On Wed, May 20, 2020 at 8:06 PM Kito Cheng

Re: [PATCH] testsuite: Disable colorization for ubsan test

2020-06-01 Thread Kito Cheng
ping On Wed, May 20, 2020 at 3:01 PM Kito Cheng wrote: > > - Run gcc testsuite with qemu will print out ascii color code for >ubsan related testcase, however several testcase didn't consider >that, so disable colorization prevent such problem and simplify the >

[committed] RISC-V: Fix python3 compatibility for multilib-generator

2020-12-23 Thread Kito Cheng
The subprocess return string is raw bytes in python3, it must decode before used as string, verifed with python2 and python3. gcc/ChangeLog: * config/riscv/multilib-generator (arch_canonicalize): Call decode for the subprocess return value. --- gcc/config/riscv/multilib-generator

[PATCH 0/2] RISC-V: Introduce new architecture extension test macros

2021-01-04 Thread Kito Cheng
This patch set introduce new set of architecture extension test macros which is accept on riscv-c-api-doc[1] recently. The motivation of this scheme is have an unify naming scheme for extension macro and add the capability to checking version. [1] https://github.com/riscv/riscv-c-api-doc/blob/ma

[PATCH 1/2] RISC-V: Move class riscv_subset_list and riscv_subset_t to riscv-protos.h

2021-01-04 Thread Kito Cheng
Pre-work of new style of architecture extension test macros, we need the list used in `config/riscv/riscv-c.c`, so those struct/class declaration must move to header file rather than local C file. gcc/ChangeLog * common/config/riscv/riscv-common.c (RISCV_DONT_CARE_VERSION): Move t

[PATCH 2/2] RISC-V: Implement new style of architecture extension test macros.

2021-01-04 Thread Kito Cheng
- This patch introduce new set of architecture extension test macros which is accept on riscv-c-api-doc recently. - https://github.com/riscv/riscv-c-api-doc/blob/master/riscv-c-api.md#architecture-extension-test-macro - We will also mark deprecated for legacy architecture extension test macro

[PATCH] Fix array-quals-1.c for RISC-V

2021-01-06 Thread Kito Cheng
RISC-V will put those variable on srodata rather than rodata. gcc/testsuite/ChangeLog: * gcc.dg/array-quals-1.c: Allow srodata. --- gcc/testsuite/gcc.dg/array-quals-1.c | 40 ++-- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/gcc/testsuite/gcc.dg

Re: [PATCH] RISC-V: Zihintpause: add __builtin_riscv_pause

2021-01-06 Thread Kito Cheng
ISC-V implementations, including old ones, are required to > support it. And, of course, that's the reason we encoded it this way > :) > > > On Wed, Jan 6, 2021 at 7:35 PM Kito Cheng wrote: > > > > Hi Philipp: > > > > Could you add zihintpause to -march parse

[PATCH v2 0/2] RISC-V: Introduce new architecture extension test macros

2021-01-07 Thread Kito Cheng
This patch set introduce new set of architecture extension test macros which is accept on riscv-c-api-doc[1] recently. The motivation of this scheme is have an unify naming scheme for extension macro and add the capability to checking version. V2 Changes: - Fix MacOS build issue. - Create new hea

[PATCH v2 1/2] RISC-V: Move class riscv_subset_list and riscv_subset_t to riscv-protos.h

2021-01-07 Thread Kito Cheng
Pre-work of new style of architecture extension test macros, we need the list used in `config/riscv/riscv-c.c`, so those struct/class declaration must move to header file rather than local C file. gcc/ChangeLog * common/config/riscv/riscv-common.c (RISCV_DONT_CARE_VERSION): Move t

[PATCH v2 2/2] RISC-V: Implement new style of architecture extension test macros.

2021-01-07 Thread Kito Cheng
- This patch introduce new set of architecture extension test macros which is accept on riscv-c-api-doc recently. - https://github.com/riscv/riscv-c-api-doc/blob/master/riscv-c-api.md#architecture-extension-test-macro - We will also mark deprecated for legacy architecture extension test macro

[PATCH 2/2] RISC-V: Unify the output asm pattern between gpr_save and gpr_restore pattern.

2020-06-10 Thread Kito Cheng
gcc/ChangeLog: * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove. * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update value. * config/riscv/riscv.c (riscv_output_gpr_save): Remove. * config/riscv/riscv.md (gpr_save): Update output asm pat

[PATCH 1/2] RISC-V: Describe correct USEs for gpr_save pattern [PR95252]

2020-06-10 Thread Kito Cheng
- Verified on rv32emc/rv32gc/rv64gc bare-metal target and rv32gc/rv64gc linux target with qemu. gcc/ChangeLog: * config/riscv/predicates.md (gpr_save_operation): New. * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New. (riscv_gpr_save_operation_p): Ditto.

[committed] RISC-V: Suppress warning for signed and unsigned integer comparison.

2020-06-14 Thread Kito Cheng
gcc/ChangeLog: * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to unsigned for i. (riscv_gpr_save_operation_p): Change type to unsigned for i and len. --- gcc/config/riscv/riscv.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git

Re: [PATCH 1/2] RISC-V: Describe correct USEs for gpr_save pattern [PR95252]

2020-06-14 Thread Kito Cheng
Hi Andreas: Thanks for your reminder, fixed on trunk: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=82a3008e56c620008b4575a97e459e2769df54db On Sat, Jun 13, 2020 at 4:58 PM Andreas Schwab wrote: > > On Jun 10 2020, Kito Cheng wrote: > > > - Verified on rv32emc/rv32gc/rv64gc ba

[PATCH] RISC-V: Fix ICE on riscv_gpr_save_operation_p [PR95683]

2020-06-15 Thread Kito Cheng
- riscv_gpr_save_operation_p might try to match parallel on other patterns like inline asm pattern, and then it might trigger ther assertion checking there, so we could trun it into a early exit check. gcc/ChangeLog: PR target/95683 * config/riscv/riscv.c (riscv_gpr_save_op

[PATCH] RISC-V: Fix compilation failed for frflags builtin in C++ mode

2020-06-19 Thread Kito Cheng
- g++ will complain too few arguments for frflags builtin like bellow message: error: too few arguments to function 'unsigned int __builtin_riscv_frflags(void)' - However it's no arguments needed, it because we declare the function type with VOID arguments, that seems like requir

[PATCH] RISC-V: Normalize arch string in driver time

2020-06-19 Thread Kito Cheng
- Normalize arch string would help the multi-lib handling, e.g. rv64gc and rv64g_c are both valid and same arch, but latter one would confuse the detection of multi-lib, earlier normalize can resolve this issue. gcc/ChangeLog: * config/riscv/riscv.h (DRIVER_SELF_SPECS): New. --- g

Re: [PATCH] RISC-V: Normalize arch string in driver time

2020-06-21 Thread Kito Cheng
t. On Sun, Jun 21, 2020 at 5:37 AM Jim Wilson wrote: > > On Fri, Jun 19, 2020 at 2:53 AM Kito Cheng wrote: > > * config/riscv/riscv.h (DRIVER_SELF_SPECS): New. > > This looks good to me. This has the side effect that we are now > passing -march twice to cc1 and as,

[PATCH] RISC-V: Preserve arch version info during normalizing arch string

2020-06-29 Thread Kito Cheng
- Arch version should preserved if user explicitly specified the version. e.g. After normalize, -march=rv32if3d should be -march=rv32i_f3p0d instead of-march=rv32ifd. gcc/ChangeLog: * common/config/riscv/riscv-common.c(riscv_subset_t): New field added. (riscv_sub

[PATCH] RISC-V: Handle multi-letter extension for multilib-generator

2020-06-29 Thread Kito Cheng
- The order of multi-lib config could be wrong if multi-ltter are used, e.g. `./multilib-generator rv32izfh-ilp32--c`, would expect rv32ic_zfh/ilp32 reuse rv32izfh/ilp32, however the multi-ltter is not handled correctly, it will generate reuse rule for rv32izfhc/ilp32 which is invalid

Re: [PATCH] RISC-V: Preserve arch version info during normalizing arch string

2020-06-30 Thread Kito Cheng
Hi Jim: > This isn't a criticism of your patch, but I noticed while looking at > this that we accept gXpY and expand to iXpY_mXpY_ etc. However, imafd > are all numbered independently. It doesn't make much sense to specify > a version with g and assume it is correct for all of imafd. Similarly

Re: [PATCH] RISC-V: Preserve arch version info during normalizing arch string

2020-06-30 Thread Kito Cheng
Committed with coding style fixing. On Wed, Jul 1, 2020 at 11:16 AM Kito Cheng wrote: > > Hi Jim: > > > This isn't a criticism of your patch, but I noticed while looking at > > this that we accept gXpY and expand to iXpY_mXpY_ etc. However, imafd > > are all num

[PATCH v2] RISC-V: Handle multi-letter extension for multilib-generator

2020-07-01 Thread Kito Cheng
- The order of multi-lib config could be wrong if multi-ltter are used, e.g. `./multilib-generator rv32izfh-ilp32--c`, would expect rv32ic_zfh/ilp32 reuse rv32i_zfh/ilp32, however the multi-ltter is not handled correctly, it will generate reuse rule for rv32izfhc/ilp32 which is invalid

Re: [PATCH v2] RISC-V: Handle multi-letter extension for multilib-generator

2020-07-01 Thread Kito Cheng
Hi Jim: Committed, thanks. On Thu, Jul 2, 2020 at 7:28 AM Jim Wilson wrote: > > On Wed, Jul 1, 2020 at 12:13 AM Kito Cheng wrote: > > * config/riscv/multilib-generator (arch_canonicalize): Handle > > multi-letter extension. > > Using underl

Re: [PATCH] RISC-V: Preserve arch version info during normalizing arch string

2020-07-01 Thread Kito Cheng
Hi Jim: > I think it is reasonable to start a discussion in riscv-isa-manual, to > try to get an official answer for what is valid and how to interpret > it, instead of just making up our own rules. Agree, issue[1] created on riscv-isa-manual. [1] https://github.com/riscv/riscv-isa-manual/issues/

Re: RISC-V: Support version controling for ISA standard extensions

2020-11-17 Thread Kito Cheng
Patch set committed :) On Wed, Nov 18, 2020 at 1:43 PM Kito Cheng wrote: > >> Current GCC implementation is RISC-V ISA 2.2, this patch set implement > v20190608 and v20191213, and also add option > -misa-spec=[2.2|20190608|20191213] to change the default ISA spec version. > &g

[PATCH] RISC-V: Always define MULTILIB_DEFAULTS

2020-11-20 Thread Kito Cheng
- Define MULTILIB_DEFAULTS can reduce the total number of multilib if the default arch and ABI are listed in the multilib config. - This also simplify the implementation of --with-multilib-list. gcc/ChangeLog: * config.gcc (riscv*-*-*): Add TARGET_RISCV_DEFAULT_ABI and TARGE

[PATCH] Fix print_multilib_info when default arguments appear in the option list with '!'

2020-11-26 Thread Kito Cheng
This issue is found when we try to always define MULTILIB_DEFAULTS for -march and -mabi for RISC-V back-end, however `-print-multi-lib` will skip multi-lib setting if match any one of flag in MULTILIB_DEFAULTS, even some options are specified in the option list with '!'. e.g. We have default marc

[committed] RISC-V: Drop some commited accidentally code.

2020-11-30 Thread Kito Cheng
gcc/ChangeLog: * config.gcc (riscv*-*-*): Drop some commited accidentally code. --- gcc/config.gcc | 1 - 1 file changed, 1 deletion(-) diff --git a/gcc/config.gcc b/gcc/config.gcc index c348596b1ac..4808b698f3a 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -4615,7 +4615,6 @@ case

[PATCH] RISC-V: Canonicalize --with-arch

2020-12-01 Thread Kito Cheng
- We would like to canonicalize the arch string for --with-arch for easier handling multilib, so split canonicalization part to a stand along script to shared the logic. gcc/ChangeLog: * config/riscv/multilib-generator (arch_canonicalize): Move code to arch-canonicalize, an

[PATCH 1/2] Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result.

2020-12-01 Thread Kito Cheng
-lib reuse rule. So I think it would be great to have a target specific way to determine the multi-lib re-use rule, then we could write those rule in C, instead of expand every possible case in MULTILIB_REUSE. * Here is an example for RISC-V multi-lib rules: https://gist.github.com/

[PATCH 2/2] RISC-V: Implement TARGET_COMPUTE_MULTILIB

2020-12-01 Thread Kito Cheng
Use TARGET_COMPUTE_MULTILIB to search the multi-lib reuse for riscv*-*-elf*, according following rules: 1. Check ABI is same. 2. Check both has atomic extension or both don't have atomic extension. - Because mix soft and hard atomic operation doesn't make sense and won't work as expect

Re: [PATCH 1/2] Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result.

2020-12-01 Thread Kito Cheng
Hi Jeff: Defer to gcc-12 is OK to me, we could hold this on downstream :) On Wed, Dec 2, 2020 at 1:27 PM Jeff Law wrote: > > > On 12/1/20 2:29 AM, Kito Cheng wrote: > > Create a new hook to let target could override the multi-lib result, > > the motivation is RISC-V might

[PATCH] PR target/98152: Checking python is available before using

2020-12-05 Thread Kito Cheng
We'll try to canonicalize the arch string for --with-arch, and the script is written in python, however it will turns out GCC require python to build for RISC-V port, it's not expect as the GCC requirement. So this patch is made this as optional, detect python and only use it when it available, it

Re: [PATCH] PR target/96307: Fix KASAN option checking.

2020-10-13 Thread Kito Cheng
ping On Mon, Oct 5, 2020 at 5:49 PM Kito Cheng wrote: > - Disable kasan if target is unsupported and -fasan-shadow-offset= is not >given, no matter `--param asan-stack=1` is given or not. > > - Moving KASAN option checking testcase to gcc.dg, those testcase could be >

Re: [PATCH v2] PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return values.

2020-10-13 Thread Kito Cheng
ping^2 Hi Eric: Do you mind having a review for that? thanks :) On Mon, Oct 5, 2020 at 5:24 PM Kito Cheng wrote: > ping. > > > On Fri, Sep 25, 2020 at 2:33 PM Richard Biener wrote: > >> On Fri, 25 Sep 2020, Kito Cheng wrote: >> >> > In g:70cdb21e579191fe9

[PATCH] RISC-V: Add support for -mcpu option.

2020-10-13 Thread Kito Cheng
- The behavior of -mcpu basically equal to -march plus -mtune, but it has lower priority than -march and -mtune. - The behavior and available options has sync with clang except we don't add few LLVM specific value, and add more sifive processor to the list. - -mtune also accept all avail

Re: [PATCH] PR target/96307: Fix KASAN option checking.

2020-10-16 Thread Kito Cheng
Hi Martin: I think it is still useful for other targets which are not supporting libsanitizer yet, so in this patch I also moved related testcases from gcc.target to gcc.dg. On Fri, Oct 16, 2020 at 3:34 PM Martin Liška wrote: > Hello. > > I'm expecting a support for libsanitizer for RISC-V happ

[committed] RISC-V: Handle implied extension in multilib-generator

2020-10-16 Thread Kito Cheng
- -march has handle implied extension for a while, so I think multilib-generator should handle this well too. - Currently only add rule for D imply F. gcc/ChangeLog: * config/riscv/multilib-generator (IMPLIED_EXT): New. (arch_canonicalize): Update comment and handle implied

[PATCH] RISC-V: Add configure option: --with-multilib-config to flexible config multi-lib settings.

2020-10-16 Thread Kito Cheng
- Able to configure complex multi-lib rule in configure time, without modify any in-tree source. - I was consider to implmenet this into `--with-multilib-list` option, but I am not sure who will using that with riscv*-*-elf*, so I decide to using another option name for that. - --with

[PATCH] RISC-V: Extend syntax for the multilib-generator

2020-10-16 Thread Kito Cheng
- Support expansion operator (*) in the multilib config string. - Motivation of this patch is reduce the complexity when we deal multilib with sub-extension, expand the combinations by hand would be very painful and error prone, no one deserve to experience this[1] again! [1] https://git

[PATCH v2] RISC-V: Add configure option: --with-multilib-config to flexible config multi-lib settings.

2020-10-19 Thread Kito Cheng
- Able to configure complex multi-lib rule in configure time, without modify any in-tree source. - I was consider to implmenet this into `--with-multilib-list` option, but I am not sure who will using that with riscv*-*-elf*, so I decide to using another option name for that. - --with

Re: [PATCH v2] PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return values.

2020-10-22 Thread Kito Cheng
Thanks, committed to gcc-10 branch :) On Thu, Oct 22, 2020 at 3:58 PM Richard Biener wrote: > On Thu, 22 Oct 2020, Kito Cheng wrote: > > > OK for gcc-10 branch? > > > > This patch was committed into trunk for 1 week and seems stable. > > Yes. > > > On W

[committed] RISC-V: Refine riscv_parse_arch_string

2020-10-27 Thread Kito Cheng
- Generalize logic for translating arch to internal flags, this patch is infrastructure for supporing sub-extension parsing. gcc/ChangeLog * common/config/riscv/riscv-common.c (opt_var_ref_t): New. (riscv_ext_flag_table_t): New. (riscv_ext_flag_table): New. (ri

[PATCH] RISC-V: Fix RVV related testsuite

2022-11-05 Thread Kito Cheng
Use wrapper of riscv_vector.h for RVV related testcases, more detail see https://gcc.gnu.org/pipermail/gcc-patches/2022-October/603140.html gcc/testsuite/ChangeLog: * gcc/testsuite/gcc.target/riscv/rvv/base/mov-1.c: Use double quotes to include riscv_vector.h rather than angle br

Re: [PATCH 7/7] riscv: Add support for str(n)cmp inline expansion

2022-11-14 Thread Kito Cheng
On Tue, Nov 15, 2022 at 8:53 AM Palmer Dabbelt wrote: > > On Mon, 14 Nov 2022 16:46:37 PST (-0800), Kito Cheng wrote: > > Hi Christoph: > > > >> This patch implements expansions for the cmpstrsi and the cmpstrnsi > >> builtins using Zbb instructions (if av

Re: Re: [PATCH] RISC-V: Optimal RVV epilogue logic.

2022-11-14 Thread Kito Cheng
nstruction. > Let's see whether Kito aggree with that. > -- > juzhe.zh...@rivai.ai > > > *From:* jiawei > *Date:* 2022-11-15 10:37 > *To:* Kito Cheng > *CC:* gcc-patches ; kito.cheng > ; palmer ; juzhe.zhong > ; christoph.muellner ; >

[committed] RISC-V: Use get_typenode_from_name to get fixed-width integer type nodes

2023-01-26 Thread Kito Cheng
[u]int32_t are using different type between glibc and newlib, so getting those node by int or long type isn't portable way, I also update all other fixed-width integer types to prevent this happened again in future :P gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (register_builti

[committed] RISC-V: Simplify testcase condition for RVV tests [NFC]

2023-01-30 Thread Kito Cheng
We got some trouble on some platform, it show get twice for the asm, but it only show once, seems like our pattern might be too complicated, so simplify that make every platform happey with those testcase. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c: Refine the s

Re: [PATCH] RISC-V: Fix bug of TARGET_COMPUTE_MULTILIB implemented in riscv.

2023-02-02 Thread Kito Cheng
Good catch! thanks for fixing that, committed to trunk :) On Thu, Feb 2, 2023 at 7:46 PM Jin Ma wrote: > > MAX_MATCH_SCORE is not assigned anywhere except initialized to 0, > causing BEST_MATCH_MULTI_LIB to always be 0 or -1, which will > cause the result of TARGET_COMPUTE_MULTILIB hook to fail.

Re: [PATCH v5] [RISCV] Add 'Zfa' extension according to riscv-isa-manual

2023-02-02 Thread Kito Cheng
ack, just let you know reviewing this patch is on my todo list :) My first impression is...you need to write something in your changelog, it seems like generated by contrib/git-commit-mklog.py without any modification. On Thu, Feb 2, 2023 at 1:46 PM Jin Ma wrote: > > This patch adds the 'Zfa' ex

[PATCH] testsuite/102690: Only check warning for lp64 in Warray-bounds-16.C

2022-06-28 Thread Kito Cheng
That warning won't happen on ilp32 targets, seems like Andrew Pinski already mention that[1] before. Verified on riscv32-unknown-elf and riscv64-unknown-elf. [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92879#c1 gcc/testsuite/ChangeLog: PR testsuite/102690 * g++.dg/warn/Warr

Re: [PATCH] testsuite/102690: Only check warning for lp64 in Warray-bounds-16.C

2022-06-29 Thread Kito Cheng
Committed to trunk, thanks :) Is it OK for gcc-11 and gcc-12 branches? On Wed, Jun 29, 2022 at 5:00 PM Richard Biener wrote: > > On Tue, 28 Jun 2022, Kito Cheng wrote: > > > That warning won't happen on ilp32 targets, seems like Andrew Pinski > > already mention that[1

[committed] PR target/99702: Check RTL type before get value

2021-03-22 Thread Kito Cheng
gcc/ChangeLog: PR target/99702 * config/riscv/riscv.c (riscv_expand_block_move): Get RTL value after type checking. gcc/testsuite/ChangeLog: PR target/99702 * gcc.target/riscv/pr99702.c: New. --- gcc/config/riscv/riscv.c | 2 +- gcc/testsu

[wwwdoc] gcc-11/changes: Document RISC-V changes

2021-03-23 Thread Kito Cheng
--- htdocs/gcc-11/changes.html | 32 +++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/htdocs/gcc-11/changes.html b/htdocs/gcc-11/changes.html index 69869309..ec136349 100644 --- a/htdocs/gcc-11/changes.html +++ b/htdocs/gcc-11/changes.html @@ -688,7 +6

Re: [committed] wwwdocs: gcc-11/changes.html: Editorial changes for RISC-V

2021-06-14 Thread Kito Cheng
Hi Gerald: Thanks your patch, my grammar is really...weak :p Hi Bernhard: >> + Add new option -misa-spec=* to control ISA spec version. >> + This controls the default version of each extensions. >> + It defaults to 2.2. > Is "each extensions" in plural really correct gramatically? > "

[committed] testuite: Add pthread check to dg-module-cmi for omp module testing

2021-06-22 Thread Kito Cheng
gcc/testsuite: * g++.dg/modules/omp-1_a.C: Check pthread is available for dg-module-cmi. * g++.dg/modules/omp-2_a.C: Ditto. --- gcc/testsuite/g++.dg/modules/omp-1_a.C | 2 +- gcc/testsuite/g++.dg/modules/omp-2_a.C | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) d

[PATCH] docs: Add 'S' to Machine Constraints for RISC-V

2021-07-01 Thread Kito Cheng
It was undocument before, but already used in linux kernel, so LLVM community suggest we should document that, so that make it become supported/documented/non-internal machine constraints. gcc/ChangeLog: PR target/101275 * doc/md.text (Machine Constraints): Document the 'S' constr

Re: [patches] Re: [PATCH] RISC-V: Implement __umulsidi3, umul_ppmm and __muluw3

2017-11-19 Thread Kito Cheng
>> 2017-11-17 Kito Cheng >> >> * longlong.h [__riscv] (__umulsidi3): Define. >> [__riscv] (umul_ppmm) Likewise. >> [__riscv] (__muluw3) Likewise. > > > Apparently the point of this is that by defining __mulsi3/__muldi3 as an

[PATCH] RISC-V: Support for FreeBSD

2018-01-28 Thread Kito Cheng
Hi all: This patch enable RISC-V support FreeBSD, Ruslan (RISC-V FreeBSD maintainer) and me has been tested on FreeBSD 12 for building kernel and whole user space programs/libraries. gcc/ChangeLog 2018-01-29 Ruslan Bukin Kito Cheng * config.gcc (riscv

Re: [patches] Re: [PATCH] RISC-V: Support for FreeBSD

2018-01-29 Thread Kito Cheng
les that weren't included in the > patch. Oh, okay, I guess it's something port from older freebsd riscv-gcc, I should update that, thanks. On Tue, Jan 30, 2018 at 4:28 AM, Jim Wilson wrote: > On 01/28/2018 07:26 PM, Kito Cheng wrote: >> >> gcc/ChangeLo

[PATCH v2] RISC-V: Support for FreeBSD

2018-02-17 Thread Kito Cheng
hat to ass...@gnu.org again. gcc/ChangeLog 2018-01-29 Ruslan Bukin Kito Cheng * config.gcc (riscv*-*-freebsd*): New. * config/riscv/freebsd.h: New. libgcc/ChangeLog 2018-01-29 Ruslan Bukin * libgcc/config.host: Support RISC-V FreeBSD. [1] V1 pa

Re: [PATCH v2] RISC-V: Support for FreeBSD

2018-02-21 Thread Kito Cheng
Hi Jim: > I saw the email. I checked the FSF copyright list and see that it > hasn't been recorded yet. The FSF copyright clerk sometimes takes a > few weeks to respond. Hopefully this will be competed on the FSF side > soon. I don't family with copyright matters, so we can't commit this patch

Re: [PATCH v2] RISC-V: Support for FreeBSD

2018-04-05 Thread Kito Cheng
Hi Jim: Theodore Teah sent an mail say "Your assignment/disclaimer process with the FSF is currently complete.". Could you help us to commit that? Thanks :) On Fri, Feb 23, 2018 at 2:33 AM, Jim Wilson wrote: > On Wed, Feb 21, 2018 at 10:34 PM, Kito Cheng wrote: >>

[PATCH] RISC-V: Fix unordered float compare for Signaling NaN.

2018-10-02 Thread Kito Cheng
hiang Kito Cheng gcc/ * config/riscv/riscv.md (f_quiet4): Handle signaling NaN correctly. testsuite/gcc.target/riscv/fcompare_snan.c: New file. --- gcc/config/riscv/riscv.md | 41 - .../gcc.target/riscv/fcompare_snan.c | 45 +

Re: [PATCH] RISC-V: Fix unordered float compare for Signaling NaN.

2018-10-02 Thread Kito Cheng
M Jim Wilson wrote: > > On Tue, Oct 2, 2018 at 7:23 PM Kito Cheng wrote: > > This patch is fixing the wrong behavior for unordered float compare > > for Signaling NaN, current implementation will suppress the FP > > exception flags unconditionally, however signaling NaN s

[PATCH] RISC-V: Pass --no-relax to linker if -mno-relax is present.

2018-04-18 Thread Kito Cheng
Hi all: Palmer has been added -mno-relax option before, I propose it should also pass to linker during link phase. ChangeLog: 2018-04-18 Kito Cheng * config/riscv/elf.h (LINK_SPEC): Pass --no-relax if -mno-relax is present. * config/riscv/linux.h (LINK_SPEC): Ditto. From

[PATCH] RISC-V: Make sure stack is always aligned during adjusting

2018-04-18 Thread Kito Cheng
hange-6.c -O2 -ffast-math -floop-nest-opt imize -o - -S ... .type main, @function main: li t1,-81920 addisp,sp,-36 # <-- stack not aligned here! ... gcc/ChangeLog: 2018-04-18 Kito Cheng * config/riscv/riscv.c (riscv_first_stack_step): Roun

Re: [patches] Re: [PATCH] RISC-V: Pass --no-relax to linker if -mno-relax is present.

2018-04-18 Thread Kito Cheng
ion in the latest release yet? On Thu, Apr 19, 2018 at 8:51 AM, Jim Wilson wrote: > On Wed, Apr 18, 2018 at 3:10 AM, Kito Cheng wrote: >> * config/riscv/elf.h (LINK_SPEC): Pass --no-relax if >> -mno-relax is present. >> * config/riscv/linux.h (LINK_SPEC): Ditt

[PATCH v2] RISC-V: Make sure stack is always aligned during adjusting

2018-04-19 Thread Kito Cheng
It's v2 patch for fixing stack align for rv32*c target. gcc/ChangeLog: 2018-04-18 Kito Cheng * config/riscv/riscv.c (riscv_first_stack_step): Round up min step to make sure stack always aligned. v1: https://gcc.gnu.org/ml/gcc-patches/2018-04/msg00877.html

[PATCH] Remove CALLER_SAVE_PROFITABLE since nobody use it now

2014-08-18 Thread Kito Cheng
Hi all: This patch clean up CALLER_SAVE_PROFITABLE marco include doc since seem nobody use it. Bootstrap and regression testing running on x86_64-unknown-linux-gnu :) ChangLog 2014-08-18 Kito Cheng * doc/tm.texi.in (CALLER_SAVE_PROFITABLE): Remove. * gcc/doc/tm.texi

[PATCH] Fix comment typo in ira.c

2014-08-18 Thread Kito Cheng
Hi Vladimir: Here is a tiny typo in comment, allono -> allocno. ChangLog 2014-08-18 Kito Cheng * ira.c: Fix typo in comment.

Re: [PATCH] Fix comment typo in ira.c

2014-08-18 Thread Kito Cheng
Oops, I forgot to attach patch in the previous mail. On Mon, Aug 18, 2014 at 10:51 PM, Kito Cheng wrote: > Hi Vladimir: > > Here is a tiny typo in comment, allono -> allocno. > > ChangLog > 2014-08-18 Kito Cheng > > * ira.c

Re: [PATCH] Remove CALLER_SAVE_PROFITABLE since nobody use it now

2014-08-19 Thread Kito Cheng
but there's no point at all > in keeping the macro until then. (It should of course be poisoned in > system.h when removing it, as standard when removing target macros.) Thanks, I add poison for CALLER_SAVE_PROFITABLE to system.h, updated patch attached. thanks for your review :)

[PATCH] Steam out non-explicit -fno-tree-loop-distribute-patterns for LTO options

2014-08-27 Thread Kito Cheng
Hi all: This patch basically is extension for r210100[1], stream out non-explicit -fno-tree-loop-distribute-patterns since compile with `-flto -O3 -fno-builtin` still may gen builtin function call during LTO phase. LTO bootstrapped and tested on x86_64-unknown-linux-gnu. 2014-09-27 Kito Cheng

[PATCH] Don't init ira_spilled_reg_stack_slots in ira if using lra.

2014-08-27 Thread Kito Cheng
Hi all: This patch is clean up useless initialize for IRA with LRA. 2014-08-27 Kito Cheng * ira.c (ira): Don't initialize ira_spilled_reg_stack_slots and ira_spilled_reg_stack_slots_num if using lra. (do_reload): Remove release ira_spilled_reg_stack_slots

Re: [PATCH] Steam out non-explicit -fno-tree-loop-distribute-patterns for LTO options

2014-08-28 Thread Kito Cheng
-builtin to common group (CL_COMMON) (preserve in lto since it's in CL_COMMON) and check it in tree-loop-distribution.c for temporary workaround . [1] gcc/c-family/c-common.c:disable_builtin_function On Thu, Aug 28, 2014 at 4:45 PM, Richard Biener wrote: > On Wed, Aug 27, 2014 at 4:42 PM, Ki

[PATCH] Move -fbuiltin from c.opt to common.opt and change it to common group

2014-08-28 Thread Kito Cheng
Hi all: -fno-builtin is seem not only for the c family front-end, but also used in LTO now, so move it to common.opt and change it to `Common`. From 47552b58a09ac9d944be1c35bb5c938f4cb8ec0f Mon Sep 17 00:00:00 2001 From: Kito Cheng Date: Thu, 14 Aug 2014 11:34:26 +0800 Subject: [PATCH 1/2] Move

[PATCH] For -fno-builtin disable pattern recognition if not enabled explicitly in lto.

2014-08-28 Thread Kito Cheng
-08/msg02483.html [2] https://gcc.gnu.org/ml/gcc-patches/2014-08/msg02555.html From 80922e53ff41b1c08322a0d0ae5b6d947cb39353 Mon Sep 17 00:00:00 2001 From: Kito Cheng Date: Thu, 28 Aug 2014 18:06:48 +0800 Subject: [PATCH 2/2] For -fno-builtin disable pattern recognition if not enabled explicitly

Re: [PATCH] Steam out non-explicit -fno-tree-loop-distribute-patterns for LTO options

2014-08-28 Thread Kito Cheng
wrote: > On Thu, 28 Aug 2014, Kito Cheng wrote: > >> Hi Richard: >> >> I think preserve -fno-builtin is better than >> -fno-tree-loop-distribute-patterns too, >> >> However if we preserve -fno-builtin, the coming problem is should we >> preserve all

Re: [PATCH] Move -fbuiltin from c.opt to common.opt and change it to common group

2014-08-28 Thread Kito Cheng
Hi Richard: >> -fno-builtin is seem not only for the c family front-end, but also >> used in LTO now, so move it to common.opt and change it to `Common`. > > Please leave it in c-family and just add LTO to the set of supported > languages. -fno-builtin isn't meaningful for other frontends > and w

Re: [PATCH] Move -fbuiltin from c.opt to common.opt and change it to common group

2014-08-29 Thread Kito Cheng
Hi Richard: >> >> -fno-builtin is seem not only for the c family front-end, but also >> >> used in LTO now, so move it to common.opt and change it to `Common`. >> > >> > Please leave it in c-family and just add LTO to the set of supported >> > languages. -fno-builtin isn't meaningful for other fr

[PATCH] Add header guard to several header files.

2014-08-31 Thread Kito Cheng
Hi all: This patch is add header guard to several header files :) From 1647c5d3ee3a7e086f57863b2503d11c1a699f00 Mon Sep 17 00:00:00 2001 From: Kito Cheng Date: Fri, 22 Aug 2014 17:34:49 +0800 Subject: [PATCH] Add header guard to several header files. 2014-09-01 Kito Cheng except.h: Fix

Re: [PATCH] Add header guard to several header files.

2014-08-31 Thread Kito Cheng
Oops, ChangeLog here: ChangeLog 2014-09-01 Kito Cheng except.h: Fix header guard. addresses.h: Add missing header guard. cfghooks.h: Likewise. collect-utils.h: Likewise. collect2-aix.h: Likewise. conditions.h: Likewise. cselib.h: Likewise. dwarf2asm.h: Likewise

[PATCH] Add missing size directive for arm-*-elf

2014-08-31 Thread Kito Cheng
ufbuf.4078 ld .comment .comment ld .ARM.attributes .ARM.attributes g F .text 0018 foo ChangeLog 2014-09-01 Kito Cheng * config/arm/unknown-elf.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Add size direc

Re: [PATCH] Add header guard to several header files.

2014-09-01 Thread Kito Cheng
Hi Joseph: Thanks for your review, I've reverted the part of gsyslimits.h, here is updated patch and ChangeLog :) bootstrap ok for x86_64 2014-09-01 Kito Cheng except.h: Fix header guard. addresses.h: Add missing header guard. cfghooks.h: Likewise. collect-utils.h: Lik

Re: [PATCH] Don't init ira_spilled_reg_stack_slots in ira if using lra.

2014-09-03 Thread Kito Cheng
ping! On Wed, Aug 27, 2014 at 10:49 PM, Kito Cheng wrote: > Hi all: > > This patch is clean up useless initialize for IRA with LRA. > > 2014-08-27 Kito Cheng > > * ira.c (ira): Don't initialize ira_spilled_reg_stack_slots and > ira_spilled_reg

Re: [PATCH] Add header guard to several header files.

2014-09-08 Thread Kito Cheng
ping! On Tue, Sep 2, 2014 at 12:37 AM, Kito Cheng wrote: > Hi Joseph: > > Thanks for your review, I've reverted the part of gsyslimits.h, > here is updated patch and ChangeLog :) > > bootstrap ok for x86_64 > > 2014-09-01 Kito Cheng > > except.h: Fix h

Re: [PATCH] Add missing size directive for arm-*-elf

2014-09-08 Thread Kito Cheng
ping! On Mon, Sep 1, 2014 at 11:30 AM, Kito Cheng wrote: > Hi all: > > In arm-*-elf target some variable will missing size directive, > > for example: > > foo.c: > > void foo (void) { > static char bufbuf[8]; > } > > $ arm-none-eabi-gcc ./foo.c -

[PATCH] Fix typo in comment for IRA

2014-10-13 Thread Kito Cheng
Hi all: This patch contain lots typo fix for IRA module by aspell :) ChangeLog 2014-10-13 Kito Cheng * ira.c: Fix typo in comment. * ira.h: Ditto. * ira-build.c: Ditto. * ira-color.c: Ditto. * ira-emit.c: Ditto. * ira-int.h: Ditto

Re: [PATCH] Fix typo in comment for IRA

2014-10-13 Thread Kito Cheng
you help me to commit it? thanks. From e00ad515d77fd491266b743548f3c0705731fb71 Mon Sep 17 00:00:00 2001 From: Kito Cheng Date: Fri, 22 Aug 2014 16:27:18 +0800 Subject: [PATCH] Fix typo in comment for IRA 2014-10-14 Kito Cheng * ira.c: Fix typo in comment. * ira.h: Ditto. * ira-build.c: Dit

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