On 12.12.2016 17:54, Segher Boessenkool wrote:
On Mon, Dec 12, 2016 at 05:46:02PM +0100, Dominik Vogt wrote:
Patch with these changes and a fix because of not handling
VOIDmode attached. Bootstrapped and regression tested on s390 and
s390x.
Okay for trunk.
When did you see VOIDmode, btw? It
http://gcc.gnu.org/r243854
Applied this patch as obvious. It adds some additional salt for
targets with reduced resources like require size32plus.
Johann
gcc/testsuite/
PR testsuite/52641
* gcc.dg/builtin-object-size-16.c (ia0, ia1, ia9): Handle case
where neither short
On 21.12.2016 15:42, Dominik Vogt wrote:
On Wed, Dec 21, 2016 at 01:58:18PM +0100, Georg-Johann Lay wrote:
On 12.12.2016 17:54, Segher Boessenkool wrote:
On Mon, Dec 12, 2016 at 05:46:02PM +0100, Dominik Vogt wrote:
Patch with these changes and a fix because of not handling
VOIDmode attached
On 21.12.2016 18:46, Segher Boessenkool wrote:
On Wed, Dec 21, 2016 at 01:58:18PM +0100, Georg-Johann Lay wrote:
$ avr-gcc
/gnu/gcc.gnu.org/trunk/gcc/testsuite/gcc.c-torture/compile/pr26833.c -S
-O1 -mmcu=avr4 -S -v
/gnu/gcc.gnu.org/trunk/gcc/testsuite/gcc.c-torture/compile/pr26833.c: In
http://gcc.gnu.org/r243885
Committed this addition of restrictions, mostly for 16-bit int or
16-bit size targtes.
Johann
gcc/testsuite/
PR testsuite/52641
* gcc.dg/pr35258.c (main) : Use an integer value that has
at least a size of 4.
* gcc.dg/Walloca-1.c (foo1)
On 22.12.2016 15:27, Dominik Vogt wrote:
On Thu, Dec 22, 2016 at 12:00:37PM +0100, Georg-Johann Lay wrote:
On 21.12.2016 18:46, Segher Boessenkool wrote:
On Wed, Dec 21, 2016 at 01:58:18PM +0100, Georg-Johann Lay wrote:
$ avr-gcc
/gnu/gcc.gnu.org/trunk/gcc/testsuite/gcc.c-torture/compile
On 22.12.2016 19:20, Richard Sandiford wrote:
Georg-Johann Lay writes:
One test case used unsigned long for the 3rd parameter of memset, which
should be size_t. This made the test crash for targets where correct
parameter passing depends on correct prototypes.
Fixed and committed as obvious
Segher Boessenkool schrieb:
On Thu, Dec 22, 2016 at 04:18:34PM +0100, Georg-Johann Lay wrote:
If you don't have instruction scheduling subregs of mem are allowed (and
are counted as registers). Combine asks recog, and it think this is
fine.
Why does reload use r31 here? Why does it
This fixes PR78883 which is a problem in reload revealed by a
change to combine.c. The fix is as proposed by Segher: implement
CANNOT_CHANGE_MODE_CLASS.
Ok for trunk?
Johann
gcc/
PR target/78883
* config/avr/avr.h (CANNOT_CHANGE_MODE_CLASS): New define.
* config/avr/av
On 02.01.2017 15:54, Dominik Vogt wrote:
On Mon, Jan 02, 2017 at 03:47:43PM +0100, Georg-Johann Lay wrote:
This fixes PR78883 which is a problem in reload revealed by a
change to combine.c. The fix is as proposed by Segher: implement
CANNOT_CHANGE_MODE_CLASS.
Ok for trunk?
Johann
gcc
On 03.01.2017 14:43, Richard Sandiford wrote:
Georg-Johann Lay writes:
On 02.01.2017 15:54, Dominik Vogt wrote:
On Mon, Jan 02, 2017 at 03:47:43PM +0100, Georg-Johann Lay wrote:
This fixes PR78883 which is a problem in reload revealed by a
change to combine.c. The fix is as proposed by
Richard Sandiford schrieb:
Segher Boessenkool writes:
On Wed, Jan 04, 2017 at 04:39:36PM +0100, Georg-Johann Lay wrote:
Well, if it can be done in the back-end, then that's generally my strong
preference. And the blocker for LRA is that it doesn't support cc0,
hence LRA will
Alexandre Oliva schrieb:
On Jan 4, 2017, Martin Sebor wrote:
The manual recommends to use a length modifier to constrain the length
of output to that of a narrower type:
sprintf (xname, "", ((unsigned short)((uintptr_t)(t) & 0x)));
This should work even without optimization.
It
On 04.01.2017 20:29, Jeff Law wrote:
On 01/04/2017 12:18 PM, Segher Boessenkool wrote:
On Wed, Jan 04, 2017 at 06:42:23PM +, Richard Sandiford wrote:
1. reload has a bug that no-one really wants to fix (understandable)
2. the bug is triggered by paradoxical subregs of mems
3. those subregs
Segher Boessenkool schrieb:
On Wed, Jan 04, 2017 at 12:29:49PM -0700, Jeff Law wrote:
We should split off a new "SUBREGS_OF_MEM_ALLOWED" from !INSN_SCHEDULING,
and then probably even default it to false.
That would work for me :-) The question in my mind would be unexpected
fallout at this poi
On 12.01.2017 10:00, Richard Sandiford wrote:
Georg-Johann Lay writes:
On 04.01.2017 20:29, Jeff Law wrote:
On 01/04/2017 12:18 PM, Segher Boessenkool wrote:
On Wed, Jan 04, 2017 at 06:42:23PM +, Richard Sandiford wrote:
1. reload has a bug that no-one really wants to fix
Richard Sandiford schrieb:
Georg-Johann Lay writes:
On 12.01.2017 10:00, Richard Sandiford wrote:
Georg-Johann Lay writes:
On 04.01.2017 20:29, Jeff Law wrote:
On 01/04/2017 12:18 PM, Segher Boessenkool wrote:
On Wed, Jan 04, 2017 at 06:42:23PM +, Richard Sandiford wrote:
1. reload
This is 3rd way to fix PR78883 by rejecting malicious expressions
from the start.
Ok for trunk?
Johann
gcc/
PR target/78883
* config/avr/avr.c (rtl-iter.h): Include it.
(TARGET_LEGITIMATE_COMBINED_INSN): New hook define...
(avr_legitimate_combined_insn): ...and i
This adds a penalty of 4 to the post-reload branch costs.
Purpose is reduce the number of out-of-line blocks like in
unsigned long variant5 (unsigned in)
{
unsigned long out = 0;
if (in & (1 << 0)) out |= 0xful << (4*0);
if (in & (1 << 1)) out |= 0xful << (4*1);
if (in & (1 << 2)
On 21.03.2017 13:07, Senthil Kumar Selvaraj wrote:
Hi,
The test assumes 32 bit ints, and expects a constant in the
dump that is only valid for 32 bit ints. This trivial patch
fixes that by explicitly specifying __UINT32_TYPE__ as the type.
Committed as obvious.
Regards
Senthil
gcc/testsuite/
On 21.03.2017 13:31, Georg-Johann Lay wrote:
On 21.03.2017 13:07, Senthil Kumar Selvaraj wrote:
Hi,
The test assumes 32 bit ints, and expects a constant in the
dump that is only valid for 32 bit ints. This trivial patch
fixes that by explicitly specifying __UINT32_TYPE__ as the type
Applied the patchlet below to fix a translation hiccup in the AVR backend.
Johann
PR target/79453
* config/avr/avr.c (intl.h): Include it.
(avr_pgm_check_var_decl) [reason]: Wrap diagnostic snippets into _().
Index: config/avr/avr.c
=
This PR is about an incorrect warning for variables in progmem
without initializer. If the variable is just an alias like in
and with -fmerge-all-constants
const __flash char string1[] = "same string";
const __flash char string2[] = "same string";
this will result in an incorrect
warning: unin
This patch adds an alternative to addhi3_zero_extend for the case
where output operand and the 8-bit addend happen to reside
the the same register. Without the patch this might lead
to additional reloads to satisfy the constraints like
uint16_t func (uint8_t x, uint16_t y)
{
return x + y;
}
https://gcc.gnu.org/ml/gcc-patches/2017-01/msg00926.html
On 13.01.2017 12:53, Georg-Johann Lay wrote:
This is 3rd way to fix PR78883 by rejecting malicious expressions
from the start.
Ok for trunk?
Johann
gcc/
PR target/78883
* config/avr/avr.c (rtl-iter.h): Include it
On 09.08.2016 15:43, kugan wrote:
Hi,
The test-case in PR72835 is failing with -O2 and passing with
-fno-tree-reassoc. It also passes with -O2 -fno-tree-vrp.
diff of .115t.dse2 and .116t.reassoc1 for the c++ testcase is as follows, which
looks OK.
+ unsigned int _16;
+ unsigned int _17;
+ u
This fixes the case of CC_NONE (insn attribute for cc is "none"):
Even in cases where the instructions of an insn do not change the condition
code of the machine, they still might change some registers by clobber, set,
etc. If one such register overlaps an expression stored in cc_status.value1
On 26.09.2016 15:19, Pitchumani Sivanupandi wrote:
Attached patch for PR71676 and PR71678.
PR71676 is for AVR target that generates wrong code when switch case index is
more than 16 bits.
Switch case index of larger than SImode are checked for out of range before
'casesi' expand. RTL expand of
Mentioning some AVR target specific improvements.
Ok?
Index: changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-7/changes.html,v
retrieving revision 1.15
diff -r1.15 changes.html
261c261,299
<
---
> AVR
>
> On the reduced Ti
This is a code clean-up using the new -passes.def feature in order to
register avr target passes and to get -fdump-xxx etc. to work for such passes.
Ok for trunk?
Johann
* config/avr/avr-passes.def: New file.
* config/avr/t-avr (PASSES_EXTRA): Add avr-passes.def.
* conf
https://gcc.gnu.org/r240925
https://gcc.gnu.org/r240926
https://gcc.gnu.org/r240927
gen-avr-mmcu-texi.c missed the inclusion of string.h (for strcmp). Applied as
obvious.
Johann
* config/avr/gen-avr-mmcu-texi.c (string.h): Include.
Index: config/avr/gen-avr-mmcu-texi.c
This patch introduces a new variable attribute "absdata".
Reduced Tiny cores have only a limited range of addresses 0x40..0xbf which can
be handled by LDS / STS directly. The attribute allows the user to assert that
it is legitimate to use absolute addressing for such addresses and that there
This is a no-op change that just adds comments how the various RTX flags will
appear in RTL dumps.
Ok for trunk?
Johann
* rtl.h (struct rtx_def): Comment how RTX_FLAGS will be
dumped in RTL dumps.
Index: rtl.h
===
On 10.10.2016 23:06, Jeff Law wrote:
So if we have an equality conditional between A & B, we record into our
const/copy tables A = B and B = A.
This helps us discover some of the more obscure equivalences. But it also
creates problems with an expression like
A ^ B
Where we might cprop the fi
On 13.10.2016 13:44, Pitchumani Sivanupandi wrote:
On Monday 26 September 2016 08:19 PM, Georg-Johann Lay wrote:
On 26.09.2016 15:19, Pitchumani Sivanupandi wrote:
Attached patch for PR71676 and PR71678.
PR71676 is for AVR target that generates wrong code when switch case index is
more than
On 17.10.2016 09:27, Pitchumani Sivanupandi wrote:
On Thursday 13 October 2016 08:42 PM, Georg-Johann Lay wrote:
On 13.10.2016 13:44, Pitchumani Sivanupandi wrote:
On Monday 26 September 2016 08:19 PM, Georg-Johann Lay wrote:
On 26.09.2016 15:19, Pitchumani Sivanupandi wrote:
Attached patch
This fixes issues with casesi that originate from taking hard coded subreg:HI
of the SImode switch value:
* The subreg is cutting away the upper bytes which is wrong code if the switch
actually operates on a value > 16 bits.
* The hard-coded subreg will ICE on DImode because of nested subregs
gen-pass-instances.awk is sensitive to the order in which directives are
written down, e.g. in target-pass.def: If a pass that runs first is added
first, then the last pass is skipped and not added to pass-instances.def.
Work around is to add the 2nd pass before adding the 1st pass...
http://g
There are targets that support taking values of labels but where any arithmetic
on such values might produce garbage.
This patch introduces new dg-require-effective-target label_offsets which is a
subset of label_values, and adjusts respective test cases to the more
restricted predicate.
Run
On 26.10.2016 18:51, Bernd Schmidt wrote:
On 10/26/2016 04:46 PM, Georg-Johann Lay wrote:
+if { [istarget avr-*-*] } {
+# If the value of a label does not fit into 16 bits, the linker
+# will generate a stub (containing a direct jump) and we end up
+# with the address of the
On 27.10.2016 12:49, Bernd Schmidt wrote:
On 10/27/2016 12:16 PM, Georg-Johann Lay wrote:
Now imagine some arithmetic like &&LAB2 - &&LAB1. This might result in
one or two stub addresses, and difference between such addresses is a
complete different thing than the differ
On 03.11.2016 08:58, Pitchumani Sivanupandi wrote:
Most of the AVR's 8k memorydevices have only rjmp instruction, not jmp. So, it
is important to wrap around jump destination to check if it can reach backwards.
Currently link specs passes --pmem-wrap-around=xxK when mrelax and
mpmem-wrap-around
On 28.10.2016 17:58, Mike Stump wrote:
On Oct 27, 2016, at 3:16 AM, Georg-Johann Lay wrote:
Now imagine some arithmetic like &&LAB2 - &&LAB1. This might result in
one or two stub addresses, and difference between such addresses is a
complete different thing than the differ
Senthil Kumar Selvaraj schrieb:
Senthil Kumar Selvaraj writes:
Hi,
This patch fixes a problem with fmerge-all-constants and the progmem
attribute - on trunk, the below testcase errors out with a section
conflict error.
When avr_asm_select_section renames .rodata.xyz section to
.prog
James Bowman schrieb:
The FT32 binutils use a bias to distinguish between RAM and flash
addresses.
This fix adds an ASM_OUTPUT_SYMBOL_REF() that unbiases references to
RAM symbols.
Only references to RAM objects have the bias applied. Flash objects
(that is, objects in ADDR SPACE 1) are not bia
This patch contains some unrelated tweaks
- Supplying no-ldregs variant for andqi3, iorqi3 where a const_int mask affects
only 1 bit
- Some patterns that match situations with zero_extend that can be performed
with less instructions / register pressure.
- comparing HI against -1
Ok for tru
On 12.07.2016 11:38, Richard Biener wrote:
The following patch does $subject which is requested in a comment in
PR50417 as this restriction defeats the purpose of having memcpy
as a portable and efficient way to circumvent strict-aliasing violations
(or even as a portable and efficient way to do
On 14.07.2016 05:55, Senthil Kumar Selvaraj wrote:
Georg-Johann Lay writes:
This patch contains some unrelated tweaks
[...]
- Some patterns that match situations with zero_extend that can be performed
with less instructions / register pressure.
From my (admittedly limited) attempts at
This adds a new hook that allows to emit better diagnostics if an address space
is used that's not available.
One solution would be no not register the address space with
c_register_addr_space but that gives ugly report like
error: expected '=', ',', ';', 'asm' or '__attribute__' before 'f321
This patch needs new hook TARGET_ADDR_SPACE_DIAGNOSE_USAGE:
https://gcc.gnu.org/ml/gcc-patches/2016-07/msg00839.html
This patch turns attribute progmem into a working feature for AVR_TINY cores.
It boils down to adding 0x4000 to all symbols with progmem: Flash memory can
be seen in the RAM add
On 18.07.2016 16:13, Bernd Schmidt wrote:
On 07/14/2016 05:11 PM, Georg-Johann Lay wrote:
The hook allows better diagnostics: The address spaces are registered
with c_register_addr_space and if the parser comes across an address
space it provides the hook with the needed information, in
This patch tries to improve the bloated code we are currently generating for
AVR_TINY. It's mostly about printing the memory loads and stores and more
usage of reg_unused_after to print shorter instruction sequences in some cases.
Ok for trunk?
I also played around with PLUS in legitimate_add
This adds some insns that set a destination bit expressed as zero_extract to a
source bit expressed as extract, right shift, and simple combinations thereof.
Purpose is smaller code and to avoid costly extracts or shifts. This applies
mostly to bitfields; for open-coded bit insertions the patt
On 18.07.2016 08:58, Denis Chertykov wrote:
2016-07-15 18:26 GMT+03:00 Georg-Johann Lay :
This patch needs new hook TARGET_ADDR_SPACE_DIAGNOSE_USAGE:
https://gcc.gnu.org/ml/gcc-patches/2016-07/msg00839.html
This patch turns attribute progmem into a working feature for AVR_TINY
cores.
It boils
This removes avr's TARGET_SECONDARY_RELOAD implementation which never worked as
expected...
Its intention was to provide an 8-bit scratch register for loads from
non-generic address-spaces as they might need to set RAMPZ to the needed flash
segment.
The avr BE uses avr_find_unused_d_reg for
On 26.07.2016 12:20, Pitchumani Sivanupandi wrote:
avr-gcc expected to find the device specs in the search paths specified. But
it doesn't work as expected when device specs in different place than the
installed location.
Example-1:
avr-gcc wrongly assumes the device specs will be in first ident
On 28.07.2016 13:50, Pitchumani Sivanupandi wrote:
On Tuesday 26 July 2016 06:00 PM, Georg-Johann Lay wrote:
On 26.07.2016 12:20, Pitchumani Sivanupandi wrote:
avr-gcc expected to find the device specs in the search paths specified. But
it doesn't work as expected when device spe
The issue with wrong-code bug PR71976 is that combine.c:get_last_value was
called for a hard register in a wider mode (DImode) than the stored value had
(QImode). The patch introduces a test of the mode precision and only returns
the recorded value if the according mode is not smaller than the
https://gcc.gnu.org/r238850
Applied this obvious change to __muldi3 which cleared zero_reg at the end of
the function. This is not needed because there was a call to __umulsidi3 which
already cleared zero_reg.
Johann
libgcc/
* config/avr/lib1funcs.S (__muldi3) [have MUL]: No need to
On 14.07.2016 08:36, Denis Chertykov wrote:
2016-07-13 14:12 GMT+03:00 Georg-Johann Lay :
This patch contains some unrelated tweaks
- Supplying no-ldregs variant for andqi3, iorqi3 where a const_int mask affects
only 1 bit
- Some patterns that match situations with zero_extend that can be
The length computation of "branch" flavour insn length attribute computed a
length one instruction too short, e.g. in the following test case:
#define N0(N) if (X++ < N) __builtin_avr_nop()
#define N1(N) N0(N);N0(N);N0(N);N0(N);N0(N);N0(N);N0(N);N0(N);N0(N);N0(N)
#define N2(N) N1(N);N1(N);N1(N)
This adds a new built-in function that inserts a requested number of NOPs into
the instruction stream. I found it useful when testing avr-gcc.
Ok to apply?
Johann
* doc/extend.texi (AVR Built-in Functions): Document
__builtin_avr_nops.
* config/avr/builtins.def (NOPS
Applied the simple fix for PR71151: Set JUMP_TABLES_IN_TEXT_SECTION to 1.
https://gcc.gnu.org/r238935
Johann
gcc/
Backport from 2016-06-16 trunk r237536.
2016-06-16 Senthil Kumar Selvaraj
PR target/71151
* config/avr/avr.c (avr_asm_init_sections): Remove set
Problem with -fcaller-saves is that there are situations where it triggers an
expensive frame just to store a variable around a function call even though
there are plenty of call-saved registers.
Example:
typedef __UINT8_TYPE__ uint8_t;
extern uint8_t uart0_getc (void);
void foo (uint8_t *bu
On 02.08.2016 06:50, Senthil Kumar Selvaraj wrote:
Denis Chertykov writes:
2016-08-01 15:17 GMT+03:00 Georg-Johann Lay :
Problem with -fcaller-saves is that there are situations where it triggers
an expensive frame just to store a variable around a function call even
though there are plenty
Mentioned PR is about composing 16-bit values out of 8-bit values which
due to integer promotions likes to work on 16-bit values.
The patch adds 3 combiner patterns to catch such situations and then
split after reload. Some more splitting is performed after reload for:
and, ior, xor of reg-r
http://gcc.gnu.org/r242909
This patch adds treatment of reg_unused_after for *(X+const) that only
restores X if X is known to be used.
Applied as obvious.
Johann
* config/avr/avr.c (out_movhi_r_mr) [REG_X + PLUS]: Only SBIW if
X is not unused after.
Index: config/avr/avr.c
This is a fix for a wrong warning from -Wlto-type-mismatch that reports
a type mismatch for two built-in functions.
The avr backend has several built-ins that have the same asm name
because their assembler implementation in libgcc is exactly the same.
The prototypes might differ, however.
Th
On 30.11.2016 07:27, Pitchumani Sivanupandi wrote:
On Tuesday 29 November 2016 10:06 PM, Denis Chertykov wrote:
2016-11-28 10:17 GMT+03:00 Pitchumani Sivanupandi
:
On Saturday 26 November 2016 12:11 AM, Denis Chertykov wrote:
I'm sorry for delay.
I have a problem with the patch:
(Stripping tr
The introduction of the flash_size field in avr_mcu_t rendered the
n_flash field redundant. This patch computes the value of n_flash as
needed from flash_size and cleans up n_flash.
Ok for trunk?
Johann
gcc/
* config/avr/avr-arch.h (avr_mcu_t) [n_flash]: Remove field.
* confi
http://gcc.gnu.org/r243104
Use more SYMBOL_REF_P instead of SYMBOL_REF == GET_CODE (...).
Committed as obvious.
Johann
gcc/
* config/avr/avr.c (avr_print_operand): Use SYMBOL_REF_P if possible.
(avr_handle_addr_attribute, avr_asm_output_aligned_decl_common)
(avr_asm_asm
Added target avr_tiny filter to 2 tests that are obviously intended to
run on AVR_TINY.
Applied as obvious.
Johann
gcc/testsuite/
* gcc.target/avr/tiny-memx.c: Only perform if target avr_tiny.
* gcc.target/avr/tiny-caller-save.c: Dito.
Index: gcc.target/avr/tiny-caller-save.c
This patch moves the compile tests that have a hard coded -mmcu=MCU in
their dg-options to a new folder.
The exp driver filters out -mmcu= from the command line options that are
provided by, say, board description files or --tool-opts.
This is needed because otherwise conflicting -mmcu= will
This adds to the documentation a hint how to set up a linker description
file that avoids progmem altogether any without the usual overhead of
locating read-only data in RAM. The proposed linker description file is
completely transparent to the compiler, and no start-up code has to be
adjusted
Committed rectifications for bunch of coding rule nits as obvious.
Johann
* config/avr/avr.c: Fix coding rule glitches.
Index: config/avr/avr.c
===
--- config/avr/avr.c (revision 243104)
+++ config/avr/avr.c (working copy)
@@ -388,7
On 01.12.2016 17:40, Mike Stump wrote:
On Dec 1, 2016, at 3:54 AM, Georg-Johann Lay wrote:
This patch moves the compile tests that have a hard coded -mmcu=MCU in their
dg-options to a new folder.
The exp driver filters out -mmcu= from the command line options that are
provided by, say
https://gcc.gnu.org/r243545
Applied this obvious tweak to trunk.
Johann
libgcc/
* config/avr/lib1funcs.S (__ashldi3): Use __tmp_reg__ to restore
R16 instead of push + pop.
(__ashrdi3, __lshrdi3): Same. And use __zero_reg__ for signs.
Index: config/avr/lib1funcs.S
=
Ping #1
As I explained below, the solution taken be arm (pruning output)
does not work here.
Johann
On 02.12.2016 11:21, Georg-Johann Lay wrote:
On 01.12.2016 17:40, Mike Stump wrote:
On Dec 1, 2016, at 3:54 AM, Georg-Johann Lay wrote:
This patch moves the compile tests that have a hard
https://gcc.gnu.org/r227034
https://gcc.gnu.org/r227035
If an address space is used that's beyond the flash of the current device
(number of 64 KiB segments as specified by -mn-flash=) a diagnostic complains
and prints the currently specified numbers of flash segments, i.e. 64 KiB
chunks, and
Anatoliy Sokolov schrieb:
Hi.
The fixed_reg_set contain all fixed and global registers. This patch
change code "fixed_regs[r] || global_regs[r]" with "TEST_HARD_REG_BIT
(fixed_reg_set, r)".
Even though technically a no-op change
TEST_HARD_REG_BIT (fixed_reg_set, r)
appears to be a test f
Senthil Kumar Selvaraj schrieb:
This (rather trivial) patch fixes PR65210. The ICE happens because code
wasn't handling io_low attribute where it is supposed to.
Hi Senthil, could you line out for what these new attributes are good
for? The Compiler just maps the argument to a compile-tim
On 04.11.2016 03:48, Mike Stump wrote:
On Nov 3, 2016, at 8:25 AM, Georg-Johann Lay wrote:
On 28.10.2016 17:58, Mike Stump wrote:
On Oct 27, 2016, at 3:16 AM, Georg-Johann Lay wrote:
Now imagine some arithmetic like &&LAB2 - &&LAB1. This might result in
one or two stu
On 04.11.2016 06:18, Senthil Kumar Selvaraj wrote:
Georg-Johann Lay writes:
State of matters is that Binutils support is missing, and if I understand you
correctly, dg-require is not appropriate to factor out availability of such
features?
I'll take a stab at adding the missing bin
This patch adds a new command line option -mabsdata which can be ised to set
attribute absdata for all data in static storage so it can be accessed by LDS
and STS instructions.
This is only useful for some reduced Tiny devices like ATtiny40.
For other reduced Tiny where all of SRAM fits LDS /
On 07.11.2016 13:54, Georg-Johann Lay wrote:
This patch adds a new command line option -mabsdata which can be ised to set
attribute absdata for all data in static storage so it can be accessed by LDS
and STS instructions.
This is only useful for some reduced Tiny devices like ATtiny40.
For
On 08.11.2016 08:08, Pitchumani Sivanupandi wrote:
I have updated patch to include the flash size as well. Took that info from
device headers (it was fed into crt's device information note section also).
The new option would render -mn-flash superfluous, but we should keep it for
backward compa
On 09.11.2016 10:14, Pitchumani Sivanupandi wrote:
On Tuesday 08 November 2016 02:57 PM, Georg-Johann Lay wrote:
On 08.11.2016 08:08, Pitchumani Sivanupandi wrote:
I have updated patch to include the flash size as well. Took that info from
device headers (it was fed into crt's d
This is a no-op code clean-up that makes more use of SUBREG_P and CONST_INT_P
if possible.
Applied as obvious.
Johann
* config/avr/avr.c (avr_print_operand_address): Use CONST_INT_P if
appropriate.
(ashlqi3_out, ashlsi3_out, ashrqi3_out, ashrhi3_out): Same.
(ash
Currently, Binutils still comes with an AVR_TINY linker description file
which puts .rodata into RAM so that LDS is applicable for reading such
objects.
However, as these devices come with a linearised address model, linker
descriptions which put .rodata into flash are much more reasonable.
T
Committed this change in order to reduce the FAILs for AVR_TINY from
~3000 to ~2000. Rationale is to turn FAILs because of "relocation
truncated to fit" to UNSUPPORTED.
Johann
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_tiny) [avr]:
Return 1 for AVR_TINY.
http://gcc.gnu.org/r242670
Committed as obvious code clean-up.
Johann
gcc/
* config/avr/avr.c (avr_popcount): Remove static function.
(avr_popcount_each_byte, avr_out_bitop): Use popcount_hwi instead.
Index: config/avr/avr.c
=
https://gcc.gnu.org/r242672
Committed this obvious code clean-up to avr.c and avr-c.c.
Johann
gcc/
* config/avr/avr-c.c (avr_register_target_pragmas): Use C++
for-loop declaration of loop variable.
(avr_register_target_pragmas, avr_cpu_cpp_builtins): Same.
* conf
This patch is a minor improvement of prologue length. It now allows
frame sizes of up to 11 to be allocated by RCALL + PUSH 0 sequences but
limits the number of RCALLs to 3.
The PR has some discussion on size vs. speed consideration w.r. to using
RCALL in prologues, and following that I picke
Committed as obvious because the test case is clearly about a vector of
4 * int.
Johann
gcc/testsuite/
* c-c++-common/builtin-shuffle-1.c (V): Use 4 * int in vector.
Index: c-c++-common/builtin-shuffle-1.c
===
--- c-c++-c
This adds requirements for 2 test cases:
loop-split.c needs 32-bit int at least. Use int32plus as I didn't
intend to change the very test case.
gcc.dg/stack-layout-dynamic-1.c aligns the stack to 16 bits so ptr32plus
seems reasonable.
Committed to trunk.
Johann
gcc/testsuite/
One test case used unsigned long for the 3rd parameter of memset, which
should be size_t. This made the test crash for targets where correct
parameter passing depends on correct prototypes.
Fixed and committed as obvious.
Johann
gcc/testsuite/
* gcc.c-torture/execute/pr30778.c (mems
, Pitchumani Sivanupandi wrote:
On Wednesday 09 November 2016 08:05 PM, Georg-Johann Lay wrote:
On 09.11.2016 10:14, Pitchumani Sivanupandi wrote:
On Tuesday 08 November 2016 02:57 PM, Georg-Johann Lay wrote:
On 08.11.2016 08:08, Pitchumani Sivanupandi wrote:
I have updated patch to include the
Hi, this causes an illegal code issue on avr.
Test case (reduced from gcc.dg/builtins-32.c):
extern int signbitf (float);
int test (float x)
{
return signbitf (x);
}
Before combine, the dump reads
(note 4 0 19 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(insn 19 4 3 2 (set (reg:QI 51 [ x+3 ])
(
Segher Boessenkool schrieb:
On Wed, Nov 23, 2016 at 04:58:22PM +0100, Georg-Johann Lay wrote:
Hi, this causes an illegal code issue on avr.
Sorry about that.
[ snip ]
Trying 19 -> 7:
Failed to match this instruction:
(set (reg:HI 45 [ x+3 ])
(zero_extend:HI (reg:QI 25 r25 [
On 24.11.2016 00:27, Segher Boessenkool wrote:
As reported in https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02388.html .
Changing the mode of a hard register can lead to problems, or at least
it can make worse code if the result will need reloads.
Tested on avr-elf on the test in that email, an
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