This patch fixes RCALL/RJMP instructions to other modules by replacing them
with XCALL resp. XJMP.
Moreover, now each function (except _cleanup) is enclosed in DEFUN/ENDF pairs
so that size information is available for each function.
Ok?
Johann
* config/avr/libgcc.S: Gather related func
In CCing Jörg.
Richard Henderson schrieb:
On 08/02/2011 12:52 AM, Georg-Johann Lay wrote:
There are still unrecognizables:
gcc.c-torture/execute/complex-7.c:56:1: error: unrecognizable insn:
(insn 17 14 18 3 (set (mem:SF (post_dec:HI (reg/f:HI 32 __SP_L__)) [0 S4 A8])
(reg:SF 43
http://gcc.gnu.org/ml/gcc-patches/2011-08/msg00140.html
Weddington, Eric wrote:
>>
>> This patch fixes RCALL/RJMP instructions to other modules by replacing
>> them
>> with XCALL resp. XJMP.
>>
>
> Hi Johann,
>
> Do we want to add a binutils bug report for the FIXME that you just added in
> th
Richard Henderson wrote:
> On 08/01/2011 11:42 AM, Georg-Johann Lay wrote:
>> Is there a specific reason not to define
>> ACCUMULATE_OUTGOING_ARGS on AVR?
>
> Yes. So that you can use PUSH. But as I said in PR49881,
> you probably want to provide -maccumulate-outgoing-ar
Georg-Johann Lay wrote:
> Richard Henderson wrote:
>> On 08/01/2011 11:42 AM, Georg-Johann Lay wrote:
>>> Is there a specific reason not to define
>>> ACCUMULATE_OUTGOING_ARGS on AVR?
>> Yes. So that you can use PUSH. But as I said in PR49881,
>> yo
Richard Henderson wrote:
> On 08/03/2011 07:07 AM, Georg-Johann Lay wrote:
>> #include
>>
>> void foo ()
>> {
>> printf ("%d %d %d", 1, 2, 3);
>> printf ("%d %d %d", 3, 4, 5);
>> printf ("%d %d %d", 1, 4, 5);
Richard Henderson wrote:
> When a frame pointer is in use, we can optimize popping all
> queued parameters via a simple move from the frame pointer
> instead of an addition to the stack pointer.
>
> The new sequence is 4 insns, the old sequence was 9 insns.
>
> Committed.
>
> r~
4 insns is odd.
Richard Henderson wrote:
> On 08/04/2011 09:04 AM, Denis Chertykov wrote:
>> Thank you for explanation.
>> I have a very clean understanding of whole picture.
>> May be better to use define_peephole2 with 3 insns as input and 1 as
>> output for easy understanding.
>
> *shrug* Maybe. Then you also
This patch is still pending review:
http://gcc.gnu.org/ml/gcc-patches/2011-07/msg02376.html
Georg-Johann Lay a écrit:
[...]
So here is a cleaned up version that maps to QI shifts.
Tested without regressions.
Ok?
Johann
PR target/29560
* config/avr/avr.md (any_extend): New
This patch adds {u|s}mul{qi|hi}3_highpart patterns which
can help dividing by a constant when MUL is available, e.g.
int8_t sdiv1 (int8_t a)
{
return a / 3;
}
uint8_t udiv1 (uint8_t a)
{
return a / 3;
}
uint16_t udiv2 (uint16_t a)
{
return a / 10;
}
compiles with -O2 -mmcu=atmega8 t
This is an optimization in machine dependent reorg to
remove redundant comparisons like in
cc0 = compare (Reg, Num)
if (cc0 == 0)
goto L1
cc0 = compare (Reg, Num)
if (cc0 > 0)
goto L2
The second comparison is redundant an can be removed.
Code like this can be seen in binary
Hans-Peter Nilsson schrieb:
On Thu, 11 Aug 2011, Georg-Johann Lay wrote:
This is an optimization in machine dependent reorg to
remove redundant comparisons like in
cc0 = compare (Reg, Num)
if (cc0 == 0)
goto L1
cc0 = compare (Reg, Num)
if (cc0 > 0)
goto L2
The sec
Paolo Carlini wrote:
I sanity checked the patch on x86_64-linux and OP reported that on AVR
the patch fixes the regression.
Not really "on" AVR; AVR are just tiny 8-bit microcontrollers ;-)
I obseved the problem when compiling for AVR on a x86-linux-gnu host
where 0x8000 is negative.
J
eLog
===
--- ChangeLog (revision 177953)
+++ ChangeLog (working copy)
@@ -1,3 +1,8 @@
+2011-08-22 Georg-Johann Lay
+
+ * gcc.dg/pr49994-2.c: Add dg-require-effective-target scheduling.
+ * gcc.dg/pr49994-3.c: Ditto.
+
2011-08-22 Richard Guenther
PR tests
Jakub Jelinek wrote:
> On Tue, Aug 23, 2011 at 11:57:58AM +0200, Bernd Schmidt wrote:
>> On 08/23/11 11:52, Jakub Jelinek wrote:
>>> On Tue, Aug 23, 2011 at 11:35:07AM +0200, Bernd Schmidt wrote:
> cse_process_notes_1
> perhaps could be changed for VOIDmode new_rtx to try to
> simplify_
These are three small patches to clean up the avr BE a bit:
#1: Use custom macro to test of a string starts with given prefix
#2: Let avr_regno_reg_class return smallest register class
#3: Replace/remove superfluous byte_immediate_operand and some protos.
All patches tested without regression.
Georg-Johann Lay wrote:
> These are three small patches to clean up the avr BE a bit:
>
> #1: Use custom macro to test of a string starts with given prefix
>
> #2: Let avr_regno_reg_class return smallest register class
>
> #3: Replace/remove superfluous byte_immediate_op
Georg-Johann Lay wrote:
> These are three small patches to clean up the avr BE a bit:
>
> #1: Use custom macro to test of a string starts with given prefix
>
> #2: Let avr_regno_reg_class return smallest register class
>
> #3: Replace/remove superfluous byte_immediate_op
Georg-Johann Lay wrote:
> These are three small patches to clean up the avr BE a bit:
>
> #1: Use custom macro to test of a string starts with given prefix
>
> #2: Let avr_regno_reg_class return smallest register class
>
> #3: Replace/remove superfluous byte_immediate_op
progmem_section is a section to put jump tables in.
This patch puts jump tables in individual sections if
-ffunction-section is on and does some more cleanup around
that, i.e. implement TARGET_ASM_FUNCTION_RODATA_SECTION hook.
progmem_section is renamed to progmem_swtable_section and is
local to
Georg-Johann Lay wrote:
> progmem_section is a section to put jump tables in.
>
> This patch puts jump tables in individual sections if
> -ffunction-section is on and does some more cleanup around
> that, i.e. implement TARGET_ASM_FUNCTION_RODATA_SECTION hook.
>
> progmem_
PR50289 is a minor issue with -mcall-prologues and global register variables
resp. fixed registers: Such registers shall be omitted in function
prologue/epilogue.
For test program
void bar (long long, long long, void*);
register char x asm ("7");
void foo (char a)
{
asm volatile ("":::"6");
This test case contains expression 1 << 18 which leads to FAIL for targets with
sizeof(int) < 4.
The mask seems not to be relevant for the test and can be set to, e.g. 14.
Ok?
testsuite/
* gcc.dg/ipa/ipcp-3.c (mark_cell): Use mask 1 << 14 instead of 1 << 18.
Index: gcc.dg/ipa/ipcp-3.c
Martin Jambor schrieb:
> Hi,
>
> On Mon, Sep 05, 2011 at 02:08:18PM +0200, Georg-Johann Lay wrote:
>> This test case contains expression 1 << 18 which leads to FAIL for targets
>> with
>> sizeof(int) < 4.
>>
>> The mask seems not to be relevant fo
Committed as obvious.
http://gcc.gnu.org/viewcvs?view=revision&revision=178545
Martin Jambor schrieb:
> Hi,
>
> On Mon, Sep 05, 2011 at 02:08:18PM +0200, Georg-Johann Lay wrote:
>> This test case contains expression 1 << 18 which leads to FAIL for targets
>> wit
Commited the following backport of PR50289 from mainline to 4.6:
http://gcc.gnu.org/viewcvs?view=revision&revision=178529
PR target/50289
Backport from mainline r178528
* config/avr/avr.c (sequent_regs_live): Don't recognize sequences
that contain global register v
Committed this patch as requested by Tom de Vries:
http://gcc.gnu.org/viewcvs?view=revision&revision=178646
Johann
PR tree-optimization/50322
* gcc.dg/tree-ssa/ivopts-lt.c: Add xfails for avr.
Index: gcc.dg/tree-ssa/ivopts-lt.c
This patch fixes magic number 4 and uses sizeof(int) instead so that the test
no more fails on int=16 platforms. Successfully tested on AVR.
Johann
* gcc.c-torture/execute/pr48571-1.c (bar): Use offsets sizeof(int)
instead of 4.
Index: gcc.c-torture/execute/pr48571-1.c
===
Since r176262 read-only data on avr is put into .rodata and thus xfail is no
more appropriate.
http://gcc.gnu.org/viewcvs?view=revision&revision=178649
Johann
* gcc.dg/section1.c: Don't xfail for avr.
Index: gcc.dg/section1.c
Georg-Johann Lay schrieb:
> This patch fixes magic number 4 and uses sizeof(int) instead so that the test
> no more fails on int=16 platforms. Successfully tested on AVR.
Ok to commit?
>
> Johann
>
> * gcc.c-torture/execute/pr48571-1.c (bar): Use offsets sizeof(in
This patch adds support for named progmem sections.
The problem with the current implementation is that all progmem stuff is put
into .progmem.data and thus no -gc-sections will have effect or constant
merging cannot merge constants/strings in progmem.
This patch avoids the hard coded .progmem.da
This test cases files with
gcc/testsuite/gcc.dg/torture/pr49030.c: In function 'sample_move_d32u24_sS':
gcc/testsuite/gcc.dg/torture/pr49030.c:10:2: warning: overflow in implicit
constant conversion [-Woverflow]
Fixed as obvious, tests pass now for int=16 (tested with avr).
http://gcc.gnu.org/v
This patch introduces patterns for multiply-add and multiply-sub.
On the enhanced core, these operations can be performed with the product in R0;
there is no need to MOVW it out of that register. The code is smaller and
faster and has lower register pressure.
Tested without regressions.
Ok to c
Denis Chertykov schrieb:
> 2011/9/12 Georg-Johann Lay :
>> This patch introduces patterns for multiply-add and multiply-sub.
>>
>> On the enhanced core, these operations can be performed with the product in
>> R0;
>> there is no need to MOVW it out of that r
Georg-Johann Lay schrieb:
> Denis Chertykov schrieb:
>> 2011/9/12 Georg-Johann Lay :
>>> This patch introduces patterns for multiply-add and multiply-sub.
>>>
>>> On the enhanced core, these operations can be performed with the product in
>>> R0
This is fix for a minor performance regression introduced by my changes in
trunk r175956: To load a 32-bit constant like 1 into R2, 4.6 uses
CLR R2
CLR R3
MOVW R4,R2
INC R2
whereas trunk prints the longer
CLR R2
INC R2
CLR R3
CLR R4
CLR R5
Th
As proposed in PR45099, avr-gcc will now just print a warning instead of an
error when a fixed register is needed to pass a parameter to a function.
That way the user can inspect the source, and there are situation imaginable
where clobbering a fixed register is not a problem.
Committed as trunk
This patch improves IOR, XOR, AND for HI and SI.
There is room for improvement in the current implementation:
- better analysis if a scratch is actually needed
- add clobber operands to some insns
- use 8-bit scratch instead of reload the constant
- reuse value in scratch register if known
- remo
Nathan Froyd wrote:
> On 9/21/2011 5:49 AM, Georg-Johann Lay wrote:
>> As proposed in PR45099, avr-gcc will now just print a warning instead
>> of an
>> error when a fixed register is needed to pass a parameter to a function.
>
> Where's the proposal in the PR?
This adds rotate left/right by 1 for HI and SI and rotates by QI.
It's all straight forward. The test case in the PR leads to generation of the
new rotate patterns.
Passed without regressions.
Ok?
Johann
PR target/50446
* config/avr/avr.md (rotlqi3): Support all offsets 0..7.
This patch adds the PLUS part to fix the PR.
addsi3 has a 8-bit scratch register now so that constants that are not covered
by the constraints won't force a reload of the constant.
The output routine tries adding the constant and subtracting the negated
constant and then chooses the shortest sequ
Denis Chertykov schrieb:
> 2011/9/22 Georg-Johann Lay :
>> This patch adds the PLUS part to fix the PR.
>>
>> addsi3 has a 8-bit scratch register now so that constants that are not
>> covered
>> by the constraints won't force a reload of the constant.
>
Paolo Bonzini schrieb:
> On 09/22/2011 07:43 PM, Georg-Johann Lay wrote:
>> This patch adds the PLUS part to fix the PR.
>>
>> addsi3 has a 8-bit scratch register now so that constants that are not
>> covered
>> by the constraints won't force a reload of
Paolo Bonzini schrieb:
> On 09/23/2011 10:56 AM, Paolo Bonzini wrote:
>> Also, I am curious about one thing: while this is of course a very
>> pragmatic solution, you could also convert AVR to get rid of CC0, do
>> this at expansion time, and get split-wide-types to work as intended.
My changes ar
This is the compare part to fix PR50447.
Just like the preceding changes to fix PR50447 it's a micro-optimization to
smarter print-out of instructions.
The patch covers comparisons against HI and SI integers.
The byte-wide comparison allows reusing the value in the scratch register and
individua
This is just a code clean-up that deals with loading 16-bit constants (HImode).
o Length adjustment is triggered by insn attribute "adjust_len"
o To print the constant output_movhi can use output_reload_inhi
o output_reload_inhi can use the same function as output_reload_insisf uses,
just a sm
This patch is housekeeping to clean up avr.c:adjust_insn_length i.e. replace
digging in RTXes by using insn attribute "adjust_len".
There's nothing special about it, it's just mechanical change.
As alternative "yes" is no more needed, I removed it and set the default to
"no": No insn needs length
This is a minor tweak to do eq/ne comparisons one instruction shorter in the
case where the compare target is unused after the comparison:
For 1:
DEC R0
OR R0,R1
OR R0,R2
OR R0,R3
For -1:
AND R0,R3
AND R0,R2
AND R0,R1
COM R0
The text peephole casesi+2 used 0x where -1 is the right
This patchlet represents the impact of insn ashrqi3 on CC by means of attribute
"cc" instead of hard-coding it in notice_update_cc.
Testsuite passes fine. Moreover, tested against code like
char c;
void func_1 (char a)
{
a = a >> 7;
if (a)
c = a;
}
that triggered PR39633.
Ok?
This is just a code clean-up.
The bulky code from *addhi3_sp_R_pc2 and *addhi3_sp_R_pc3 is done by a small C
function that does the same (except that it prints some comment depending on
-dp or -fverbose-asm).
*movhi_sp is an insn that should not be there and go away because it is a move
insn and
Richard Henderson schrieb:
On 09/27/2011 12:56 AM, Georg-Johann Lay wrote:
* config/avr/avr-protos.h (avr_out_addto_sp): New prototype.
* config/avr/avr.c (avr_out_addto_sp): New function.
(adjust_insn_length): Handle ADJUST_LEN_ADDTO_SP.
* config/avr/avr.md
This is a tentative patch for better support of logging information for avr BE
developers.
There are situations where it is more convenient to let the compiler produce
information than to debug into the compiler. One example are -da dumps.
This patch proposes a better support to print information
Georg-Johann Lay wrote:
> This is a tentative patch for better support of logging information for avr BE
> developers.
>
> There are situations where it is more convenient to let the compiler produce
> information than to debug into the compiler. One example are -da dumps.
This is the second patch in this series.
Functions that formerly used fprintf/debug_rtx now use avr_edump and the use
sites of TARGET_ALL_DEBUG are mapped to respective flags of avr_log.
avr_log_vadump uses %b to print bool.
The patch adds outputs for the results of avr_rtx_costs and wraps the w
This adds log output to avr_address_cost.
Ok for trunk?
Johann
PR target/50566
* config/avr/avr-protos.h (avr_log_t): New field address_cost.
* config/avr/avr.c (avr_address_cost): Use it.
* config/avr/avr-log.c (avr_log_set_avr_log): Initialize it.
(avr_l
This is the patch to add log output to LEGITIMIZE_RELOAD_ADDRESS.
The code is moved from macro in avr.h to a new function in avr.c.
Functionality is the same, but IMO it's more convenient to have it as function
than as a quite long macro.
Ok for trunk?
PR target/50566
* config/a
Artem Shinkarov schrieb:
> Here is a new version of the patch which considers the changes from
> 2011-09-02 Richard Guenther
>
>
> ChangeLog
>
> 20011-09-06 Artjoms Sinkarovs
>
>gcc/
>* fold-const.c (constant_boolean_node): Adjust the meaning
>of boolean for vector typ
Artem Shinkarov schrieb:
> On Fri, Sep 30, 2011 at 4:01 PM, Georg-Johann Lay wrote:
>> Artem Shinkarov schrieb:
>>> Here is a new version of the patch which considers the changes from
>>> 2011-09-02 Richard Guenther
>>>
>>>
>>> ChangeLog
>
Artem Shinkarov schrieb:
On Fri, Sep 30, 2011 at 4:54 PM, Jakub Jelinek wrote:
On Fri, Sep 30, 2011 at 04:48:41PM +0100, Artem Shinkarov wrote:
Most likely we can. The question is what do we really want to check
with this test. My intention was to check that a programmer can
statically get c
Artem Shinkarov schrieb:
> On Fri, Sep 30, 2011 at 4:54 PM, Jakub Jelinek wrote:
>> On Fri, Sep 30, 2011 at 04:48:41PM +0100, Artem Shinkarov wrote:
>>> Most likely we can. The question is what do we really want to check
>>> with this test. My intention was to check that a programmer can
>>> stati
Jakub Jelinek schrieb:
> On Tue, Oct 04, 2011 at 11:32:37AM +0200, Georg-Johann Lay wrote:
>> The patch from
>> http://gcc.gnu.org/ml/gcc-patches/2011-09/msg02060.html
>> http://gcc.gnu.org/ml/gcc-patches/2011-09/txt00337.txt
>> works for me.
>>
>> If it&
Ping #1: http://gcc.gnu.org/ml/gcc-patches/2011-09/msg01690.html
Georg-Johann Lay wrote:
> This is just a code clean-up.
>
> The bulky code from *addhi3_sp_R_pc2 and *addhi3_sp_R_pc3 is done by a small C
> function that does the same (except that it prints some comment depending
Artem Shinkarov schrieb:
> Hi, Richard
>
> There is a problem with the testcases of the patch you have committed
> for me. The code in every test-case is doubled. Could you please,
> apply the following patch, otherwise it would fail all the tests from
> the vector-shuffle-patch would fail.
>
> A
Richard Guenther schrieb:
> On Thu, Oct 6, 2011 at 12:51 PM, Georg-Johann Lay wrote:
>> Artem Shinkarov schrieb:
>>> Hi, Richard
>>>
>>> There is a problem with the testcases of the patch you have committed
>>> for me. The code in every test-cas
Richard Guenther schrieb:
> On Thu, Oct 6, 2011 at 1:03 PM, Georg-Johann Lay wrote:
>> Richard Guenther schrieb:
>>> On Thu, Oct 6, 2011 at 12:51 PM, Georg-Johann Lay wrote:
>>>> Artem Shinkarov schrieb:
>>>>> Hi, Richard
>>>>>
>&
Richard Henderson schrieb:
On 10/06/2011 04:46 AM, Georg-Johann Lay wrote:
So here it is. Lightly tested on my target: All tests either PASS or are
UNSUPPORTED now.
Ok?
Not ok, but only because I've completely restructured the tests again.
Patch coming very shortly...
Thanks, I hope
Fix of wrong data_section_start for ATmega164A.
Ok?
Johann
PR target/50652
* config/avr/avr-mcus.def (AVR_MCU): Set .data_section_start of
atmega164a to 0x100.
Index: config/avr/avr-mcus.def
===
--- config/
Backported to 4.6 branch:
http://gcc.gnu.org/viewcvs?view=revision&revision=179738
Johann
PR target/50652
Backport from Mainline r179737.
* config/avr/avr-devices.c (avr_mcu_types): Set
.data_section_start of atmega164a to 0x100.
This is an obvious mini-optimization if the input operands of mulhi are the
same, one multiply operation can be saved.
Ok for trunk?
Johann
* config/avr/avr.md (*mulhi3_enh): Treat squaring smarter.
Index: config/avr/avr.md
The auto-detect machinery fails to correctly detect that TLS is not supported
on AVR. This leads to gross noise of several hundreds of FAILs in testsuite.
This patch explicitly tells that AVR doesn't support TLS.
Lightly tested with testsuite run on avr-unknown-none where tests like
gcc.dg/debug
Rainer Orth schrieb:
> Georg-Johann Lay writes:
>
>> The auto-detect machinery fails to correctly detect that TLS is not supported
>> on AVR. This leads to gross noise of several hundreds of FAILs in testsuite.
>>
>> This patch explicitly tells that AVR doesn'
This patch does better re-usage of __tablejump2__ from libgcc so that
switch/case statements with jump tables become smaller because the sequence
needs 6 to 9 words compared to 2 when JMPing to __tablejump2__.
Moreover, __tablejump2__ does no more rely in the content of EIND (by using
EIJMP) and u
Rainer Orth schrieb:
> Georg-Johann Lay writes:
>
>> For example, after updating trunk to 179738,
>>
>> (gdb) set args -fpreprocessed tls-1.i -quiet -dumpbase tls-1.c
>> -mmcu=atmega128
>> -auxbase tls-1 -gdwarf-2 -O3 -O2 -version -o tls-1.s
>> (gdb) c
toplev.c complains about "unwind tables currently require a frame pointer for
correctness".
This patchlet supplies a fix to avoid build warnings/test fails in that it sets
flag_omit_frame_pointer to 0 if unwind needs FP.
toplev.c:process_options sets flag_unwind_tables depending on
flag_non_call_
This is bit of code cleanup and move macro code from avr.h to functions in
avr.c.
There's no change in functionality. Passed without regressions.
Ok?
Johann
* config/avr/avr-protos.h (avr_mode_code_base_reg_class): New
prototype.
(avr_regno_mode_code_ok_for_base_p): New
This is a small addendum to PR50447.
It's a change to addsi3 insn; the actual insn sequence printed is still the
same (except for adding +/-1 to l-reg) but the effect on cc0 is worked out so
that it can be used to cancel out comparisons like in long loops.
cc insn attribute gets one more alternat
This patch teaches avr-gcc to skip 2-word instructions like STS and LDS.
It's just about looking into an 2-word insn and check if it's a 2-word
instruction or not.
Passes without regression. Ok to install?
Johann
PR target/49939
* config/avr/avr.md (*movqi): Rename to movqi_insn
Denis Chertykov schrieb:
> 2011/10/11 Georg-Johann Lay :
>> This patch teaches avr-gcc to skip 2-word instructions like STS and LDS.
>>
>> It's just about looking into an 2-word insn and check if it's a 2-word
>> instruction or not.
>>
>> Pass
This is yet another attempt to fix PR46278 (fake X addressing).
After the previous clean-ups it is just a small change.
caller-saves.c tries to eliminate call-clobbered hard-regs allocated to pseudos
around function calls and that leads to situations that reload is no more
capable to perform all
This patch saves some ticks and bytes on stack by JUMPing to no-return
functions instead of CALLing them.
Passes without regression.
Ok for trunk?
Johann
* config/avr/avr-protos.h (avr_out_call): New prototype.
* config/avr/avr.md (adjust_len): Add alternative "call".
(c
Richard Henderson schrieb:
> On 10/13/2011 11:16 AM, Georg-Johann Lay wrote:
>> This patch saves some ticks and bytes on stack by JUMPing to no-return
>> functions instead of CALLing them.
>>
>> Passes without regression.
>>
>> Ok for trunk?
>>
&
Weddington, Eric a écrit:
Georg-Johann Lay wrote:
This is yet another attempt to fix PR46278 (fake X addressing).
After the previous clean-ups it is just a small change.
caller-saves.c tries to eliminate call-clobbered hard-regs
allocated to pseudos around function calls and that leads to
Richard Henderson schrieb:
On 10/13/2011 12:00 PM, Georg-Johann Lay wrote:
What do you propose?
o A command line option that is on per default like
-mnoreturn-tail-calls or -mjmp-noreturn
The command-line-option. I think I prefer -mjump-noreturn,
as the inverse -mno-noreturn-tail-calls is
Weddington, Eric schrieb:
>
>> This is yet another attempt to fix PR46278 (fake X addressing).
>>
>> After the previous clean-ups it is just a small change.
>>
>> caller-saves.c tries to eliminate call-clobbered hard-regs allocated to
>> pseudos around function calls and that leads to situation
Denis Chertykov schrieb:
> Georg-Johann Lay :
>> Weddington, Eric schrieb:
>>>> This is yet another attempt to fix PR46278 (fake X addressing).
>>>>
>>>> After the previous clean-ups it is just a small change.
>>>>
>>>> ca
Richard Henderson schrieb:
> On 10/13/2011 11:31 PM, Georg-Johann Lay wrote:
>> Richard Henderson schrieb:
>>> On 10/13/2011 12:00 PM, Georg-Johann Lay wrote:
>>>
>>>> What do you propose?
>>>>
>>>> o A command line option that is on
Denis Chertykov schrieb:
> 2011/10/10 Georg-Johann Lay :
>> toplev.c complains about "unwind tables currently require a frame pointer for
>> correctness".
>>
>> This patchlet supplies a fix to avoid build warnings/test fails in that it
>> sets
>>
Paolo Bonzini schrieb:
> On 10/14/2011 06:23 PM, Georg-Johann Lay wrote:
>> +@item -mjump-to-noreturn
>> +@opindex mjump-to-noreturn
>> +Use a jump instruction instead of a call instruction when calling a
>> +no-return functions. This option is active if optimizatio
Gerald Pfeifer schrieb:
This patch breaks bootstrap on FreeBSD 8 and FreeBSD 9 and everyone
else using makeinfo 4.8 (when the minimum we require right now is
version 4.7).
Hence I went ahead and applied to simple patch below. If you'd
like to address this differently, happy to see a different a
The problem with the PR is that lower-subreg.c happily splits multi-byte moves
from address spaces without knowing anything about the additional costs this is
causing.
The TARGET_MODE_DEPENDENT_ADDRESS_P hook cannot be used for 16-bit addresses
because that hook is not sensitive to address spaces,
This fixes a problem if avr-gcc is built with C++
Lightly tested.
Ok for trunk?
Johann
PR target/52499
* config/avr/avr.c (avr_mode_code_base_reg_class): Change return
type from reg_class_t to enum reg_class.
* config/avr/avr-protos.h (avr_mode_code_base_reg_clas
...and now to the right mailing list...
This patch cuts down insane stack offsets for 8-bit SP targets to a value the
involved insns can handle.
Background is that newlib generates such insane offsets (2050 bytes of stack
for a device with 128 bytes of RAM) because of extension PR51345, i.e. new
http://gcc.gnu.org/viewcvs?view=revision&revision=185255
This adds some test cases for the address space support.
Some tests fail because of PR other/52545.
Moreover, you will have to update the avrtest simulator because the test case
for __flash1 needs its own linker script in order to locate .
http://gcc.gnu.org/ml/gcc-patches/2012-03/msg00641.html
Georg-Johann Lay wrote:
> The problem with the PR is that lower-subreg.c happily splits multi-byte moves
> from address spaces without knowing anything about the additional costs this
> is
> causing.
>
> The TARGET_MODE_D
Addes the following tests:
http://gcc.gnu.org/viewcvs?view=revision&revision=185570
PR target/49868
* gcc.target/avr/torture/addr-space-2.h: New file.
* gcc.target/avr/torture/addr-space-2-g.h: New test.
* gcc.target/avr/torture/addr-space-2-0.h: New test.
Martin Jambor wrote:
> Hi,
>
> this is another iteration of my attempts to fix expansion of
> misaligned memory accesses on strict-alignment platforms (which was
> suggested by Richi in
> http://gcc.gnu.org/ml/gcc-patches/2011-08/msg00931.html and my first
> attempt was posted as
> http://gcc.gnu.
http://gcc.gnu.org/viewcvs?view=revision&revision=185588
Johann
Jakub Jelinek wrote:
> Hi!
>
> This patch adds ASSERT_EXPRs derived from
> tmp_N = var_M & cst2;
> if (tmp_N cmp val)
> where cst2 and val are constants. Bootstrapped/regtested
> on x86_64-linux and i686-linux, ok for trunk?
>
> 2012-03-14 Jakub Jelinek
>
> PR tree-optimization/522
insns.
(mov): For multi-byte move from non-generic
16-bit address spaces: Expand to load_ resp.
load__clobber.
(load_libgcc): Remove expander.
(split-lpmx): Remove split.
Georg-Johann Lay wrote:
> The problem with the PR is that lower-subreg.c happily spl
And here is the patch...
Georg-Johann Lay wrote:
> Dropping the first patch which does not work because at expand-time there
> must not be pre-/post-modify addressing :-(
>
> This solutions turns completely away from MEM and addressing modes:
> It represents loads from the
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