Paolo Bonzini schrieb: > On 09/23/2011 10:56 AM, Paolo Bonzini wrote: >> Also, I am curious about one thing: while this is of course a very >> pragmatic solution, you could also convert AVR to get rid of CC0, do >> this at expansion time, and get split-wide-types to work as intended.
My changes are just micro-optimizations to print things in a smarter way. I don't know enough of CCmode to do that transition. >> compare-elim.c makes it relatively easy to remove CC0 nowadays. > > For example, a two-byte add can be written as > > (set (reg:QI L1) (plus:QI (reg:QI L2) (reg:QI L3))) > (set (reg:QI H1) (plus:QI > (plus:QI (req:QI H2) (reg:QI H3)) > (ltu:QI (reg:QI L1) (reg:QI L3)))) > > After reload the second instruction can be split to > > (set (reg:CC_C CC) (compare:QI (reg:QI L1) (reg:QI L3))) > (set (reg:QI H1) (plus:QI > (plus:QI (req:QI H2) (reg:QI H3)) > (lt:QI (reg:CC_C CC) (const_int 0)))) What happens if L1=L3? AVR just has two-operand instructions so there are many insns with "0" constraint. How goes the LTU -> LT transition? Ans reloading from memory might change Carry. How is that handled? Read somewhere about that problem in some PR-chat and that this blocked the cc0 -> CCmode transition (don't know if that's actually a restriction). > (i.e. cp+adc). compare-elim will then be able to turn this into add+adc: > > [parallel > (set (reg:QI L1) (plus:QI (reg:QI L2) (reg:QI L3))) > (set (reg:CC_C CC) (compare:QI > (plus:QI (reg:QI L2) (reg:QI L3)) > (reg:QI L3))))] > (set (reg:QI H1) (plus:QI > (plus:QI (req:QI H2) (reg:QI H3)) > (lt:QI (reg:CC_C CC) (const_int 0)))) What about the other flags like Z (zero) and N (negative)? They are not as important as Carry but are still usable to avoid comparisons. Describing all that explicitly in RTL will be quite tedious... > Paolo Johann
