On 6/10/24 1:24 PM, Andrew MacLeod wrote:
The array bounds warning pass was originally attached to the VRP pass
because it wanted to leverage the context sensitive ranges available there.
With ranger, we can make it a pass of its own for very little cost. This
patch does that. It removes th
On 6/10/24 8:49 AM, pan2...@intel.com wrote:
When enabled the PHI handing for COND_EXPR, we need to insert the gcall
to replace the PHI node. Unfortunately, I made a mistake that insert
the gcall to before the last stmt of the bb. See below gimple, the PHI
is located at no.1 but we insert
On 6/10/24 16:12, Jeff Law wrote:
Does anyone have any issues with any of this?
No, in fact, quite the opposite. I think we very much want the
warning out of VRP into its own little pass that we can put wherever
it makes sense in the pipeline rather than having it be tied to VRP.
I'd p
pushed as 74ee12ff68243bb177fb8653474dff80c3792139
fyi, the 2 testcases depending on the VRP flag were:
c-c++-common/Warray-bounds-2.c (-warray-bounds -fno-tree-vrp :-P)
and
g++.dg/warn/string1.C (-O1 -Wall)
Andrew
On 6/10/24 16:12, Jeff Law wrote:
On 6/10/24 1:24 PM, Andrew MacLeod w
Another improvement for generating Zbs instructions.
In this case we're looking at stuff like (1 << N) | C where N varies and
C is a single bit constant.
In this pattern the (1 << N) happens in SImode, but is zero extended out
to DImode before the bit manipulation. The fact that we're modify
Convert testsuite infrastructure to use Zalrsc and Zaamo rather than A.
gcc/ChangeLog:
* doc/sourcebuild.texi: Add docs for atomic extension testsuite infra.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/amo-table-a-6-amo-add-1.c: Use Zaamo rather than A.
* gcc.target/risc
All amo patterns can be represented with lrsc sequences.
Add these patterns as a fallback when Zaamo is not enabled.
gcc/ChangeLog:
* config/riscv/sync.md (atomic_): New expand
pattern.
(amo_atomic_): Rename amo pattern.
(atomic_fetch_): New lrsc sequence pattern.
The A extension has been split into two parts: Zaamo and Zalrsc.
This patch adds basic support by making the A extension imply Zaamo and
Zalrsc.
Zaamo/Zalrsc spec: https://github.com/riscv/riscv-zaamo-zalrsc/tags
Ratification: https://jira.riscv.org/browse/RVS-1995
v2:
Rebased and updated some te
From: Edwin Lu
There is a proposal to split the A extension into two parts: Zaamo and Zalrsc.
This patch adds basic support by making the A extension imply Zaamo and
Zalrsc.
Proposal: https://github.com/riscv/riscv-zaamo-zalrsc/tags
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc:
Pushed.
Gerald
---
htdocs/news.html | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/htdocs/news.html b/htdocs/news.html
index 5f652d90..de92bdf6 100644
--- a/htdocs/news.html
+++ b/htdocs/news.html
@@ -384,7 +384,7 @@
The Vtable Verification Feature is now in GCC
[2013
Pushed.
Gerald
gcc:
* doc/gm2.texi (Documentation): Fix typos, grammar, and a link.
---
gcc/doc/gm2.texi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/doc/gm2.texi b/gcc/doc/gm2.texi
index 8661fcb8728..c532339fbb8 100644
--- a/gcc/doc/gm2.texi
+++ b/gcc/d
On Mon, Jun 10, 2024 at 02:46:54PM -0700, Patrick O'Neill wrote:
> The A extension has been split into two parts: Zaamo and Zalrsc.
> This patch adds basic support by making the A extension imply Zaamo and
> Zalrsc.
>
> Zaamo/Zalrsc spec: https://github.com/riscv/riscv-zaamo-zalrsc/tags
> Ratifica
On Mon, Jun 10, 2024 at 3:20 PM Roger Sayle wrote:
>
>
> This patch fixes PR target/115397, a recent regression caused by my
> ternlog patch that results in an ICE (building numpy) with -m32 -fPIC.
> The problem is that ix86_broadcast_from_constant, which calls
> get_pool_constant, doesn't handle
Thank a lot, Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Tuesday, June 11, 2024 4:15 AM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com
Subject: Re: [PATCH v1] Widening-Mul: Fix one ICE of gcall insertion for PHI
m
Hi Sam,
> This testcases ICEs for me on x86-64 too (without your patch) with just -O2.
> Can you move it out of the riscv suite? (I suspect the other fails on x86-64
> too).
Sure thing, but do you have any suggestion about where should I put these 2
cases?
There are sorts of sub-directories un
On 6/10/24 7:28 PM, Li, Pan2 wrote:
Hi Sam,
This testcases ICEs for me on x86-64 too (without your patch) with just -O2.
Can you move it out of the riscv suite? (I suspect the other fails on x86-64
too).
Sure thing, but do you have any suggestion about where should I put these 2
cases?
T
Got it, thanks. Let me prepare the patch after test.
Pan
-Original Message-
From: Jeff Law
Sent: Tuesday, June 11, 2024 9:42 AM
To: Li, Pan2 ; Sam James
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com;
richard.guent...@gmail.com
Subject: Re: [PATCH v1] Widening
On 6/10/24 11:13, Marek Polacek wrote:
On Mon, Jun 10, 2024 at 10:22:11AM -0400, Patrick Palka wrote:
On Fri, 7 Jun 2024, Marek Polacek wrote:
@@ -3940,9 +3936,6 @@ find_parameter_packs_r (tree *tp, int *walk_subtrees,
void* data)
parameter pack (14.6.3), or the type-specifier-seq of
On 6/10/24 03:13, Julian Waters wrote:
Hi Jason,
Thanks for the reply. I'm a little bit overwhelmed with university at
the moment, would it be ok if I delay implementing this a little bit?
Sure, we're still early in GCC 15 development, no time pressure.
On Tue, Jun 4, 2024 at 1:04 AM Jason M
On 6/10/24 6:15 PM, Andrea Parri wrote:
On Mon, Jun 10, 2024 at 02:46:54PM -0700, Patrick O'Neill wrote:
The A extension has been split into two parts: Zaamo and Zalrsc.
This patch adds basic support by making the A extension imply Zaamo and
Zalrsc.
Zaamo/Zalrsc spec: https://github.com/risc
On 6/10/24 3:46 PM, Patrick O'Neill wrote:
The A extension has been split into two parts: Zaamo and Zalrsc.
This patch adds basic support by making the A extension imply Zaamo and
Zalrsc.
Zaamo/Zalrsc spec: https://github.com/riscv/riscv-zaamo-zalrsc/tags
Ratification: https://jira.riscv.org/
This test is no longer useful. It doesn't test what it was originally
intended to test and there's really no way to recover it sanely.
We agreed in the patchwork meeting last week that if we want to test Zfa
that we'll write a new test for that. Similarly if we want to do deeper
testing of t
On Mon, Jun 10, 2024 at 2:37 PM Collin Funk wrote:
>
> A shift of 31 on a signed int is undefined behavior. Since unsigned
> int is 32-bits wide this change fixes it and silences the warning.
Ok.
>
> gcc/ChangeLog:
>
> PR target/115409
> * config/i386/avx512fp16intrin.h (_mm512_co
In theory, const_wide_int can also be handle with extra check for each
components of the HOST_WIDE_INT array, and the check is need for both
shift and bit_and operands.
I assume the optimization opportnunity is rare, so the patch just add
extra check to make sure GET_MODE_INNER (mode) can fix into
Hi
I can’t seem to get a review of this one-line patch. Could a global reviewer
help?
Thanks,
FX
ping**3
> Le 11 mai 2024 à 17:16, FX Coudert a écrit :
>
> Hi,
>
> On some targets it seems that ssize_t is not defined by any of the headers
> transitively included by . This leads to a boo
On Tue, Jun 11, 2024 at 01:36:35PM +0800, liuhongt wrote:
> In theory, const_wide_int can also be handle with extra check for each
> components of the HOST_WIDE_INT array, and the check is need for both
> shift and bit_and operands.
> I assume the optimization opportnunity is rare, so the patch ju
From: Pan Li
The test cases of pr115387 are target independent, at least x86
and riscv are able to reproduce. Thus, move these cases to
the gcc.dg/torture.
The below test suites are passed.
1. The rv64gcv fully regression test.
2. The x86 fully regression test.
gcc/testsuite/ChangeLog:
This patch implements the flag -fassume-sane-operator-new as suggested in
PR110137. When the flag is enabled, it is assumed that operator new does not
modify global memory.
See the previous email for more context.
Issues raised has been fixed, except that it remains not very well integrated
wi
I wrap a part of code about indirect conversion. The API refers to
supportable_narrowing/widening_operations.
BRs,
Lin
gcc/ChangeLog:
PR target/107432
* tree-vect-generic.cc
(expand_vector_conversion): Support convert for int -> int,
float -> float and int <-> fl
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